- 12 2月, 2021 2 次提交
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由 Geetha sowjanya 提交于
On CN10K platform transmit/receive buffer alloc and free from/to hardware had changed to support burst operation. Whereas pervious silicon's only support single buffer free at a time. To Support the same firmware allocates a DRAM region for each PF/VF for storing LMTLINES. These LMTLINES are used for NPA batch free and for flushing SQE to the hardware. PF/VF LMTST region is accessed via BAR4. PFs LMTST region is followed by its VFs mbox memory. The size of region varies from 2KB to 256KB based on number of LMTLINES configured. This patch adds support for - Mapping PF/VF LMTST region. - Reserves 0-71 (RX + TX + XDP) LMTST lines for NPA batch free operation. - Reserves 72-512 LMTST lines for NIX SQE flush. Signed-off-by: NGeetha sowjanya <gakula@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Subbaraya Sundeep 提交于
Firmware allocates memory regions for PFs and VFs in DRAM. The PFs memory region is used for AF-PF and PF-VF mailbox. This mbox facilitate communication between AF-PF and PF-VF. On CN10K platform: The DRAM region allocated to PF is enumerated as PF BAR4 memory. PF BAR4 contains AF-PF mbox region followed by its VFs mbox region. AF-PF mbox region base address is configured at RVU_AF_PFX_BAR4_ADDR PF-VF mailbox base address is configured at RVU_PF(x)_VF_MBOX_ADDR = RVU_AF_PF()_BAR4_ADDR+64KB. PF access its mbox region via BAR4, whereas VF accesses PF-VF DRAM mailboxes via BAR2 indirect access. On CN9XX platform: Mailbox region in DRAM is divided into two parts AF-PF mbox region and PF-VF mbox region i.e all PFs mbox region is contiguous similarly all VFs. The base address of the AF-PF mbox region is configured at RVU_AF_PF_BAR4_ADDR. AF-PF1 mbox address can be calculated as RVU_AF_PF_BAR4_ADDR * mbox size. The base address of PF-VF mbox region for each PF is configure at RVU_AF_PF(0..15)_VF_BAR4_ADDR.PF access its mbox region via BAR4 and its VF mbox regions from RVU_PF_VF_BAR4_ADDR register, whereas VF access its mbox region via BAR4. This patch changes mbox initialization to support both CN9XX and CN10K platform. The patch also adds new hw_cap flag to setting hw features like TSO etc and removes platform specific name from the PF/VF driver name to make it appropriate for all supported platforms This patch also removes platform specific name from the PF/VF driver name to make it appropriate for all supported platforms Signed-off-by: NSubbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: NGeetha sowjanya <gakula@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 11 2月, 2021 2 次提交
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由 Christina Jacob 提交于
Add ethtool support to configure fec modes baser/rs and support to fecth FEC stats from CGX as well PHY. Configure fec mode - ethtool --set-fec eth0 encoding rs/baser/off/auto Query fec mode - ethtool --show-fec eth0 Signed-off-by: NChristina Jacob <cjacob@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NHariprasad Kelam <hkelam@marvell.com> Reviewed-by: NJesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Kevin Hao 提交于
Pavel pointed that the return of dma_addr_t in otx2_alloc_rbuf/__otx2_alloc_rbuf() seem suspicious because a negative error code may be returned in some cases. For a dma_addr_t, the error code such as -ENOMEM does seem a valid value, so we can't judge if the buffer allocation fail or not based on that value. Add a parameter for otx2_alloc_rbuf/__otx2_alloc_rbuf() to store the dma address and make the return value to indicate if the buffer allocation really fail or not. Reported-by: NPavel Machek <pavel@ucw.cz> Signed-off-by: NKevin Hao <haokexin@gmail.com> Tested-by: NSubbaraya Sundeep <sbhatta@marvell.com> Reviewed-by: NAlexander Duyck <alexanderduyck@fb.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 06 1月, 2021 1 次提交
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由 Geetha sowjanya 提交于
Hardware supports 8 RSS groups per interface. Currently we are using only group '0'. This patch allows user to create new RSS groups/contexts and use the same as destination for flow steering rules. usage: To steer the traffic to RQ 2,3 ethtool -X eth0 weight 0 0 1 1 context new (It will print the allocated context id number) New RSS context is 1 ethtool -N eth0 flow-type tcp4 dst-port 80 context 1 loc 1 To delete the context ethtool -X eth0 context 1 delete When an RSS context is removed, the active classification rules using this context are also removed. Change-log: v4 - Fixed compiletime warning. - Address Saeed's comments on v3. v3 - Coverted otx2_set_rxfh() to use new function. v2 - Removed unrelated whitespace - Coverted otx2_get_rxfh() to use new function. Signed-off-by: NSunil Kovvuri Goutham <sgoutham@marvell.com> Signed-off-by: NGeetha sowjanya <gakula@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 24 11月, 2020 1 次提交
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由 Jakub Kicinski 提交于
linux/netdevice.h is included in very many places, touching any of its dependecies causes large incremental builds. Drop the linux/ethtool.h include, linux/netdevice.h just needs a forward declaration of struct ethtool_ops. Fix all the places which made use of this implicit include. Acked-by: NJohannes Berg <johannes@sipsolutions.net> Acked-by: NShannon Nelson <snelson@pensando.io> Reviewed-by: NJesse Brandeburg <jesse.brandeburg@intel.com> Link: https://lore.kernel.org/r/20201120225052.1427503-1-kuba@kernel.orgSigned-off-by: NJakub Kicinski <kuba@kernel.org>
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- 21 11月, 2020 1 次提交
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由 Srujana Challa 提交于
On OcteonTX2 platform CPT instruction enqueue and NIX packet send are only possible via LMTST operations which uses LDEOR instruction. This patch moves lmt flush function from OcteonTX2 nic driver to include/linux/soc since it will be used by OcteonTX2 CPT and NIC driver for LMTST. Signed-off-by: NSuheil Chandran <schandran@marvell.com> Signed-off-by: NSrujana Challa <schalla@marvell.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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- 18 11月, 2020 4 次提交
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由 Naveen Mamindlapalli 提交于
This patch adds support for ndo_set_vf_mac, ndo_set_vf_vlan and ndo_get_vf_config handlers. The traffic redirection based on the VF mac address or vlan id is done by installing MCAM rules. Reserved RX_VTAG_TYPE7 in each NIXLF for VF VLAN which strips the VLAN tag from ingress VLAN traffic. The NIX PF allocates two MCAM entries for VF VLAN feature, one used for ingress VTAG strip and another entry for egress VTAG insertion. This patch also updates the MAC address in PF installed VF VLAN rule upon receiving nix_lf_start_rx mbox request for VF since Administrative Function driver will assign a valid MAC addr in nix_lf_start_rx function. Signed-off-by: NNaveen Mamindlapalli <naveenm@marvell.com> Co-developed-by: NTomasz Duszynski <tduszynski@marvell.com> Signed-off-by: NTomasz Duszynski <tduszynski@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NHariprasad Kelam <hkelam@marvell.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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由 Hariprasad Kelam 提交于
This patch implements egress VLAN offload by appending NIX_SEND_EXT_S header to NIX_SEND_HDR_S. The VLAN TCI information is specified in the NIX_SEND_EXT_S. The VLAN offload in the ingress path is implemented by configuring the NIX_RX_VTAG_ACTION_S to strip and capture the outer vlan fields. The NIX PF allocates one MCAM entry for Rx VLAN offload. Signed-off-by: NHariprasad Kelam <hkelam@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NNaveen Mamindlapalli <naveenm@marvell.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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由 Hariprasad Kelam 提交于
Add unicast MAC address filtering support using install flow message. Total of 8 MCAM entries are allocated for adding unicast mac filtering rules. If the MCAM allocation fails, the unicast filtering support will not be advertised. Signed-off-by: NHariprasad Kelam <hkelam@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NNaveen Mamindlapalli <naveenm@marvell.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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由 Subbaraya Sundeep 提交于
This patch adds support for adding and deleting ethtool ntuple filters. The filters for ether, ipv4, ipv6, tcp, udp and sctp are supported. The mask is also supported. The supported actions are drop and direct to a queue. Additionally we support FLOW_EXT field vlan_tci and FLOW_MAC_EXT. The NIX PF will allocate total 32 MCAM entries for the use of ethtool ntuple filters. The Administrative Function(AF) will install/delete the MCAM rules when NIX PF sends mailbox message to install/delete the ntuple filters. Ethtool ntuple filters support is restricted to PFs as of now and PF can install ntuple filters to direct the traffic to its VFs. Hence added a separate callback for VFs to get/set RSS configuration. Signed-off-by: NSubbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NNaveen Mamindlapalli <naveenm@marvell.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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- 01 11月, 2020 1 次提交
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由 Subbaraya Sundeep 提交于
CGX links are followed by LBK links but number of CGX and LBK links varies between platforms. Hence get the number of links present in hardware from AF and use it to calculate LBK link number. Signed-off-by: NSubbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NRakesh Babu <rsaladi2@marvell.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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- 24 9月, 2020 1 次提交
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由 Subbaraya Sundeep 提交于
With tracepoints support present in the mailbox code this patch adds tracepoints in PF and VF drivers at places where mailbox messages are allocated, sent and at message interrupts. Signed-off-by: NSubbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 02 9月, 2020 1 次提交
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由 Sunil Goutham 提交于
Defines UDP segmentation algorithm in hardware and supports offloading UDP segmentation. Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 25 8月, 2020 1 次提交
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由 Aleksey Makarov 提交于
This patch adds PTP clock and uses it in Octeontx2 network device. PTP clock uses mailbox calls to access the hardware counter on the RVU side. Co-developed-by: NSubbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: NSubbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: NAleksey Makarov <amakarov@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Acked-by: NRichard Cochran <richardcochran@gmail.com> Acked-by: NJakub Kicinski <kuba@kernel.org> Reviewed-by: NJesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 10 5月, 2020 1 次提交
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由 Kevin Hao 提交于
In the current codes, the octeontx2 uses its own method to allocate the pool buffers, but there are some issues in this implementation. 1. We have to run the otx2_get_page() for each allocation cycle and this is pretty error prone. As I can see there is no invocation of the otx2_get_page() in otx2_pool_refill_task(), this will leave the allocated pages have the wrong refcount and may be freed wrongly. 2. It wastes memory. For example, if we only receive one packet in a NAPI RX cycle, and then allocate a 2K buffer with otx2_alloc_rbuf() to refill the pool buffers and leave the remain area of the allocated page wasted. On a kernel with 64K page, 62K area is wasted. IMHO it is really unnecessary to implement our own method for the buffers allocate, we can reuse the napi_alloc_frag() to simplify our code. Signed-off-by: NKevin Hao <haokexin@gmail.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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- 26 4月, 2020 1 次提交
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由 Zheng Bin 提交于
Fixes coccicheck warning: drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h:312:2-3: Unneeded semicolon Reported-by: NHulk Robot <hulkci@huawei.com> Signed-off-by: NZheng Bin <zhengbin13@huawei.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 26 3月, 2020 1 次提交
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由 Sunil Goutham 提交于
Since set_rx_mode takes a mutex lock for sending mailbox message to admin function to set the mode, moved logic to a workqueue. Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 24 3月, 2020 6 次提交
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由 Sunil Goutham 提交于
This patch removes wrapper fn()s around mutex_init/lock/unlock. Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Tomasz Duszynski 提交于
VF shares physical link with PF. Admin function (AF) sends notification to PF whenever a link change event happens. PF has to forward the same notification to each of the enabled VF. PF traps START/STOP_RX messages sent by VF to AF to keep track of VF's enabled/disabled state. Signed-off-by: NTomasz Duszynski <tduszynski@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Tomasz Duszynski 提交于
Added ethtool support for VF devices for - Driver stats, Tx/Rx perqueue stats - Set/show Rx/Tx queue count - Set/show Rx/Tx ring sizes - Set/show IRQ coalescing parameters - RSS configuration etc It's the PF which owns the interface, hence VF cannot display underlying CGX interface stats. Except for this rest ethtool support reuses PF's APIs. Signed-off-by: NTomasz Duszynski <tduszynski@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Tomasz Duszynski 提交于
On OcteonTx2 silicon there two two types VFs, VFs that share the physical link with their parent SR-IOV PF and the VFs which work in pairs using internal HW loopback channels (LBK). Except for the underlying Rx/Tx channel mapping from netdev functionality perspective they are almost identical. This patch adds netdev driver support for these VFs. Unlike it's parent PF a VF cannot directly communicate with admin function (AF) and it has to go through PF for the same. The mailbox communication with AF works like 'VF <=> PF <=> AF'. Also functionality wise VF and PF are identical, hence to avoid code duplication PF driver's APIs are resued here for HW initialization, packet handling etc etc ie almost everything. For VF driver to compile as module exported few of the existing PF driver APIs. Signed-off-by: NSubbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: NGeetha sowjanya <gakula@marvell.com> Signed-off-by: NTomasz Duszynski <tduszynski@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Geetha sowjanya 提交于
When FLR is initiated for a VF (PCI function level reset), the parent PF gets a interrupt. PF then sends a message to admin function (AF), which then cleanups all resources attached to that VF. Also handled IRQs triggered when master enable bit is cleared or set for VFs. This handler just clears the transaction pending ie TRPEND bit. Signed-off-by: NGeetha sowjanya <gakula@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sunil Goutham 提交于
Added 'sriov_configure' to enable/disable virtual functions (VFs). Also added handling of mailbox messages from these VFs. Admin function (AF) is the only one with all priviliges to configure HW, alloc resources etc etc, PFs and it's VFs have to request AF via mbox for all their needs. But unlike PFs, their VFs cannot send a mbox request directly. A VF shares a mailbox region with it's parent PF, so VF sends a mailbox msg to PF and then PF forwards it to AF. Then AF after processing sends response to PF which it again forwards to VF. This patch adds support for this 'VF <=> PF <=> AF' mailbox communication. Signed-off-by: NTomasz Duszynski <tduszynski@marvell.com> Signed-off-by: NSubbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: NChristina Jacob <cjacob@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 03 3月, 2020 1 次提交
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由 Geetha sowjanya 提交于
Added mailbox requests to retrieve backpressure IDs from AF and Aura, CQ contexts are configured with these BPIDs. So that when resource levels reach configured thresholds they assert backpressure on the interface which is also mapped to same BPID. Also added support to enable/disable pause frames generation via ethtool. Signed-off-by: NGeetha sowjanya <gakula@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 27 1月, 2020 15 次提交
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由 Sunil Goutham 提交于
Added support to show or configure RSS hash key, indirection table, 2,4 tuple via ethtool. Also added debug msg_level support to dump messages when HW reports errors in packet received or transmitted. Signed-off-by: NPrakash Brahmajyosyula <bprakash@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Christina Jacob 提交于
This patch adds ethtool support for - Driver stats, Tx/Rx perqueue and CGX LMAC stats - Set/show Rx/Tx queue count - Set/show Rx/Tx ring sizes - Set/show IRQ coalescing parameters Signed-off-by: NChristina Jacob <cjacob@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Geetha sowjanya 提交于
Added ndo_get_stats64 which returns stats maintained by HW. Signed-off-by: NGeetha sowjanya <gakula@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sunil Goutham 提交于
Adds TCP segmentation offload (TSO) support. First version of the silicon didn't support TSO offload, for this driver level TSO support is added. Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sunil Goutham 提交于
Adds receive side scaling (RSS) support to distribute pkts/flows across multiple queues. Sets up key, indirection table etc. Also added extraction of HW calculated rxhash and adding to same to SKB ie NETIF_F_RXHASH offload support. Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Geetha sowjanya 提交于
HW reports many errors on the receive and transmit paths. Such as incorrect queue configuration, pkt transmission errors, LMTST instruction errors, transmit queue full etc. These are reported via QINT interrupt. Most of the errors are fatal and needs reinitialization. Also added support to allocate receive buffers in non-atomic context when allocation fails in NAPI context. Signed-off-by: NGeetha sowjanya <gakula@marvell.com> Signed-off-by: NAleksey Makarov <amakarov@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sunil Goutham 提交于
This patch addes support to change interface MTU, MAC address retrieval and config, RX mode ie unicast, multicast and promiscuous. Also added link loopback support Signed-off-by: NTomasz Duszynski <tduszynski@marvell.com> Signed-off-by: NSubbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Linu Cherian 提交于
PF and AF (admin function) shares 64KB of reserved memory region for communication. This region is shared for - Messages sent by PF and responses sent by AF. - Notifications sent by AF and ACKs sent by PF. This patch adds infrastructure to handle notifications sent by AF and adds handlers to process them. One of the main usecase of notifications from AF is physical link changes. So this patch adds registration of PF with AF to receive link status change notifications and also adds the handler for that notification. Signed-off-by: NLinu Cherian <lcherian@marvell.com> Signed-off-by: NTomasz Duszynski <tduszynski@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sunil Goutham 提交于
This patch adds the packet transmission support. For a given skb prepares send queue descriptors (SQEs) and pushes them to HW. Here driver doesn't maintain it's own SQ rings, SQEs are pushed to HW using a silicon specific operations called LMTST. From the instuction HW derives the transmit queue number and queues the SQE to that queue. These LMTST instructions are designed to avoid queue maintenance in SW and lockless behavior ie when multiple cores are trying to add SQEs to same queue then HW will takecare of serialization, no need for SW to hold locks. Also supports scatter/gather. Co-developed-by: NGeetha sowjanya <gakula@marvell.com> Signed-off-by: NGeetha sowjanya <gakula@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sunil Goutham 提交于
Added receive packet handling (NAPI) support, error stats, RX_ALL capability config option to passon error pkts to stack upon user request. In subsequent patches these error stats will be added to ethttool. Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sunil Goutham 提交于
Completion queue (CQ) is the one with which HW notifies SW on a packet reception or transmission. Each of the RQ and SQ are mapped to a unique CQ and again both CQs are mapped to same interrupt ie the CINT. So that each core has one interrupt source in whose handler both Rx and Tx notifications are processed. Also - Registered a NAPI handler for the CINT. - Setup coalescing parameters. - IRQ affinity hints etc Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sunil Goutham 提交于
This patch does the initialization of all queues ie the receive buffer pools, receive and transmit queues, completion or notification queues etc. Allocates all required resources (eg transmit schedulers, receive buffers etc) and configures them for proper functioning of queues. Also sets up receive queue's RED dropping levels. Co-developed-by: NGeetha sowjanya <gakula@marvell.com> Signed-off-by: NGeetha sowjanya <gakula@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sunil Goutham 提交于
For a PF to function as a NIC, NPA (for Rx buffers, Tx descriptors etc) and NIX (for rcv, send and completion queues) are the minimum resources needed. So request admin function (AF) to attach one each of NIX and NPA block LFs (local functions). Only AF can configure a LF's contexts, so request AF to allocate memory for NPA aura/pool and NIX RQ/SQ/CQ HW contexts. Upon receiving response, save some of the HW constants like number of pointers per stack page, size of send queue buffer (SQBs, where SQEs are queued by HW) e.t.c which are later used to initialize queues. A HW context here is like a state machine maintained for a descriptor queue. eg size, head/tail pointers, irq etc etc. HW maintains this in memory. Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sunil Goutham 提交于
In the resource virtualization unit (RVU) each of the PF and AF (admin function) share a 64KB of reserved memory region for communication. This patch initializes PF <=> AF mailbox IRQs, registers handlers for processing these communication messages. Also adds support to process these messages in both directions ie responses to PF initiated DOWN (PF => AF) messages and AF initiated UP messages (AF => PF). Mbox communication APIs and message formats are defined in AF driver (drivers/net/ethernet/marvell/octeontx2/af), mbox.h from AF driver is included here to avoid duplication. Signed-off-by: NGeetha sowjanya <gakula@marvell.com> Signed-off-by: NChristina Jacob <cjacob@marvell.com> Signed-off-by: NSubbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: NAleksey Makarov <amakarov@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sunil Goutham 提交于
This patch adds template for the Marvell's OcteonTX2 network controller's physical function driver. Just the probe, PCI specific initialization and netdev registration. Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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