1. 27 3月, 2009 1 次提交
  2. 24 3月, 2009 16 次提交
    • G
      KVM: Report IRQ injection status to userspace. · 4925663a
      Gleb Natapov 提交于
      IRQ injection status is either -1 (if there was no CPU found
      that should except the interrupt because IRQ was masked or
      ioapic was misconfigured or ...) or >= 0 in that case the
      number indicates to how many CPUs interrupt was injected.
      If the value is 0 it means that the interrupt was coalesced
      and probably should be reinjected.
      Signed-off-by: NGleb Natapov <gleb@redhat.com>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      4925663a
    • A
      x86: Add EFER descriptions for FFXSR · d2062693
      Alexander Graf 提交于
      AMD k10 includes support for the FFXSR feature, which leaves out
      XMM registers on FXSAVE/FXSAVE when the EFER_FFXSR bit is set in
      EFER.
      
      The CPUID feature bit exists already, but the EFER bit is missing
      currently, so this patch adds it to the list of known EFER bits.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      CC: Joerg Roedel <joerg.roedel@amd.com>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      d2062693
    • A
      KVM: Avoid using CONFIG_ in userspace visible headers · 91b2ae77
      Avi Kivity 提交于
      Kconfig symbols are not available in userspace, and are not stripped by
      headers-install.  Avoid their use by adding #defines in <asm/kvm.h> to
      suit each architecture.
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      91b2ae77
    • A
      KVM: MMU: Rename "metaphysical" attribute to "direct" · f6e2c02b
      Avi Kivity 提交于
      This actually describes what is going on, rather than alerting the reader
      that something strange is going on.
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      f6e2c02b
    • A
      KVM: Move struct kvm_pio_request into x86 kvm_host.h · 1c08364c
      Avi Kivity 提交于
      This is an x86 specific stucture and has no business living in common code.
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      1c08364c
    • M
      KVM: PIT: provide an option to disable interrupt reinjection · 52d939a0
      Marcelo Tosatti 提交于
      Certain clocks (such as TSC) in older 2.6 guests overaccount for lost
      ticks, causing severe time drift. Interrupt reinjection magnifies the
      problem.
      
      Provide an option to disable it.
      
      [avi: allow room for expansion in case we want to disable reinjection
            of other timers]
      Signed-off-by: NMarcelo Tosatti <mtosatti@redhat.com>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      52d939a0
    • I
      KVM: introduce kvm_read_guest_virt, kvm_write_guest_virt · 77c2002e
      Izik Eidus 提交于
      This commit change the name of emulator_read_std into kvm_read_guest_virt,
      and add new function name kvm_write_guest_virt that allow writing into a
      guest virtual address.
      Signed-off-by: NIzik Eidus <ieidus@redhat.com>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      77c2002e
    • M
      KVM: VMX: initialize TSC offset relative to vm creation time · 53f658b3
      Marcelo Tosatti 提交于
      VMX initializes the TSC offset for each vcpu at different times, and
      also reinitializes it for vcpus other than 0 on APIC SIPI message.
      
      This bug causes the TSC's to appear unsynchronized in the guest, even if
      the host is good.
      
      Older Linux kernels don't handle the situation very well, so
      gettimeofday is likely to go backwards in time:
      
      http://www.mail-archive.com/kvm@vger.kernel.org/msg02955.html
      http://sourceforge.net/tracker/index.php?func=detail&aid=2025534&group_id=180599&atid=893831
      
      Fix it by initializating the offset of each vcpu relative to vm creation
      time, and moving it from vmx_vcpu_reset to vmx_vcpu_setup, out of the
      APIC MP init path.
      Signed-off-by: NMarcelo Tosatti <mtosatti@redhat.com>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      53f658b3
    • A
      KVM: MMU: Segregate mmu pages created with different cr4.pge settings · 2f0b3d60
      Avi Kivity 提交于
      Don't allow a vcpu with cr4.pge cleared to use a shadow page created with
      cr4.pge set; this might cause a cr3 switch not to sync ptes that have the
      global bit set (the global bit has no effect if !cr4.pge).
      
      This can only occur on smp with different cr4.pge settings for different
      vcpus (since a cr4 change will resync the shadow ptes), but there's no
      cost to being correct here.
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      2f0b3d60
    • A
      KVM: MMU: Inherit a shadow page's guest level count from vcpu setup · a770f6f2
      Avi Kivity 提交于
      Instead of "calculating" it on every shadow page allocation, set it once
      when switching modes, and copy it when allocating pages.
      
      This doesn't buy us much, but sets up the stage for inheriting more
      information related to the mmu setup.
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      a770f6f2
    • J
      KVM: x86: Virtualize debug registers · 42dbaa5a
      Jan Kiszka 提交于
      So far KVM only had basic x86 debug register support, once introduced to
      realize guest debugging that way. The guest itself was not able to use
      those registers.
      
      This patch now adds (almost) full support for guest self-debugging via
      hardware registers. It refactors the code, moving generic parts out of
      SVM (VMX was already cleaned up by the KVM_SET_GUEST_DEBUG patches), and
      it ensures that the registers are properly switched between host and
      guest.
      
      This patch also prepares debug register usage by the host. The latter
      will (once wired-up by the following patch) allow for hardware
      breakpoints/watchpoints in guest code. If this is enabled, the guest
      will only see faked debug registers without functionality, but with
      content reflecting the guest's modifications.
      
      Tested on Intel only, but SVM /should/ work as well, but who knows...
      
      Known limitations: Trapping on tss switch won't work - most probably on
      Intel.
      
      Credits also go to Joerg Roedel - I used his once posted debugging
      series as platform for this patch.
      Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      42dbaa5a
    • J
      KVM: New guest debug interface · d0bfb940
      Jan Kiszka 提交于
      This rips out the support for KVM_DEBUG_GUEST and introduces a new IOCTL
      instead: KVM_SET_GUEST_DEBUG. The IOCTL payload consists of a generic
      part, controlling the "main switch" and the single-step feature. The
      arch specific part adds an x86 interface for intercepting both types of
      debug exceptions separately and re-injecting them when the host was not
      interested. Moveover, the foundation for guest debugging via debug
      registers is layed.
      
      To signal breakpoint events properly back to userland, an arch-specific
      data block is now returned along KVM_EXIT_DEBUG. For x86, the arch block
      contains the PC, the debug exception, and relevant debug registers to
      tell debug events properly apart.
      
      The availability of this new interface is signaled by
      KVM_CAP_SET_GUEST_DEBUG. Empty stubs for not yet supported archs are
      provided.
      
      Note that both SVM and VTX are supported, but only the latter was tested
      yet. Based on the experience with all those VTX corner case, I would be
      fairly surprised if SVM will work out of the box.
      Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      d0bfb940
    • J
      KVM: VMX: Support for injecting software exceptions · 8ab2d2e2
      Jan Kiszka 提交于
      VMX differentiates between processor and software generated exceptions
      when injecting them into the guest. Extend vmx_queue_exception
      accordingly (and refactor related constants) so that we can use this
      service reliably for the new guest debugging framework.
      Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      8ab2d2e2
    • A
      KVM: SVM: Add VMRUN handler · 3d6368ef
      Alexander Graf 提交于
      This patch implements VMRUN. VMRUN enters a virtual CPU and runs that
      in the same context as the normal guest CPU would run.
      So basically it is implemented the same way, a normal CPU would do it.
      
      We also prepare all intercepts that get OR'ed with the original
      intercepts, as we do not allow a level 2 guest to be intercepted less
      than the first level guest.
      
      v2 implements the following improvements:
      
      - fixes the CPL check
      - does not allocate iopm when not used
      - remembers the host's IF in the HIF bit in the hflags
      
      v3:
      
      - make use of the new permission checking
      - add support for V_INTR_MASKING_MASK
      
      v4:
      
      - use host page backed hsave
      
      v5:
      
      - remove IOPM merging code
      
      v6:
      
      - save cr4 so PAE l1 guests work
      
      v7:
      
      - return 0 on vmrun so we check the MSRs too
      - fix MSR check to use the correct variable
      Acked-by: NJoerg Roedel <joro@8bytes.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      3d6368ef
    • A
      KVM: SVM: Implement GIF, clgi and stgi · 1371d904
      Alexander Graf 提交于
      This patch implements the GIF flag and the clgi and stgi instructions that
      set this flag. Only if the flag is set (default), interrupts can be received by
      the CPU.
      
      To keep the information about that somewhere, this patch adds a new hidden
      flags vector. that is used to store information that does not go into the
      vmcb, but is SVM specific.
      
      I tried to write some code to make -no-kvm-irqchip work too, but the first
      level guest won't even boot with that atm, so I ditched it.
      
      v2 moves the hflags to x86 generic code
      v3 makes use of the new permission helper
      v6 only enables interrupt_window if GIF=1
      Acked-by: NJoerg Roedel <joro@8bytes.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      1371d904
    • A
      KVM: SVM: Move EFER and MSR constants to generic x86 code · 9962d032
      Alexander Graf 提交于
      MSR_EFER_SVME_MASK, MSR_VM_CR and MSR_VM_HSAVE_PA are set in KVM
      specific headers. Linux does have nice header files to collect
      EFER bits and MSR IDs, so IMHO we should put them there.
      
      While at it, I also changed the naming scheme to match that
      of the other defines.
      
      (introduced in v6)
      Acked-by: NJoerg Roedel <joro@8bytes.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      9962d032
  3. 10 3月, 2009 1 次提交
    • T
      percpu: make x86 addr <-> pcpu ptr conversion macros generic · e0100983
      Tejun Heo 提交于
      Impact: generic addr <-> pcpu ptr conversion macros
      
      There's nothing arch specific about x86 __addr_to_pcpu_ptr() and
      __pcpu_ptr_to_addr().  With proper __per_cpu_load and __per_cpu_start
      defined, they'll do the right thing regardless of actual layout.
      
      Move these macros from arch/x86/include/asm/percpu.h to mm/percpu.c
      and allow archs to override it as necessary.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      e0100983
  4. 05 3月, 2009 2 次提交
    • D
      x86, math-emu: fix init_fpu for task != current · ab9e1858
      Daniel Glöckner 提交于
      Impact: fix math-emu related crash while using GDB/ptrace
      
      init_fpu() calls finit to initialize a task's xstate, while finit always
      works on the current task. If we use PTRACE_GETFPREGS on another
      process and both processes did not already use floating point, we get
      a null pointer exception in finit.
      
      This patch creates a new function finit_task that takes a task_struct
      parameter. finit becomes a wrapper that simply calls finit_task with
      current. On the plus side this avoids many calls to get_current which
      would each resolve to an inline assembler mov instruction.
      
      An empty finit_task has been added to i387.h to avoid linker errors in
      case the compiler still emits the call in init_fpu when
      CONFIG_MATH_EMULATION is not defined.
      
      The declaration of finit in i387.h has been removed as the remaining
      code using this function gets its prototype from fpu_proto.h.
      Signed-off-by: NDaniel Glöckner <dg@emlix.com>
      Cc: Suresh Siddha <suresh.b.siddha@intel.com>
      Cc: "Pallipadi Venkatesh" <venkatesh.pallipadi@intel.com>
      Cc: Arjan van de Ven <arjan@infradead.org>
      Cc: Bill Metzenthen <billm@melbpc.org.au>
      LKML-Reference: <E1Lew31-0004il-Fg@mailer.emlix.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      ab9e1858
    • H
      x86: EFI: Back efi_ioremap with init_memory_mapping instead of FIX_MAP · dd39ecf5
      Huang Ying 提交于
      Impact: Fix boot failure on EFI system with large runtime memory range
      
      Brian Maly reported that some EFI system with large runtime memory
      range can not boot. Because the FIX_MAP used to map runtime memory
      range is smaller than run time memory range.
      
      This patch fixes this issue by re-implement efi_ioremap() with
      init_memory_mapping().
      Reported-and-tested-by: NBrian Maly <bmaly@redhat.com>
      Signed-off-by: NHuang Ying <ying.huang@intel.com>
      Cc: Brian Maly <bmaly@redhat.com>
      Cc: Yinghai Lu <yinghai@kernel.org>
      LKML-Reference: <1236135513.6204.306.camel@yhuang-dev.sh.intel.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      dd39ecf5
  5. 04 3月, 2009 1 次提交
  6. 03 3月, 2009 2 次提交
    • P
      x86: set_highmem_pages_init() cleanup · 867c5b52
      Pekka Enberg 提交于
      Impact: cleanup
      
      This patch moves set_highmem_pages_init() to arch/x86/mm/highmem_32.c.
      
      The declaration of the function is kept in asm/numa_32.h because
      asm/highmem.h is included only if CONFIG_HIGHMEM is enabled so we
      can't put the empty static inline function there.
      Signed-off-by: NPekka Enberg <penberg@cs.helsinki.fi>
      LKML-Reference: <1236082212.2675.24.camel@penberg-laptop>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      867c5b52
    • R
      x86-64: seccomp: fix 32/64 syscall hole · 5b101740
      Roland McGrath 提交于
      On x86-64, a 32-bit process (TIF_IA32) can switch to 64-bit mode with
      ljmp, and then use the "syscall" instruction to make a 64-bit system
      call.  A 64-bit process make a 32-bit system call with int $0x80.
      
      In both these cases under CONFIG_SECCOMP=y, secure_computing() will use
      the wrong system call number table.  The fix is simple: test TS_COMPAT
      instead of TIF_IA32.  Here is an example exploit:
      
      	/* test case for seccomp circumvention on x86-64
      
      	   There are two failure modes: compile with -m64 or compile with -m32.
      
      	   The -m64 case is the worst one, because it does "chmod 777 ." (could
      	   be any chmod call).  The -m32 case demonstrates it was able to do
      	   stat(), which can glean information but not harm anything directly.
      
      	   A buggy kernel will let the test do something, print, and exit 1; a
      	   fixed kernel will make it exit with SIGKILL before it does anything.
      	*/
      
      	#define _GNU_SOURCE
      	#include <assert.h>
      	#include <inttypes.h>
      	#include <stdio.h>
      	#include <linux/prctl.h>
      	#include <sys/stat.h>
      	#include <unistd.h>
      	#include <asm/unistd.h>
      
      	int
      	main (int argc, char **argv)
      	{
      	  char buf[100];
      	  static const char dot[] = ".";
      	  long ret;
      	  unsigned st[24];
      
      	  if (prctl (PR_SET_SECCOMP, 1, 0, 0, 0) != 0)
      	    perror ("prctl(PR_SET_SECCOMP) -- not compiled into kernel?");
      
      	#ifdef __x86_64__
      	  assert ((uintptr_t) dot < (1UL << 32));
      	  asm ("int $0x80 # %0 <- %1(%2 %3)"
      	       : "=a" (ret) : "0" (15), "b" (dot), "c" (0777));
      	  ret = snprintf (buf, sizeof buf,
      			  "result %ld (check mode on .!)\n", ret);
      	#elif defined __i386__
      	  asm (".code32\n"
      	       "pushl %%cs\n"
      	       "pushl $2f\n"
      	       "ljmpl $0x33, $1f\n"
      	       ".code64\n"
      	       "1: syscall # %0 <- %1(%2 %3)\n"
      	       "lretl\n"
      	       ".code32\n"
      	       "2:"
      	       : "=a" (ret) : "0" (4), "D" (dot), "S" (&st));
      	  if (ret == 0)
      	    ret = snprintf (buf, sizeof buf,
      			    "stat . -> st_uid=%u\n", st[7]);
      	  else
      	    ret = snprintf (buf, sizeof buf, "result %ld\n", ret);
      	#else
      	# error "not this one"
      	#endif
      
      	  write (1, buf, ret);
      
      	  syscall (__NR_exit, 1);
      	  return 2;
      	}
      Signed-off-by: NRoland McGrath <roland@redhat.com>
      [ I don't know if anybody actually uses seccomp, but it's enabled in
        at least both Fedora and SuSE kernels, so maybe somebody is. - Linus ]
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      5b101740
  7. 02 3月, 2009 5 次提交
    • J
      xen: deal with virtually mapped percpu data · 9976b39b
      Jeremy Fitzhardinge 提交于
      The virtually mapped percpu space causes us two problems:
      
       - for hypercalls which take an mfn, we need to do a full pagetable
         walk to convert the percpu va into an mfn, and
      
       - when a hypercall requires a page to be mapped RO via all its aliases,
         we need to make sure its RO in both the percpu mapping and in the
         linear mapping
      
      This primarily affects the gdt and the vcpu info structure.
      Signed-off-by: NJeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
      Cc: Xen-devel <xen-devel@lists.xensource.com>
      Cc: Gerd Hoffmann <kraxel@redhat.com>
      Cc: Rusty Russell <rusty@rustcorp.com.au>
      Cc: Tejun Heo <htejun@gmail.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      9976b39b
    • J
      x86: add forward decl for tss_struct · 2fb6b2a0
      Jeremy Fitzhardinge 提交于
      Its the correct thing to do before using the struct in a prototype.
      Signed-off-by: NJeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      2fb6b2a0
    • J
      x86: unify chunks of kernel/process*.c · 389d1fb1
      Jeremy Fitzhardinge 提交于
      With x86-32 and -64 using the same mechanism for managing the
      tss io permissions bitmap, large chunks of process*.c are
      trivially unifyable, including:
      
       - exit_thread
       - flush_thread
       - __switch_to_xtra (along with tsc enable/disable)
      
      and as bonus pickups:
      
       - sys_fork
       - sys_vfork
      
      (Note: asmlinkage expands to empty on x86-64)
      Signed-off-by: NJeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      389d1fb1
    • J
      x86-32: use non-lazy io bitmap context switching · db949bba
      Jeremy Fitzhardinge 提交于
      Impact: remove 32-bit optimization to prepare unification
      
      x86-32 and -64 differ in the way they context-switch tasks
      with io permission bitmaps.  x86-64 simply copies the next
      tasks io bitmap into place (if any) on context switch.  x86-32
      invalidates the bitmap on context switch, so that the next
      IO instruction will fault; at that point it installs the
      appropriate IO bitmap.
      
      This makes context switching IO-bitmap-using tasks a bit more
      less expensive, at the cost of making the next IO instruction
      slower due to the extra fault.  This tradeoff only makes sense
      if IO-bitmap-using processes are relatively common, but they
      don't actually use IO instructions very often.
      
      However, in a typical desktop system, the only process likely
      to be using IO bitmaps is the X server, and nothing at all on
      a server.  Therefore the lazy context switch doesn't really win
      all that much, and its just a gratuitious difference from
      64-bit code.
      
      This patch removes the lazy context switch, with a view to
      unifying this code in a later change.
      Signed-off-by: NJeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      db949bba
    • I
      x86, mm: dont use non-temporal stores in pagecache accesses · f1800536
      Ingo Molnar 提交于
      Impact: standardize IO on cached ops
      
      On modern CPUs it is almost always a bad idea to use non-temporal stores,
      as the regression in this commit has shown it:
      
        30d697fa: x86: fix performance regression in write() syscall
      
      The kernel simply has no good information about whether using non-temporal
      stores is a good idea or not - and trying to add heuristics only increases
      complexity and inserts fragility.
      
      The regression on cached write()s took very long to be found - over two
      years. So dont take any chances and let the hardware decide how it makes
      use of its caches.
      
      The only exception is drivers/gpu/drm/i915/i915_gem.c: there were we are
      absolutely sure that another entity (the GPU) will pick up the dirty
      data immediately and that the CPU will not touch that data before the
      GPU will.
      
      Also, keep the _nocache() primitives to make it easier for people to
      experiment with these details. There may be more clear-cut cases where
      non-cached copies can be used, outside of filemap.c.
      
      Cc: Salman Qazi <sqazi@google.com>
      Cc: Nick Piggin <npiggin@suse.de>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      f1800536
  8. 01 3月, 2009 2 次提交
    • I
      Revert "gpu/drm, x86, PAT: PAT support for io_mapping_*" · f5c1aa15
      Ingo Molnar 提交于
      This reverts commit 17581ad8.
      
      Sitsofe Wheeler reported that /dev/dri/card0 is MIA on his EeePC 900
      and bisected it to this commit.
      
      Graphics card is an i915 in an EeePC 900:
      
       00:02.0 VGA compatible controller [0300]:
         Intel Corporation Mobile 915GM/GMS/910GML
           Express Graphics Controller [8086:2592] (rev 04)
      
      ( Most likely the ioremap() of the driver failed and hence the card
        did not initialize. )
      Reported-by: NSitsofe Wheeler <sitsofe@yahoo.com>
      Bisected-by: NSitsofe Wheeler <sitsofe@yahoo.com>
      Cc: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
      Cc: Suresh Siddha <suresh.b.siddha@intel.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      f5c1aa15
    • T
      bootmem, x86: further fixes for arch-specific bootmem wrapping · d0c4f570
      Tejun Heo 提交于
      Impact: fix new breakages introduced by previous fix
      
      Commit c1329375 tried to clean up
      bootmem arch wrapper but it wasn't quite correct.  Before the commit,
      the followings were broken.
      
      * Low level interface functions prefixed with __ ignored arch
        preference.
      
      * reserve_bootmem(...) can't be mapped into
        reserve_bootmem_node(NODE_DATA(0)->bdata, ...) because the node is
        not preference here.  The region specified MUST fall into the
        specified region; otherwise, it will panic.
      
      After the commit,
      
      * If allocation fails for the arch preferred node, it should fallback
        to whatever is available.  Instead, it simply failed allocation.
      
      There are too many internal details to allow generic wrapping and
      still keep things simple for archs.  Plus, all that arch wants is a
      way to prefer certain node over another.
      
      This patch drops the generic wrapping around alloc_bootmem_core() and
      add alloc_bootmem_core() instead.  If necessary, arch can define
      bootmem_arch_referred_node() macro or function which takes all
      allocation information and returns the preferred node.  bootmem
      generic code will always try the preferred node first and then
      fallback to other nodes as usual.
      
      Breakages noted and changes reviewed by Johannes Weiner.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Acked-by: NJohannes Weiner <hannes@cmpxchg.org>
      d0c4f570
  9. 28 2月, 2009 8 次提交
  10. 26 2月, 2009 2 次提交
    • I
      x86: apic: simplify secondary CPU wakeup methods · 1f5bcabf
      Ingo Molnar 提交于
      Impact: cleanup
      
      - rename apic->wakeup_cpu  to apic->wakeup_secondary_cpu, to
        make it apparent that this is an SMP-only method
      
      - handle NULL ->wakeup_secondary_cpus to mean the default INIT
        wakeup sequence - this allows simplification of the APIC
        driver templates.
      
      Cc: Yinghai Lu <yinghai@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      1f5bcabf
    • I
      x86: remove update_apic from x86_quirks, fix · 0917c01f
      Ingo Molnar 提交于
      Impact: build fix
      
      wakeup_secondary_cpu_via_init(), the default platform method for
      booting a secondary CPU, is always used on UP due to probe_32.c,
      if CONFIG_X86_LOCAL_APIC is enabled but SMP is off.
      
      So provide a UP wrapper inline as well.
      
      Cc: Yinghai Lu <yinghai@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      0917c01f