1. 19 11月, 2015 8 次提交
  2. 01 11月, 2015 5 次提交
    • L
      gpio: fix up SPI submenu · 0963670a
      Linus Walleij 提交于
      - Relax dependencies on SPI_MASTER for drivers in the SPI menu
        that already has this dependency.
      - Move out the expander that would be hidden for I2C access if
        SPI_MASTER was not selected. Tentatively create a separate
        menu for this.
      - Move the ZX SoC driver to memory-mapped drivers, this must be
        a mistake and only worked because the system has an SPI master
        enabled at the same time.
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      0963670a
    • L
      gpio: drop surplus I2C dependencies · 269a46f8
      Linus Walleij 提交于
      The I2C expander menu already depends on I2C, drop subdependecies
      on individual drivers. Keep the instances of depends on I2C=y
      though, so these are still restricted to the compiled-in case.
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      269a46f8
    • L
      gpio: drop surplus X86 dependencies · 7768feb0
      Linus Walleij 提交于
      Port-mapped I/O depends on X86 already, so individual drivers need
      not specify this dependency.
      Suggested-by: NVivien Didelot <vivien.didelot@savoirfairelinux.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      7768feb0
    • M
      gpio / ACPI: Allow shared GPIO event to be read via operation region · c103a10f
      Mika Westerberg 提交于
      In Microsoft Surface3 the GPIO detecting lid state is shared between GPIO
      event and operation region. Below is simplied version of the DSDT from
      Surface3 including relevant parts:
      
          Scope (GPO0)
          {
              Name (_AEI, ResourceTemplate ()
              {
                  GpioInt (Edge, ActiveBoth, Shared, PullNone, 0x0000,
                      "\\_SB.GPO0", 0x00, ResourceConsumer, ,
                      )
                      {   // Pin list
                          0x004C
                      }
              })
      
              OperationRegion (GPOR, GeneralPurposeIo, Zero, One)
              Field (GPOR, ByteAcc, NoLock, Preserve)
              {
                  Connection (
                      GpioIo (Shared, PullNone, 0x0000, 0x0000,
                          IoRestrictionNone, "\\_SB.GPO0", 0x00,
                          ResourceConsumer,,)
                          {   // Pin list
                              0x004C
                          }
                  ),
                  HELD,   1
              }
      
              Method (_E4C, 0, Serialized)  // _Exx: Edge-Triggered GPE
              {
                  If ((HELD == One))
                  {
                      ^^LID.LIDB = One
                  }
                  Else
                  {
                      ^^LID.LIDB = Zero
                      Notify (LID, 0x80) // Status Change
                  }
      
                  Notify (^^PCI0.SPI1.NTRG, One) // Device Check
              }
          }
      
      When GPIO 0x4c changes we call ASL method _E4C which tries to read HELD
      field (the same GPIO). This triggers following error on the console:
      
          ACPI Error: Method parse/execution failed [\_SB.GPO0._E4C]
              (Node ffff88013f4b4438), AE_ERROR (20150930/psparse-542)
      
      The error happens because ACPI GPIO operation region handler
      (acpi_gpio_adr_space_handler()) tries to acquire the very same GPIO which
      returns an error (-EBUSY) because the GPIO is already reserved for the GPIO
      event.
      
      Fix this so that we "borrow" the event GPIO if we find the GPIO belongs to
      an event. Allow this only for GPIOs that are read.
      
      To be able to go through acpi_gpio->events list for operation region access
      we need to make sure the list is properly initialized whenever GPIO chip is
      registered.
      
      Link: https://bugzilla.kernel.org/show_bug.cgi?id=106571Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      c103a10f
    • L
      gpio: group port-mapped I/O drivers in a menu · bc6a73bb
      Linus Walleij 提交于
      Create a Kconfig submenu for drivers using X86 port-mapped I/O
      and depend on X86 for this.
      Suggested-by: NMika Westerberg <mika.westerberg@linux.intel.com>
      Cc: William Breathitt Gray <vilhelm.gray@gmail.com>
      Cc: Andreas Bofjall <andreas@gazonk.org>
      Cc: Diego Elio Pettenò <flameeyes@flameeyes.eu>
      Cc: Daniel Krueger <daniel.krueger@systec-electronic.com>
      Cc: Bruno Randolf <br1@einfach.org>
      Cc: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
      Acked-by: NSimon Guinot <simon.guinot@sequanux.org>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      bc6a73bb
  3. 28 10月, 2015 1 次提交
  4. 27 10月, 2015 3 次提交
  5. 26 10月, 2015 1 次提交
    • Y
      gpio: driver for AMD Promontory · 6057d40f
      YD Tseng 提交于
      This patch adds a new GPIO driver for AMD Promontory chip.
      
      This GPIO controller is enumerated by ACPI and the ACPI compliant
      hardware ID is AMDF030.
      
      Change history:
      
      v2: 1. fix coding style
          2. registers renaming
      v3: 1. change include file
          2. fix coding style
          3. remove module_init/exit, add module_platform_driver
          4. remove MODULE_ALIAS
      v4: 1. change TOTAL_GPIO_PINS to PT_TOTAL_GPIO
          2. remove PCI dependency in Kconfig
          3. fix subject line
      Signed-off-by: NYD Tseng <Yd_Tseng@asmedia.com.tw>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      6057d40f
  6. 22 10月, 2015 1 次提交
  7. 19 10月, 2015 1 次提交
  8. 17 10月, 2015 6 次提交
  9. 16 10月, 2015 2 次提交
    • G
      gpio: omap: fix static checker warning · 30cefeac
      Grygorii Strashko 提交于
      This patch fixes below static checker warning by changing
      type of irq field in struct gpio_bank from u16 to int.
      
      drivers/gpio/gpio-omap.c:1191 omap_gpio_probe()
      	warn: assigning (-6) to unsigned variable 'bank->irq'
      
      drivers/gpio/gpio-omap.c
        1188          bank->irq = platform_get_irq(pdev, 0);
        1189          if (bank->irq <= 0) {
      
      bank->irq is u16.
      
        1190                  if (!bank->irq)
        1191                          bank->irq = -ENXIO;
      
      Does not work.
      
        1192                  if (bank->irq != -EPROBE_DEFER)
      
      Does not work.
      
        1193                          dev_err(dev,
        1194                                  "can't get irq resource ret=%d\n", bank->irq);
        1195                  return bank->irq;
        1196          }
      
      Fixes: commit 89d18e3a: "gpio: omap: switch to use platform_get_irq"
      Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      30cefeac
    • L
      gpio: pl061: assign the apropriate handler for irqs · 26ba9cd4
      Linus Walleij 提交于
      The PL061 can handle level IRQs and edge IRQs, however it is
      just utilizing handle_simple_irq() for all IRQs. Inspired by
      Stefan Agners patch to vf610, this assigns the right handler
      depending on what type is set up, and after this
      handle_bad_irq() is only used as default and if the type is
      not specified, as is done in the OMAP driver: defining the
      IRQ type is really not optional for this driver.
      
      The interrupt handler was just writing the interrupt clearing
      register for all lines that were high when entering the handling
      loop, this is wrong: that register is only supposed to be
      written (on a per-line basis) for edge IRQs, so this ACK
      was moved to the .irq_ack() callback as is proper.
      
      Tested with PL061 on the ARM RealView PB11MPCore and the
      MMC/SC card detect GPIO.
      
      Cc: Jonas Gorski <jogo@openwrt.org>
      Cc: Stefan Agner <stefan@agner.ch>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      26ba9cd4
  10. 15 10月, 2015 2 次提交
  11. 14 10月, 2015 1 次提交
  12. 05 10月, 2015 6 次提交
  13. 03 10月, 2015 3 次提交
    • T
      gpio: pca953x: Add TI TCA9539 support · 2db8aba8
      Thierry Reding 提交于
      The TCA9539 is almost identical to the PCA9555 and software-compatible
      with this driver. It exposes 16 general purpose I/O pins in two 8-bit
      configurations.
      Signed-off-by: NThierry Reding <treding@nvidia.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      2db8aba8
    • J
      gpio: max730x: eliminate double free · 7474f23d
      Julia Lawall 提交于
      The function __max730x_remove is called from the remove functions of
      drivers/gpio/gpio-max7300.c and drivers/gpio/gpio-max7301.c.  In both
      cases, the probe function allocates ts using devm_kzalloc.  Explicitly
      freeing such a value with kfree will cause a double free.
      Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr>
      Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      7474f23d
    • G
      gpio: omap: convert to use generic irq handler · 450fa54c
      Grygorii Strashko 提交于
      This patch converts TI OMAP GPIO driver to use generic irq handler
      instead of chained IRQ handler. This way OMAP GPIO driver will be
      compatible with RT kernel where it will be forced thread IRQ handler
      while in non-RT kernel it still will be executed in HW IRQ context.
      As part of this change the IRQ wakeup configuration is applied to
      GPIO Bank IRQ as it now will be under control of IRQ PM Core during
      suspend.
      
      There are also additional benefits:
       - on-RT kernel there will be no complains any more about PM runtime usage
         in atomic context  "BUG: sleeping function called from invalid context";
       - GPIO bank IRQs will appear in /proc/interrupts and its usage statistic
          will be  visible;
       - GPIO bank IRQs could be configured through IRQ proc_fs interface and,
         as result, could be a part of IRQ balancing process if needed;
       - GPIO bank IRQs will be under control of IRQ PM Core during
         suspend to RAM.
      
      Disadvantage:
       - additional runtime overhed as call chain till
         omap_gpio_irq_handler() will be longer now
       - necessity to use wa_lock in omap_gpio_irq_handler() to W/A warning
         in handle_irq_event_percpu()
         WARNING: CPU: 1 PID: 35 at kernel/irq/handle.c:149 handle_irq_event_percpu+0x51c/0x638()
      
      This patch doesn't fully follows recommendations provided by Sebastian
      Andrzej Siewior [1], because It's required to go through and check all
      GPIO IRQ pin states as fast as possible and pass control to handle_level_irq
      or handle_edge_irq. handle_level_irq or handle_edge_irq will perform actions
      specific for IRQ triggering type and wakeup corresponding registered
      threaded IRQ handler (at least it's expected to be threaded).
      IRQs can be lost if handle_nested_irq() will be used, because excecution
      time of some pin specific GPIO IRQ handler can be very significant and
      require accessing ext. devices (I2C).
      
      Idea of such kind reworking was also discussed in [2].
      
      [1] http://www.spinics.net/lists/linux-omap/msg120665.html
      [2] http://www.spinics.net/lists/linux-omap/msg119516.htmlTested-by: NTony Lindgren <tony@atomide.com>
      Tested-by: NAustin Schuh <austin@peloton-tech.com>
      Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>
      Acked-by: NSantosh Shilimkar <ssantosh@kernel.org>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      450fa54c