1. 25 2月, 2012 5 次提交
  2. 11 2月, 2012 1 次提交
  3. 10 2月, 2012 10 次提交
  4. 09 2月, 2012 1 次提交
  5. 04 2月, 2012 2 次提交
  6. 03 2月, 2012 10 次提交
  7. 27 1月, 2012 5 次提交
  8. 25 1月, 2012 6 次提交
    • S
      serial: Fix wakeup init logic to speed up startup · 77359835
      Simon Glass 提交于
      The synchronize_rcu() call resulting from making every serial driver
      wake-up capable (commit b3b708fa) slows boot down on my Tegra2x system
      (with CONFIG_PREEMPT disabled).
      
      But this is avoidable since it is the device_set_wakeup_enable() and then
      subsequence disable which causes the delay. We might as well just make
      the device wakeup capable but not actually enable it for wakeup until
      needed.
      
      Effectively the current code does this:
      
      	device_set_wakeup_capable(dev, 1);
      	device_set_wakeup_enable(dev, 1);
      	device_set_wakeup_enable(dev, 0);
      
      We can just drop the last two lines.
      
      Before this change my boot log says:
      [    0.227062] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
      [    0.702928] serial8250.0: ttyS0 at MMIO 0x70006040 (irq = 69) is a Tegra
      
      after:
      [    0.227264] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
      [    0.227983] serial8250.0: ttyS0 at MMIO 0x70006040 (irq = 69) is a Tegra
      
      for saving of 450ms.
      Suggested-by: NRafael J. Wysocki <rjw@sisk.pl>
      Acked-by: NRafael J. Wysocki <rjw@sisk.pl>
      Signed-off-by: NSimon Glass <sjg@chromium.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      77359835
    • R
      serial: amba-pl011: lock console writes against interrupts · ef605fdb
      Rabin Vincent 提交于
      Protect against pl011_console_write() and the interrupt for
      the console UART running concurrently on different CPUs.
      
      Otherwise the console_write could spin for a long time
      waiting for the UART to become not busy, while the other
      CPU continuously services UART interrupts and keeps the
      UART busy.
      
      The checks for sysrq and oops_in_progress are taken
      from 8250.c.
      
      Cc: stable <stable@vger.kernel.org>
      Signed-off-by: NRabin Vincent <rabin.vincent@stericsson.com>
      Reviewed-by: NSrinidhi Kasagar <srinidhi.kasagar@stericsson.com>
      Reviewed-by: NBibek Basu <bibek.basu@stericsson.com>
      Reviewed-by: NShreshtha Kumar Sahu <shreshthakumar.sahu@stericsson.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      ef605fdb
    • S
      amba-pl011: do not disable RTS during shutdown · d8d8ffa4
      Shreshtha Kumar Sahu 提交于
      In present driver, shutdown clears RTS and DTR in CR register. But the
      documentation "Documentation/serial/driver" suggests not to disable
      RTS and DTR in shutdown(). Also RTS and DTR is preserved between shutdown
      and startup calls, i.e. these are restored in startup if they were enabled
      while doing shutdown. So that if RTS and DTR are set using pl011_set_mctrl
      then it should continue even after shutdown->startup sequence.
      For throttling/unthrottling user should call pl011_set_mctrl.
      Signed-off-by: NShreshtha Kumar Sahu <shreshthakumar.sahu@stericsson.com>
      Acked-by: NLinus Walleij <linus.walleij@linaro.org>
      Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      d8d8ffa4
    • P
      tty: serial: OMAP: transmit FIFO threshold interrupts don't wake the chip · 43cf7c0b
      Paul Walmsley 提交于
      It seems that when the transmit FIFO threshold is reached on OMAP
      UARTs, it does not result in a PRCM wakeup.  This appears to be a
      silicon bug.  This means that if the MPU powerdomain is in a low-power
      state, the MPU will not be awakened to refill the FIFO until the next
      interrupt from another device.
      
      The best solution, at least for the short term, would be for the OMAP
      serial driver to call a OMAP subarchitecture function to prevent the
      MPU powerdomain from entering a low power state while the FIFO has
      data to transmit.  However, we no longer have a clean way to do this,
      since patches that add platform_data function pointers have been
      deprecated by the OMAP maintainer.  So we attempt to work around this
      as well.  The workarounds depend on the setting of CONFIG_CPU_IDLE.
      
      When CONFIG_CPU_IDLE=n, the driver will now only transmit one byte at
      a time.  This causes the transmit FIFO threshold interrupt to stay
      active until there is no more data to be sent.  Thus, the MPU
      powerdomain stays on during transmits.  Aside from that energy
      consumption penalty, each transmitted byte results in a huge number of
      UART interrupts -- about five per byte.  This wastes CPU time and is
      quite inefficient, but is probably the most expedient workaround in
      this case.
      
      When CONFIG_CPU_IDLE=y, there is a slightly more direct workaround:
      the PM QoS constraint can be abused to keep the MPU powerdomain on.
      This results in a normal number of interrupts, but, similar to the
      above workaround, wastes power by preventing the MPU from entering
      WFI.
      
      Future patches are planned for the 3.4 merge window to implement more
      efficient, but also more disruptive, workarounds to these problems.
      
      DMA operation is unaffected by this patch.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
      Cc: Govindraj Raja <govindraj.r@ti.com>
      Cc: Kevin Hilman <khilman@ti.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      43cf7c0b
    • P
      tty: serial: OMAP: ensure FIFO levels are set correctly in non-DMA mode · 0a697b22
      Paul Walmsley 提交于
      Ensure FIFO levels are set correctly in non-DMA mode (the default).
      This patch will cause a receive FIFO threshold interrupt to be raised when
      there is at least one byte in the RX FIFO.  It will also cause a transmit
      FIFO threshold interrupt when there is only one byte remaining in the TX
      FIFO.
      
      These changes fix the receive interrupt problem and part of the
      transmit interrupt problem.  A separate set of issues must be worked
      around for the transmit path to have a basic level of functionality; a
      subsequent patch will address these.
      
      DMA operation is unaffected by this patch.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
      Cc: Govindraj Raja <govindraj.r@ti.com>
      Cc: Kevin Hilman <khilman@ti.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      0a697b22
    • S
      omap-serial: make serial_omap_restore_context depend on CONFIG_PM_RUNTIME · b5148856
      Shubhrajyoti D 提交于
      The function serial_omap_restore_context is called only from
      serial_omap_runtime_resume which depends on CONFIG_PM_RUNTIME. Make
      serial_omap_restore_context also compile conditionally.
      
      if CONFIG_PM_RUNTIME is not defined below warn may be seen.
      
        LD      net/xfrm/built-in.o
      drivers/tty/serial/omap-serial.c:1524: warning: 'serial_omap_restore_context' defined but not used
        CC      drivers/tty/vt/selection.o
      Acked-by: NGovindraj.R <govindraj.raja@ti.com>
      Signed-off-by: NShubhrajyoti D <shubhrajyoti@ti.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      b5148856