- 22 11月, 2014 1 次提交
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由 Arnaud Ebalard 提交于
What was done by Sebastian in 264a05e1 ("ARM: mvebu: armada-xp: Add node alias to pinctrl and add base address") and 01c43422 ("ARM: mvebu: armada-xp: Use pinctrl node alias") can also be done for Armada 370, i.e. - Rename Armada 370 pinctrl node to pin-ctrl with its address encoded - Add a node alias to access the pinctrl node easily. - use the newly available alias in existing Armada 370 .dts files We can even go a bit further by putting the pinctrl node definition in armada-370-xp.dtsi, with only its reg property defined. This allows us to then also use the newly defined node alias in armada-xp.dtsi, armada-370.dtsi. Suggested-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Suggested-by: NAndrew Lunn <andrew@lunn.ch> Acked-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NArnaud Ebalard <arno@natisbad.org> Link: https://lkml.kernel.org/r/b54eb45e5242728aace3ce8aef2eae4251f8dea3.1416613429.git.arno@natisbad.orgSigned-off-by: NJason Cooper <jason@lakedaemon.net>
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- 18 8月, 2014 1 次提交
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由 Ezequiel Garcia 提交于
This commit adds the required pin muxing for the network interfaces and the MDIO interface to be properly initialized. For instance, this makes it possible for a bootloader to initialize and access the network interfaces. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: NAndrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1407759281-11513-3-git-send-email-ezequiel.garcia@free-electrons.comSigned-off-by: NJason Cooper <jason@lakedaemon.net>
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- 26 4月, 2014 1 次提交
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由 Thomas Petazzoni 提交于
Now that the Armada 370/375/38x/XP SoC-level Device Tree files have the proper "clocks" property in their UART controllers node, it is no longer useful to have the clock-frequency property defined in the board-level Device Tree files. Therefore, this commit gets rid of all the useless 'clock-frequency' properties. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1397806908-7550-5-git-send-email-thomas.petazzoni@free-electrons.comSigned-off-by: NJason Cooper <jason@lakedaemon.net>
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- 12 2月, 2014 1 次提交
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由 Thomas Petazzoni 提交于
Instead of harcoding 0 and 1 for the gpio specifications in the Armada 370/XP boards, use the <dt-bindings/gpio/gpio.h> header file and its GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW definitions. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 24 11月, 2013 2 次提交
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由 Ezequiel Garcia 提交于
The Armada 370 Mirabox has a NAND flash, so enable it in the devicetree and add the partitions as prepared in the factory images. In order to skip the driver's custom device detection and use only ONFI detection, the "marvell,keep-config" parameter is used. This is needed because we have no support for setting the timings parameters yet. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Jason Cooper 提交于
Generally, power LEDs should indicate when power is applied, and go out once power is removed. _Not_ annoy the developer with migraine-inducing blinking reminicent of some badly animated television series designed to sell sugar to children. On a more serious note, most of these OS-specific properties aren't necessary and should be removed. I left two that are legitimately tying disk LEDs to disk activity. Other than that, we keep the state the bootloader left them in until userspace changes the state via sysfs. Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 06 8月, 2013 4 次提交
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由 Ezequiel Garcia 提交于
Now that mbus has been added to the device tree, it's possible to move the PCIe nodes out of internal registers, placing it directly below the mbus. This is a more accurate representation of the hardware. Moving the PCIe nodes, we now need to introduce an extra cell to encode the window target ID and attribute. Since this depends on the PCIe port, we split the ranges translation entries, to correspond to each MBus window. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Ezequiel Garcia 提交于
In order to access the SoC BootROM, we need to declare a mapping (through a ranges property). The mbus driver will use this property to allocate a suitable address decoding window. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Ezequiel Garcia 提交于
The Armada 370/XP SoC family has a completely configurable address space handled by the MBus controller. This patch introduces the device tree layout of MBus, making the 'soc' node as mbus-compatible. Since every peripheral/controller is a child of this 'soc' node, this makes all of them sit behind the mbus, thus describing the hardware accurately. A translation entry has been added for the internal-regs mapping. This can't be done in the common armada-370-xp.dtsi because A370 and AXP have different addressing width. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Ezequiel Garcia 提交于
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 15 5月, 2013 1 次提交
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由 Simon Baatz 提交于
In order to prepare the switch to the standard MMC device tree parser for mvsdio, adapt all current uses of mvsdio in the dts files to the standard format. Signed-off-by: NSimon Baatz <gmbnomis@gmail.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 15 4月, 2013 3 次提交
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由 Gregory CLEMENT 提交于
Introduce a 'internal-regs' subnode, under which all devices are moved. This is not really needed for now, but will be for the mvebu-mbus driver. This generates a lot of code movement since it's indenting by one more tab all the devices. So it was a good opportunity to fix all the bad indentation. Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Gregory CLEMENT 提交于
This conversion will allow to keep 32 bits addresses for the internal registers whereas the memory of the system will be 64 bits. Later it will also ease the move of the mvebu-mbus driver to the device tree support. Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Thomas Petazzoni 提交于
The Globalscale Mirabox platform uses one PCIe interface for an available mini-PCIe slot, and the other PCIe interface for an internal USB 3.0 controller. We add the necessary Device Tree informations to enable those two interfaces. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 31 3月, 2013 1 次提交
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由 Ryan Press 提交于
Add the three external LED definitions to the device tree file on the Mirabox. The Mirabox user guide calls out one as a power LED, and the other two are defined for WiFi, but as the current mwifiex drivers don't have LED support, we make them status LEDs. These have been tested working by writing to the appropriate /sys/class/leds trigger. Signed-off-by: NRyan Press <ryan@presslab.us> Tested-by: NNeil Greatorex <neil@fatboyfat.co.uk> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 29 3月, 2013 1 次提交
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由 Ryan Press 提交于
The previous configuration used the wrong "clk" pin. Without this change mv_sdio worked because the bootloader would set the pin up, but with a bootloader that does not set the pin, mv_sdio fails to detect any card. I have tested this change using a mwifiex_sdio wireless network adapter over the SDIO interface. Signed-off-by: NRyan Press <ryan@presslab.us> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 12 3月, 2013 1 次提交
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由 Gregory CLEMENT 提交于
The Globalscale Mirabox platform can be connected to the JTAG/GPIO box through the Multi-IO port. The GPIO box use the NXP PCA9505 I/O port expansion IC to provide 40-bit parallel input/output GPIOs. This patch enable the use of this expander on the Mirabox. Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 01 3月, 2013 2 次提交
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由 Ezequiel Garcia 提交于
This patch activates every USB port provided by each SoC. Except for Armada XP Openblocks AX3-4 board, where we enable only the first two USB ports until we have more information on the third one usage. Cc: Lior Amsalem <alior@marvell.com> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Tested-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org> Tested-by: NFlorian Fainelli <florian@openwrt.org> Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Thomas Petazzoni 提交于
The Globalscale Mirabox uses the SDIO interface of the Armada 370 to connect to a Wifi/Bluetooth SD8787 chip, so we enable the SDIO interface of this board in its Device Tree file. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 21 11月, 2012 1 次提交
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由 Thomas Petazzoni 提交于
The mvneta driver for the Marvell Armada 370/XP Ethernet devices has gained proper clock framework integration, and the corresponding Device Tree nodes now have a correct 'clocks' pointer. The 'clock-frequency' properties in the various .dts files for Armada 370/XP boards have therefore become useless. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
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- 16 11月, 2012 1 次提交
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由 Thomas Petazzoni 提交于
The Globalscale Mirabox platform has two Ethernet interfaces, connected to the SoC with a RGMII interface. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
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- 14 11月, 2012 1 次提交
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由 Gregory CLEMENT 提交于
This platform, available from Globalscale has an Armada 370. For now, only the serial port is supported. Support for network, USB and other peripherals will be added as drivers for them become available for Armada 370 in mainline. Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> --- This is 3.8 material. Changes from original version posted by Gregory: * Renamed .dts file to armada-370-mirabox.dts * Change compatible string to 'globalscale,mirabox' * Remove compatible string from armada-370-xp.c * Removed references to MBX0001
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- 10 7月, 2012 1 次提交
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由 Thomas Petazzoni 提交于
[ben.dooks@codethink.co.uk: ensure error check on of_property_read_u32] [ben.dooks@codethink.co.uk: use mpic address instead of bus-unit's ] [ben.dooks@codethink.co.uk: BUG_ON() if the of_iomap() fails for mpic] [ben.dooks@codethink.co.uk: move mpic per-cpu register base ] [ben.dooks@codethink.co.uk: number fetch should use irqd_to_hwirq()] Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NLior Amsalem <alior@marvell.com> Signed-off-by: NBen Dooks <ben.dooks@codethink.co.uk> Acked-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NYehuda Yitschak <yehuday@marvell.com> Tested-by: NLior Amsalem <alior@marvell.com>
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