- 05 3月, 2013 1 次提交
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由 Stephen Warren 提交于
BCM2835-ARM-Peripherals.pdf states that the I2C module's input clock is nominally 150MHz, and that value is currently reflected in bcm2835.dtsi. However, practical measurements show that the rate is actually 250MHz, and this agrees with various downstream kernels. Switch the I2C clock's frequency to 250MHz so that the generated bus clock rate is accurate. Signed-off-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 15 1月, 2013 3 次提交
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由 Stephen Warren 提交于
Both clock nodes in the current device tree are named "clock" and hence end up being the same node. Rename the nodes to different names to avoid this. In fact, fixed-clock uses the node name as the clock name, so name the nodes after the clock they represent. Move the clocks into a "clocks" sub-node to group them and avoid any possible naming conflicts with other nodes also named after the device type. Signed-off-by: NStephen Warren <swarren@wwwdotorg.org>
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由 Stephen Warren 提交于
The BCM2835 has 3 identical I2C controllers. Instantiate them all in the SoC .dtsi file, and enable the relevant two in the Raspberry Pi board .dts file. Note that on the Raspberry Pi Model B revision 1, I2C0 is connected to the general-purpose expansion header, and I2C1 is connected to the camera connector. Revision 2 of the board swaps these assignments:-( Signed-off-by: NStephen Warren <swarren@wwwdotorg.org>
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由 Stephen Warren 提交于
Add the SDHCI device node to the SoC DT file. Add a dummy fixed-clock to satisfy the SDHCI driver's clock lookup; eventually this should be replaced by a real clock implementation. Add board specific properties to the Raspberry Pi board file. Signed-off-by: NStephen Warren <swarren@wwwdotorg.org>
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- 26 10月, 2012 2 次提交
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由 Stephen Warren 提交于
Enable GPIO and pinctrl in Kconfig. Add required <mach/gpio.h> for gpiolib. Instantiate the BCM2835 GPIO module in bcm2835.dtsi. Add a pinctrl definition to bcm2835-rpi-b.dts that sets up all of the board's required pinmux configuration. GPIO aren't specified; that's left to gpio_request(). Signed-off-by: NStephen Warren <swarren@wwwdotorg.org> Acked-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Stephen Warren 提交于
Implement the machine restart hook using the SoC's watchdog timer module. To support this, define a DT binding for the watchdog module, and add it to the device tree. The downstream rpi-split branch contains a full watchdog timer driver implementation, which also implements the restart hook. However, the restart function is largely separate from the watchdog driver, so for simplicity, the restart hook is implemented here directly in the main machine source file. Overall structure (separate setup/restart) functions derived from the picoxcell ARM support. Watchdog register IO sequence taken from code by Simon Arlott. Note that the watchdog module is not documented in BCM2835-ARM-Peripherals.pdf. Signed-off-by: NStephen Warren <swarren@wwwdotorg.org>
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- 20 9月, 2012 4 次提交
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由 Simon Arlott 提交于
This patch was extracted from git://github.com/lp0/linux.git branch rpi-split as of 2012/09/08, and modified as follows: * s/bcm2708/bcm2835/. * Modified device tree vendor prefix. * Modified UART DT node to use a unit-address to create unique UART node names, rather than using non-type names "uart0" and "uart1". Note that UART 1 (the Broadcom "mini UART") is not yet present, but I'm naming the DT node in anticipation that it will be added. Signed-off-by: NChris Boot <bootc@bootc.net> Signed-off-by: NSimon Arlott <simon@fire.lp0.eu> Signed-off-by: NDom Cobley <popcornmix@gmail.com> Signed-off-by: NDom Cobley <dc4@broadcom.com> Signed-off-by: NStephen Warren <swarren@wwwdotorg.org> Acked-by: NArnd Bergmann <arnd@arndb.de>
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由 Simon Arlott 提交于
The System Timer peripheral provides four 32-bit timer channels and a single 64-bit free running counter. Each channel has an output compare register, which is compared against the 32 least significant bits of the free running counter values, and generates an interrupt. Timer 3 is used as the Linux timer. The BCM2835 also contains an SP804-based timer module. However, it apparently has significant differences from the standard SP804 IP block, and Broadcom's documentation recommends using the system timer instead. This patch was extracted from git://github.com/lp0/linux.git branch rpi-split as of 2012/09/08, and modified as follows: * s/bcm2708/bcm2835/. * Modified device tree vendor prefix. * Moved to drivers/clocksource/. This looks like the desired location for such code now. * Added DT binding docs. * Moved struct sys_timer bcm2835_timer into time.c to encapsulate it more. * Simplified bcm2835_time_init() to find one matching node and operate on it, rather than looping over all matching nodes. This seems more consistent with other clocksource code. * Simplified bcm2835_time_init() using of_iomap(). * Renamed struct bcm2835_timer.index to match_mask to better represent its purpose. * s/printk(PR_INFO/pr_info(/ Signed-off-by: NChris Boot <bootc@bootc.net> Signed-off-by: NSimon Arlott <simon@fire.lp0.eu> Signed-off-by: NDom Cobley <popcornmix@gmail.com> Signed-off-by: NDom Cobley <dc4@broadcom.com> Signed-off-by: NStephen Warren <swarren@wwwdotorg.org> Acked-by: NArnd Bergmann <arnd@arndb.de>
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由 Simon Arlott 提交于
The BCM2835 contains a custom interrupt controller, which supports 72 interrupt sources using a 2-level register scheme. The interrupt controller, or the HW block containing it, is referred to occasionally as "armctrl" in the SoC documentation, hence the symbol naming in the code. This patch was extracted from git://github.com/lp0/linux.git branch rpi-split as of 2012/09/08, and modified as follows: * s/bcm2708/bcm2835/. * Modified device tree vendor prefix. * Moved implementation to drivers/irchip/. * Added devicetree documentation, and hence removed list of IRQs from bcm2835.dtsi. * Changed shift in MAKE_HWIRQ() and HWIRQ_BANK() from 8 to 5 to reduce the size of the hwirq space, and pass the total size of the hwirq space to irq_domain_add_linear(), rather than just the number of valid hwirqs; the two are different due to the hwirq space being sparse. * Added the interrupt controller DT node to the top-level of the DT, rather than nesting it inside a /axi node. Hence, changed the reg value since /axi had a ranges property. This seems simpler to me, but I'm not sure if everyone will like this change or not. * Don't set struct irq_domain_ops.map = irq_domain_simple_map, hence removing the need to patch include/linux/irqdomain.h or kernel/irq/irqdomain.c. * Simplified armctrl_of_init() using of_iomap(). * Removed unused IS_VALID_BANK()/IS_VALID_IRQ() macros. * Renamed armctrl_handle_irq() to prevent possible symbol clashes. * Made armctrl_of_init() static. * Removed comment "Each bank is registered as a separate interrupt controller" since this is no longer true. * Removed FSF address from license header. * Added my name to copyright header. Signed-off-by: NChris Boot <bootc@bootc.net> Signed-off-by: NSimon Arlott <simon@fire.lp0.eu> Signed-off-by: NDom Cobley <popcornmix@gmail.com> Signed-off-by: NDom Cobley <dc4@broadcom.com> Signed-off-by: NStephen Warren <swarren@wwwdotorg.org> Acked-by: NArnd Bergmann <arnd@arndb.de>
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由 Simon Arlott 提交于
The BCM2835 is an ARM SoC from Broadcom. This patch adds very basic support for this SoC. http://www.broadcom.com/products/BCM2835 http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pdf Note that the documentation in the latter .pdf assumes the MMU setup that's used on the "VideoCore" companion processor, and does not document physical peripheral addresses. Subtract 0x5e000000 to obtain the physical addresses. This is accounted for by the ranges property in the /soc node in the device tree. The BCM2835 SoC is used in the Raspberry Pi. This patch also adds a minimal device tree for this board; enough to see some very early kernel boot messages through earlyprintk. However, this patch does not yet provide a useful booting system. http://www.raspberrypi.org/. This patch was extracted from git://github.com/lp0/linux.git branch rpi-split from 3-4 months ago, and significantly stripped down and modified since. Signed-off-by: NChris Boot <bootc@bootc.net> Signed-off-by: NSimon Arlott <simon@fire.lp0.eu> Signed-off-by: NDom Cobley <popcornmix@gmail.com> Signed-off-by: NDom Cobley <dc4@broadcom.com> Signed-off-by: NStephen Warren <swarren@wwwdotorg.org> Acked-by: NArnd Bergmann <arnd@arndb.de>
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