1. 27 3月, 2019 4 次提交
    • T
      ARM: OMAP2+: Define _HWMOD_STATE_DEFAULT and use it · 6d63b12d
      Tony Lindgren 提交于
      For dynamically allocated struct hwmod entries probing with ti-sysc
      interconnect target module driver, we need to specify the initial default
      state the same way as we do for the platform data cases.
      
      Let's prepare for that by adding _HWMOD_STATE_DEFAULT that we can then
      use to set the initial default state without a need to add similar
      CONFIG_PM handling in multiple places.
      
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Tero Kristo <t-kristo@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      6d63b12d
    • T
      ARM: OMAP2+: Prepare class allocation for dynamically allocated modules · 513a4abb
      Tony Lindgren 提交于
      For dynamically allocated sysconfig data we only need to allocate a new
      class for the cases where the class is shared. For dynamically allocated
      struct omap_hwmod we will always allocate a new class.
      
      Let's add detection for when we need to allocate a new class by comparing
      the class name against the module name. If they match, there's no need
      to allocate a new calls as we don't have case of mixed platform data and
      dts data initialized modules for the same class.
      
      Let's also move the init of class data inside the spinlock.
      
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Tero Kristo <t-kristo@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      513a4abb
    • T
      ARM: OMAP2+: Make interconnect target module allocation functions static · 798bd175
      Tony Lindgren 提交于
      Only omap_hwmod_init_module() gets called, the rest of the interconnect
      target module allocation functions can be static.
      
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Tero Kristo <t-kristo@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      798bd175
    • T
      ARM: OMAP2+: Fix potentially uninitialized return value for _setup_reset() · 7f0d0786
      Tony Lindgren 提交于
      Commit 747834ab ("ARM: OMAP2+: hwmod: revise hardreset behavior") made
      the call to _enable() conditional based on no oh->rst_lines_cnt. This
      caused the return value to be potentially uninitialized. Curiously we see
      no compiler warnings for this, probably as this gets inlined.
      
      We call _setup_reset() from _setup() and only _setup_postsetup() if the
      return value is zero. Currently the return value can be uninitialized for
      cases where oh->rst_lines_cnt is set and HWMOD_INIT_NO_RESET is not set.
      
      Fixes: 747834ab ("ARM: OMAP2+: hwmod: revise hardreset behavior")
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Tero Kristo <t-kristo@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      7f0d0786
  2. 15 2月, 2019 1 次提交
  3. 07 2月, 2019 1 次提交
    • R
      ARM: OMAP2+: fix lack of timer interrupts on CPU1 after hotplug · 50d6b3cf
      Russell King 提交于
      If we have a kernel configured for periodic timer interrupts, and we
      have cpuidle enabled, then we end up with CPU1 losing timer interupts
      after a hotplug.
      
      This can manifest itself in RCU stall warnings, or userspace becoming
      unresponsive.
      
      The problem is that the kernel initially wants to use the TWD timer
      for interrupts, but the TWD loses context when we enter the C3 cpuidle
      state.  Nothing reprograms the TWD after idle.
      
      We have solved this in the past by switching to broadcast timer ticks,
      and cpuidle44xx switches to that mode at boot time.  However, there is
      nothing to switch from periodic mode local timers after a hotplug
      operation.
      
      We call tick_broadcast_enter() in omap_enter_idle_coupled(), which one
      would expect would take care of the issue, but internally this only
      deals with one-shot local timers - tick_broadcast_enable() on the other
      hand only deals with periodic local timers.  So, we need to call both.
      Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
      [tony@atomide.com: just standardized the subject line]
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      50d6b3cf
  4. 06 2月, 2019 1 次提交
    • L
      regulator: fixed/gpio: Pull inversion/OD into gpiolib · 01dc79cd
      Linus Walleij 提交于
      This pushes the handling of inversion semantics and open drain
      settings to the GPIO descriptor and gpiolib. All affected board
      files are also augmented.
      
      This is especially nice since we don't have to have any
      confusing flags passed around to the left and right littering
      the fixed and GPIO regulator drivers and the regulator core.
      It is all just very straight-forward: the core asks the GPIO
      line to be asserted or deasserted and gpiolib deals with the
      rest depending on how the platform is configured: if the line
      is active low, it deals with that, if the line is open drain,
      it deals with that too.
      
      Cc: Alexander Shiyan <shc_work@mail.ru> # i.MX boards user
      Cc: Haojian Zhuang <haojian.zhuang@gmail.com> # MMP2 maintainer
      Cc: Aaro Koskinen <aaro.koskinen@iki.fi> # OMAP1 maintainer
      Cc: Tony Lindgren <tony@atomide.com> # OMAP1,2,3 maintainer
      Cc: Mike Rapoport <rppt@linux.vnet.ibm.com> # EM-X270 maintainer
      Cc: Robert Jarzmik <robert.jarzmik@free.fr> # EZX maintainer
      Cc: Philipp Zabel <philipp.zabel@gmail.com> # Magician maintainer
      Cc: Petr Cvek <petr.cvek@tul.cz> # Magician
      Cc: Robert Jarzmik <robert.jarzmik@free.fr> # PXA
      Cc: Paul Parsons <lost.distance@yahoo.com> # hx4700
      Cc: Daniel Mack <zonque@gmail.com> # Raumfeld maintainer
      Cc: Marc Zyngier <marc.zyngier@arm.com> # Zeus maintainer
      Cc: Geert Uytterhoeven <geert+renesas@glider.be> # SuperH pinctrl/GPIO maintainer
      Cc: Russell King <rmk+kernel@armlinux.org.uk> # SA1100
      Tested-by: NMarek Szyprowski <m.szyprowski@samsung.com>
      Tested-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> #OMAP1 Amstrad Delta
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      01dc79cd
  5. 02 2月, 2019 1 次提交
    • R
      ARM: avoid Cortex-A9 livelock on tight dmb loops · 5388a5b8
      Russell King 提交于
      machine_crash_nonpanic_core() does this:
      
      	while (1)
      		cpu_relax();
      
      because the kernel has crashed, and we have no known safe way to deal
      with the CPU.  So, we place the CPU into an infinite loop which we
      expect it to never exit - at least not until the system as a whole is
      reset by some method.
      
      In the absence of erratum 754327, this code assembles to:
      
      	b	.
      
      In other words, an infinite loop.  When erratum 754327 is enabled,
      this becomes:
      
      1:	dmb
      	b	1b
      
      It has been observed that on some systems (eg, OMAP4) where, if a
      crash is triggered, the system tries to kexec into the panic kernel,
      but fails after taking the secondary CPU down - placing it into one
      of these loops.  This causes the system to livelock, and the most
      noticable effect is the system stops after issuing:
      
      	Loading crashdump kernel...
      
      to the system console.
      
      The tested as working solution I came up with was to add wfe() to
      these infinite loops thusly:
      
      	while (1) {
      		cpu_relax();
      		wfe();
      	}
      
      which, without 754327 builds to:
      
      1:	wfe
      	b	1b
      
      or with 754327 is enabled:
      
      1:	dmb
      	wfe
      	b	1b
      
      Adding "wfe" does two things depending on the environment we're running
      under:
      - where we're running on bare metal, and the processor implements
        "wfe", it stops us spinning endlessly in a loop where we're never
        going to do any useful work.
      - if we're running in a VM, it allows the CPU to be given back to the
        hypervisor and rescheduled for other purposes (maybe a different VM)
        rather than wasting CPU cycles inside a crashed VM.
      
      However, in light of erratum 794072, Will Deacon wanted to see 10 nops
      as well - which is reasonable to cover the case where we have erratum
      754327 enabled _and_ we have a processor that doesn't implement the
      wfe hint.
      
      So, we now end up with:
      
      1:      wfe
              b       1b
      
      when erratum 754327 is disabled, or:
      
      1:      dmb
              nop
              nop
              nop
              nop
              nop
              nop
              nop
              nop
              nop
              nop
              wfe
              b       1b
      
      when erratum 754327 is enabled.  We also get the dmb + 10 nop
      sequence elsewhere in the kernel, in terminating loops.
      
      This is reasonable - it means we get the workaround for erratum
      794072 when erratum 754327 is enabled, but still relinquish the dead
      processor - either by placing it in a lower power mode when wfe is
      implemented as such or by returning it to the hypervisior, or in the
      case where wfe is a no-op, we use the workaround specified in erratum
      794072 to avoid the problem.
      
      These as two entirely orthogonal problems - the 10 nops addresses
      erratum 794072, and the wfe is an optimisation that makes the system
      more efficient when crashed either in terms of power consumption or
      by allowing the host/other VMs to make use of the CPU.
      
      I don't see any reason not to use kexec() inside a VM - it has the
      potential to provide automated recovery from a failure of the VMs
      kernel with the opportunity for saving a crashdump of the failure.
      A panic() with a reboot timeout won't do that, and reading the
      libvirt documentation, setting on_reboot to "preserve" won't either
      (the documentation states "The preserve action for an on_reboot event
      is treated as a destroy".)  Surely it has to be a good thing to
      avoiding having CPUs spinning inside a VM that is doing no useful
      work.
      Acked-by: NWill Deacon <will.deacon@arm.com>
      Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
      5388a5b8
  6. 30 1月, 2019 1 次提交
  7. 25 1月, 2019 2 次提交
  8. 24 1月, 2019 1 次提交
    • T
      ARM: OMAP5+: Fix inverted nirq pin interrupts with irq_set_type · d0243693
      Tony Lindgren 提交于
      Commit 83a86fbb ("irqchip/gic: Loudly complain about the use of
      IRQ_TYPE_NONE") started warning about incorrect dts usage for irqs.
      ARM GIC only supports active-high interrupts for SPI (Shared Peripheral
      Interrupts), and the Palmas PMIC by default is active-low.
      
      Palmas PMIC allows changing the interrupt polarity using register
      PALMAS_POLARITY_CTRL_INT_POLARITY, but configuring sys_nirq1 with
      a pull-down and setting PALMAS_POLARITY_CTRL_INT_POLARITY made the
      Palmas RTC interrupts stop working. This can be easily tested with
      kernel tools rtctest.c.
      
      Turns out the SoC inverts the sys_nirq pins for GIC as they do not go
      through a peripheral device but go directly to the MPUSS wakeupgen.
      I've verified this by muxing the interrupt line temporarily to gpio_wk16
      instead of sys_nirq1. with a gpio, the interrupt works fine both
      active-low and active-high with the SoC internal pull configured and
      palmas polarity configured. But as sys_nirq1, the interrupt only works
      when configured ACTIVE_LOW for palmas, and ACTIVE_HIGH for GIC.
      
      Note that there was a similar issue earlier with tegra114 and palmas
      interrupt polarity that got fixed by commit df545d1c ("mfd: palmas:
      Provide irq flags through DT/platform data"). However, the difference
      between omap5 and tegra114 is that tegra inverts the palmas interrupt
      twice, once when entering tegra PMC, and again when exiting tegra PMC
      to GIC.
      
      Let's fix the issue by adding a custom wakeupgen_irq_set_type() for
      wakeupgen and invert any interrupts with wrong polarity. Let's also
      warn about any non-sysnirq pins using wrong polarity. Note that we
      also need to update the dts for the level as IRQ_TYPE_NONE never
      has irq_set_type() called, and let's add some comments and use proper
      pin nameing to avoid more confusion later on.
      
      Cc: Belisko Marek <marek.belisko@gmail.com>
      Cc: Dmitry Lifshitz <lifshitz@compulab.co.il>
      Cc: "Dr. H. Nikolaus Schaller" <hns@goldelico.com>
      Cc: Jon Hunter <jonathanh@nvidia.com>
      Cc: Keerthy <j-keerthy@ti.com>
      Cc: Laxman Dewangan <ldewangan@nvidia.com>
      Cc: Nishanth Menon <nm@ti.com>
      Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
      Cc: Richard Woodruff <r-woodruff2@ti.com>
      Cc: Santosh Shilimkar <ssantosh@kernel.org>
      Cc: Tero Kristo <t-kristo@ti.com>
      Cc: Thierry Reding <treding@nvidia.com>
      Cc: stable@vger.kernel.org # v4.17+
      Reported-by: NBelisko Marek <marek.belisko@gmail.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      d0243693
  9. 23 12月, 2018 2 次提交
  10. 18 12月, 2018 1 次提交
  11. 14 12月, 2018 1 次提交
  12. 13 12月, 2018 1 次提交
  13. 11 12月, 2018 1 次提交
  14. 30 11月, 2018 1 次提交
  15. 20 11月, 2018 3 次提交
    • G
      ARM: OMAP2+: timer: Remove obsolete inclusion of <asm/smp_twd.h> · b7645533
      Geert Uytterhoeven 提交于
      As of commit d1dabab2 ("ARM: OMAP2+: Clean up
      omap4_local_timer_init"), this header file is no longer used.
      Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      b7645533
    • N
      ARM: OMAP2+: prm44xx: Fix section annotation on omap44xx_prm_enable_io_wakeup · 7d3b37b1
      Nathan Chancellor 提交于
      When building the kernel with Clang, the following section mismatch
      warning appears:
      
      WARNING: vmlinux.o(.text+0x38b3c): Section mismatch in reference from
      the function omap44xx_prm_late_init() to the function
      .init.text:omap44xx_prm_enable_io_wakeup()
      The function omap44xx_prm_late_init() references
      the function __init omap44xx_prm_enable_io_wakeup().
      This is often because omap44xx_prm_late_init lacks a __init
      annotation or the annotation of omap44xx_prm_enable_io_wakeup is wrong.
      
      Remove the __init annotation from omap44xx_prm_enable_io_wakeup so there
      is no more mismatch.
      Signed-off-by: NNathan Chancellor <natechancellor@gmail.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      7d3b37b1
    • N
      ARM: OMAP2+: hwmod: Fix some section annotations · c10b26ab
      Nathan Chancellor 提交于
      When building the kernel with Clang, the following section mismatch
      warnings appears:
      
      WARNING: vmlinux.o(.text+0x2d398): Section mismatch in reference from
      the function _setup() to the function .init.text:_setup_iclk_autoidle()
      The function _setup() references
      the function __init _setup_iclk_autoidle().
      This is often because _setup lacks a __init
      annotation or the annotation of _setup_iclk_autoidle is wrong.
      
      WARNING: vmlinux.o(.text+0x2d3a0): Section mismatch in reference from
      the function _setup() to the function .init.text:_setup_reset()
      The function _setup() references
      the function __init _setup_reset().
      This is often because _setup lacks a __init
      annotation or the annotation of _setup_reset is wrong.
      
      WARNING: vmlinux.o(.text+0x2d408): Section mismatch in reference from
      the function _setup() to the function .init.text:_setup_postsetup()
      The function _setup() references
      the function __init _setup_postsetup().
      This is often because _setup lacks a __init
      annotation or the annotation of _setup_postsetup is wrong.
      
      _setup is used in omap_hwmod_allocate_module, which isn't marked __init
      and looks like it shouldn't be, meaning to fix these warnings, those
      functions must be moved out of the init section, which this patch does.
      Signed-off-by: NNathan Chancellor <natechancellor@gmail.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      c10b26ab
  16. 12 11月, 2018 1 次提交
  17. 08 11月, 2018 1 次提交
  18. 31 10月, 2018 3 次提交
    • M
      memblock: stop using implicit alignment to SMP_CACHE_BYTES · 7e1c4e27
      Mike Rapoport 提交于
      When a memblock allocation APIs are called with align = 0, the alignment
      is implicitly set to SMP_CACHE_BYTES.
      
      Implicit alignment is done deep in the memblock allocator and it can
      come as a surprise.  Not that such an alignment would be wrong even
      when used incorrectly but it is better to be explicit for the sake of
      clarity and the prinicple of the least surprise.
      
      Replace all such uses of memblock APIs with the 'align' parameter
      explicitly set to SMP_CACHE_BYTES and stop implicit alignment assignment
      in the memblock internal allocation functions.
      
      For the case when memblock APIs are used via helper functions, e.g.  like
      iommu_arena_new_node() in Alpha, the helper functions were detected with
      Coccinelle's help and then manually examined and updated where
      appropriate.
      
      The direct memblock APIs users were updated using the semantic patch below:
      
      @@
      expression size, min_addr, max_addr, nid;
      @@
      (
      |
      - memblock_alloc_try_nid_raw(size, 0, min_addr, max_addr, nid)
      + memblock_alloc_try_nid_raw(size, SMP_CACHE_BYTES, min_addr, max_addr,
      nid)
      |
      - memblock_alloc_try_nid_nopanic(size, 0, min_addr, max_addr, nid)
      + memblock_alloc_try_nid_nopanic(size, SMP_CACHE_BYTES, min_addr, max_addr,
      nid)
      |
      - memblock_alloc_try_nid(size, 0, min_addr, max_addr, nid)
      + memblock_alloc_try_nid(size, SMP_CACHE_BYTES, min_addr, max_addr, nid)
      |
      - memblock_alloc(size, 0)
      + memblock_alloc(size, SMP_CACHE_BYTES)
      |
      - memblock_alloc_raw(size, 0)
      + memblock_alloc_raw(size, SMP_CACHE_BYTES)
      |
      - memblock_alloc_from(size, 0, min_addr)
      + memblock_alloc_from(size, SMP_CACHE_BYTES, min_addr)
      |
      - memblock_alloc_nopanic(size, 0)
      + memblock_alloc_nopanic(size, SMP_CACHE_BYTES)
      |
      - memblock_alloc_low(size, 0)
      + memblock_alloc_low(size, SMP_CACHE_BYTES)
      |
      - memblock_alloc_low_nopanic(size, 0)
      + memblock_alloc_low_nopanic(size, SMP_CACHE_BYTES)
      |
      - memblock_alloc_from_nopanic(size, 0, min_addr)
      + memblock_alloc_from_nopanic(size, SMP_CACHE_BYTES, min_addr)
      |
      - memblock_alloc_node(size, 0, nid)
      + memblock_alloc_node(size, SMP_CACHE_BYTES, nid)
      )
      
      [mhocko@suse.com: changelog update]
      [akpm@linux-foundation.org: coding-style fixes]
      [rppt@linux.ibm.com: fix missed uses of implicit alignment]
        Link: http://lkml.kernel.org/r/20181016133656.GA10925@rapoport-lnx
      Link: http://lkml.kernel.org/r/1538687224-17535-1-git-send-email-rppt@linux.vnet.ibm.comSigned-off-by: NMike Rapoport <rppt@linux.vnet.ibm.com>
      Suggested-by: NMichal Hocko <mhocko@suse.com>
      Acked-by: Paul Burton <paul.burton@mips.com>	[MIPS]
      Acked-by: Michael Ellerman <mpe@ellerman.id.au>	[powerpc]
      Acked-by: NMichal Hocko <mhocko@suse.com>
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Cc: Chris Zankel <chris@zankel.net>
      Cc: Geert Uytterhoeven <geert@linux-m68k.org>
      Cc: Guan Xuetao <gxt@pku.edu.cn>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Matt Turner <mattst88@gmail.com>
      Cc: Michal Simek <monstr@monstr.eu>
      Cc: Richard Weinberger <richard@nod.at>
      Cc: Russell King <linux@armlinux.org.uk>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Tony Luck <tony.luck@intel.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      7e1c4e27
    • M
      mm: remove include/linux/bootmem.h · 57c8a661
      Mike Rapoport 提交于
      Move remaining definitions and declarations from include/linux/bootmem.h
      into include/linux/memblock.h and remove the redundant header.
      
      The includes were replaced with the semantic patch below and then
      semi-automated removal of duplicated '#include <linux/memblock.h>
      
      @@
      @@
      - #include <linux/bootmem.h>
      + #include <linux/memblock.h>
      
      [sfr@canb.auug.org.au: dma-direct: fix up for the removal of linux/bootmem.h]
        Link: http://lkml.kernel.org/r/20181002185342.133d1680@canb.auug.org.au
      [sfr@canb.auug.org.au: powerpc: fix up for removal of linux/bootmem.h]
        Link: http://lkml.kernel.org/r/20181005161406.73ef8727@canb.auug.org.au
      [sfr@canb.auug.org.au: x86/kaslr, ACPI/NUMA: fix for linux/bootmem.h removal]
        Link: http://lkml.kernel.org/r/20181008190341.5e396491@canb.auug.org.au
      Link: http://lkml.kernel.org/r/1536927045-23536-30-git-send-email-rppt@linux.vnet.ibm.comSigned-off-by: NMike Rapoport <rppt@linux.vnet.ibm.com>
      Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au>
      Acked-by: NMichal Hocko <mhocko@suse.com>
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Cc: Chris Zankel <chris@zankel.net>
      Cc: "David S. Miller" <davem@davemloft.net>
      Cc: Geert Uytterhoeven <geert@linux-m68k.org>
      Cc: Greentime Hu <green.hu@gmail.com>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Guan Xuetao <gxt@pku.edu.cn>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: "James E.J. Bottomley" <jejb@parisc-linux.org>
      Cc: Jonas Bonn <jonas@southpole.se>
      Cc: Jonathan Corbet <corbet@lwn.net>
      Cc: Ley Foon Tan <lftan@altera.com>
      Cc: Mark Salter <msalter@redhat.com>
      Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
      Cc: Matt Turner <mattst88@gmail.com>
      Cc: Michael Ellerman <mpe@ellerman.id.au>
      Cc: Michal Simek <monstr@monstr.eu>
      Cc: Palmer Dabbelt <palmer@sifive.com>
      Cc: Paul Burton <paul.burton@mips.com>
      Cc: Richard Kuo <rkuo@codeaurora.org>
      Cc: Richard Weinberger <richard@nod.at>
      Cc: Rich Felker <dalias@libc.org>
      Cc: Russell King <linux@armlinux.org.uk>
      Cc: Serge Semin <fancer.lancer@gmail.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Vineet Gupta <vgupta@synopsys.com>
      Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      57c8a661
    • M
      memblock: remove _virt from APIs returning virtual address · eb31d559
      Mike Rapoport 提交于
      The conversion is done using
      
      sed -i 's@memblock_virt_alloc@memblock_alloc@g' \
      	$(git grep -l memblock_virt_alloc)
      
      Link: http://lkml.kernel.org/r/1536927045-23536-8-git-send-email-rppt@linux.vnet.ibm.comSigned-off-by: NMike Rapoport <rppt@linux.vnet.ibm.com>
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Cc: Chris Zankel <chris@zankel.net>
      Cc: "David S. Miller" <davem@davemloft.net>
      Cc: Geert Uytterhoeven <geert@linux-m68k.org>
      Cc: Greentime Hu <green.hu@gmail.com>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Guan Xuetao <gxt@pku.edu.cn>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: "James E.J. Bottomley" <jejb@parisc-linux.org>
      Cc: Jonas Bonn <jonas@southpole.se>
      Cc: Jonathan Corbet <corbet@lwn.net>
      Cc: Ley Foon Tan <lftan@altera.com>
      Cc: Mark Salter <msalter@redhat.com>
      Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
      Cc: Matt Turner <mattst88@gmail.com>
      Cc: Michael Ellerman <mpe@ellerman.id.au>
      Cc: Michal Hocko <mhocko@suse.com>
      Cc: Michal Simek <monstr@monstr.eu>
      Cc: Palmer Dabbelt <palmer@sifive.com>
      Cc: Paul Burton <paul.burton@mips.com>
      Cc: Richard Kuo <rkuo@codeaurora.org>
      Cc: Richard Weinberger <richard@nod.at>
      Cc: Rich Felker <dalias@libc.org>
      Cc: Russell King <linux@armlinux.org.uk>
      Cc: Serge Semin <fancer.lancer@gmail.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Vineet Gupta <vgupta@synopsys.com>
      Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      eb31d559
  19. 19 10月, 2018 1 次提交
    • N
      ARM: OMAP2+: prm44xx: Fix section annotation on omap44xx_prm_enable_io_wakeup · eef3dc34
      Nathan Chancellor 提交于
      When building the kernel with Clang, the following section mismatch
      warning appears:
      
      WARNING: vmlinux.o(.text+0x38b3c): Section mismatch in reference from
      the function omap44xx_prm_late_init() to the function
      .init.text:omap44xx_prm_enable_io_wakeup()
      The function omap44xx_prm_late_init() references
      the function __init omap44xx_prm_enable_io_wakeup().
      This is often because omap44xx_prm_late_init lacks a __init
      annotation or the annotation of omap44xx_prm_enable_io_wakeup is wrong.
      
      Remove the __init annotation from omap44xx_prm_enable_io_wakeup so there
      is no more mismatch.
      Signed-off-by: NNathan Chancellor <natechancellor@gmail.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      eef3dc34
  20. 08 10月, 2018 1 次提交
    • L
      mmc: omap_hsmmc: Delete platform data GPIO CD and WP · e63201f1
      Linus Walleij 提交于
      The OMAP HSMMC driver has some elaborate and hairy handling for
      passing GPIO card detect and write protect lines from a boardfile
      into the driver: the machine defines a struct omap2_hsmmc_info
      that is copied into struct omap_hsmmc_platform_data by
      omap_hsmmc_pdata_init() in arch/arm/mach-omap2/hsmmc.c.
      
      However the .gpio_cd and .gpio_wp fields are not copied from
      omap2_hsmmc_info to omap_hsmmc_platform_data by
      omap_hsmmc_pdata_init() so they remain unused. The only platform
      defining omap2_hsmmc_info also define both to -1, unused.
      
      It turn out there are no boardfiles passing any valid GPIO
      lines into the OMAP HSMMC driver at all. And since we are not
      going to add any more OMAP2 boardfiles, we can delete this
      card detect and write protect handling altogether.
      
      This seems to also fix a bug: the card detect callback
      mmc_gpio_get_cd() in the slot GPIO core needs to be called
      by drivers utilizing slot GPIO. It appears the the boardfile
      quirks were not doing this right, so this would only get
      called for boardfiles, i.e. since no boardfile was using it,
      never.
      
      Just assign mmc_gpio_get_cd() unconditionally to omap_hsmmc_ops
      .get_cd() so card detects from the device tree works.
      AFAICT card detect with GPIO lines assigned from
      mmc_of_parse() are not working at the moment, but that is
      no regression since it probably never worked.
      
      Cc: Tony Lindgren <tony@atomide.com>
      Cc: linux-omap@vger.kernel.org
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      Acked-by: NTony Lindgren <tony@atomide.com>
      Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
      e63201f1
  21. 24 9月, 2018 1 次提交
    • T
      gpio: omap: Remove custom PM calls and use cpu_pm instead · b764a586
      Tony Lindgren 提交于
      For a long time the gpio-omap custom PM calls have been annoying me so
      let's replace them with cpu_pm instead. This will enable GPIO PM for
      deeper idle states on omap4. And we can handle GPIO PM for omap2/3/4
      in the same way.
      
      Note that with this patch we are also slightly changing GPIO PM to be
      less aggressive for omap3 and only will idle GPIO when PER context
      may be lost.
      
      For omap2, we don't need to save context and don't want to remove any
      triggering so let's add a quirk flag for that.
      
      Let's do this all in a single patch to avoid a situation where old
      custom calls still are used with new code.
      
      Cc: Aaro Koskinen <aaro.koskinen@iki.fi>
      Cc: Keerthy <j-keerthy@ti.com>
      Cc: Ladislav Michl <ladis@linux-mips.org>
      Cc: Tero Kristo <t-kristo@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      Acked-by: NGrygorii Strashko <grygorii.strashko@ti.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      b764a586
  22. 18 9月, 2018 1 次提交
    • L
      regulator: fixed: Convert to use GPIO descriptor only · efdfeb07
      Linus Walleij 提交于
      As we augmented the regulator core to accept a GPIO descriptor instead
      of a GPIO number, we can augment the fixed GPIO regulator to look up
      and pass that descriptor directly from device tree or board GPIO
      descriptor look up tables.
      
      Some boards just auto-enumerate their fixed regulator platform devices
      and I have assumed they get names like "fixed-regulator.0" but it's
      pretty hard to guess this. I need some testing from board maintainers to
      be sure. Other boards are straight forward, using just plain
      "fixed-regulator" (ID -1) or "fixed-regulator.1" hammering down the
      device ID.
      
      It seems the da9055 and da9211 has never got around to actually passing
      any enable gpio into its platform data (not the in-tree code anyway) so we
      can just decide to simply pass a descriptor instead.
      
      The fixed GPIO-controlled regulator in mach-pxa/ezx.c was confusingly named
      "*_dummy_supply_device" while it is a very real device backed by a GPIO
      line. There is nothing dummy about it at all, so I renamed it with the
      infix *_regulator_* as part of this patch set.
      
      Intel MID portions tested by Andy.
      
      Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Check the x86 BCM stuff
      Acked-by: Tony Lindgren <tony@atomide.com> # OMAP1,2,3 maintainer
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      Reviewed-by: NJanusz Krzysztofik <jmkrzyszt@gmail.com>
      Reviewed-by: NMike Rapoport <rppt@linux.vnet.ibm.com>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      efdfeb07
  23. 08 9月, 2018 2 次提交
  24. 17 8月, 2018 2 次提交
    • T
      ARM: OMAP2+: Fix module address for modules using mpu_rt_idx · 1dbcb97c
      Tony Lindgren 提交于
      If we use device tree data for a module interconnect target we want
      to map the control registers from the module start. Legacy hwmod platform
      data however is using child IP offsets for cpsw module with mpu_rt_idx.
      
      In cases where we have the interconnect target module already using device
      tree data with legacy hwmod platform data still around, the sysc register
      area is not adjusted for mpu_rt_idx causing wrong registers being accessed.
      
      Let's fix the issue for mixed dts and platform data mode by ioremapping
      the module registers using child IP offset if mpu_rt_idx is set. For
      device tree only data there's no reason to use mpu_rt_idx.
      
      Fixes: 6c72b355 ("ARM: OMAP2+: Parse module IO range from dts for legacy
      "ti,hwmods" support")
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      1dbcb97c
    • T
      ARM: OMAP2+: Fix null hwmod for ti-sysc debug · 4769c003
      Tony Lindgren 提交于
      We may call omap_hwmod_parse_module_range() with no hwmod allocated yet
      and may have debug enabled. Let's fix this by checking for hwmod before
      trying to use it's name.
      
      Fixes: 6c72b355 ("ARM: OMAP2+: Parse module IO range from dts for legacy
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      4769c003
  25. 12 7月, 2018 1 次提交
    • N
      ARM: DRA7/OMAP5: Enable ACTLR[0] (Enable invalidates of BTB) for secondary cores · 2f8b5b21
      Nishanth Menon 提交于
      Call secure services to enable ACTLR[0] (Enable invalidates of BTB with
      ICIALLU) when branch hardening is enabled for kernel.
      
      On GP devices OMAP5/DRA7, there is no possibility to update secure
      side since "secure world" is ROM and there are no override mechanisms
      possible. On HS devices, appropriate PPA should do the workarounds as
      well.
      
      However, the configuration is only done for secondary core, since it is
      expected that firmware/bootloader will have enabled the required
      configuration for the primary boot core (note: bootloaders typically
      will NOT enable secondary processors, since it has no need to do so).
      Signed-off-by: NNishanth Menon <nm@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      2f8b5b21
  26. 10 7月, 2018 3 次提交
  27. 03 7月, 2018 1 次提交
    • D
      ARM: hwmod: RTC: Don't assume lock/unlock will be called with irq enabled · 6d609b35
      Dave Gerlach 提交于
      When the RTC lock and unlock functions were introduced it was likely
      assumed that they would always be called from irq enabled context, hence
      the use of local_irq_disable/enable. This is no longer true as the
      RTC+DDR path makes a late call during the suspend path after irqs
      have been disabled to enable the RTC hwmod which calls both unlock and
      lock, leading to IRQs being reenabled through the local_irq_enable call
      in omap_hwmod_rtc_lock call.
      
      To avoid this change the local_irq_disable/enable to
      local_irq_save/restore to ensure that from whatever context this is
      called the proper IRQ configuration is maintained.
      Signed-off-by: NDave Gerlach <d-gerlach@ti.com>
      Signed-off-by: NKeerthy <j-keerthy@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      6d609b35