1. 05 1月, 2015 3 次提交
  2. 17 12月, 2014 1 次提交
    • M
      iommu/exynos: Fix arm64 allmodconfig build · 20911ce6
      Mark Brown 提交于
      The Exynos IOMMU driver uses the ARM specific dmac_flush_range() and
      outer_flush_range() functions. This breaks the build on arm64 allmodconfig
      in -next since support has been merged for some Exynos ARMv8 SoCs. Add a
      dependency on ARM to keep things building until either the driver has the
      ARM dependencies removed or the ARMv8 architecture code implements these
      ARM specific APIs.
      Signed-off-by: NMark Brown <broonie@kernel.org>
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      20911ce6
  3. 16 12月, 2014 3 次提交
  4. 14 12月, 2014 1 次提交
  5. 05 12月, 2014 1 次提交
  6. 04 12月, 2014 1 次提交
    • T
      memory: Add NVIDIA Tegra memory controller support · 89184651
      Thierry Reding 提交于
      The memory controller on NVIDIA Tegra exposes various knobs that can be
      used to tune the behaviour of the clients attached to it.
      
      Currently this driver sets up the latency allowance registers to the HW
      defaults. Eventually an API should be exported by this driver (via a
      custom API or a generic subsystem) to allow clients to register latency
      requirements.
      
      This driver also registers an IOMMU (SMMU) that's implemented by the
      memory controller. It is supported on Tegra30, Tegra114 and Tegra124
      currently. Tegra20 has a GART instead.
      
      The Tegra SMMU operates on memory clients and SWGROUPs. A memory client
      is a unidirectional, special-purpose DMA master. A SWGROUP represents a
      set of memory clients that form a logical functional unit corresponding
      to a single device. Typically a device has two clients: one client for
      read transactions and one client for write transactions, but there are
      also devices that have only read clients, but many of them (such as the
      display controllers).
      
      Because there is no 1:1 relationship between memory clients and devices
      the driver keeps a table of memory clients and the SWGROUPs that they
      belong to per SoC. Note that this is an exception and due to the fact
      that the SMMU is tightly integrated with the rest of the Tegra SoC. The
      use of these tables is discouraged in drivers for generic IOMMU devices
      such as the ARM SMMU because the same IOMMU could be used in any number
      of SoCs and keeping such tables for each SoC would not scale.
      Acked-by: NJoerg Roedel <jroedel@suse.de>
      Signed-off-by: NThierry Reding <treding@nvidia.com>
      89184651
  7. 02 12月, 2014 5 次提交
  8. 23 11月, 2014 1 次提交
  9. 18 11月, 2014 7 次提交
  10. 14 11月, 2014 5 次提交
  11. 12 11月, 2014 1 次提交
    • O
      iommu/amd: Fix accounting of device_state · 1c51099a
      Oded Gabbay 提交于
      This patch fixes a bug in the accounting of the
      device_state.  In the current code, the device_state was put
      (decremented) too many times, which sometimes lead to the
      driver getting stuck permanently in put_device_state_wait().
      That happen because the device_state->count would go below
      zero, which is never supposed to happen.
      
      The root cause is that the device_state was decremented in
      put_pasid_state() and put_pasid_state_wait() but also in all
      the functions that call those functions. Therefore, the
      device_state was decremented twice in each of these code
      paths.
      
      The fix is to decouple the device_state accounting from the
      pasid_state accounting - remove the call to
      put_device_state() from the put_pasid_state() and the
      put_pasid_state_wait())
      Signed-off-by: NOded Gabbay <oded.gabbay@amd.com>
      Signed-off-by: NJoerg Roedel <jroedel@suse.de>
      1c51099a
  12. 06 11月, 2014 1 次提交
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      x86/vt-d: Fix incorrect bit operations in setting values · 1a2262f9
      Li, Zhen-Hua 提交于
      The function context_set_address_root() and set_root_value are setting new
      address in a wrong way, and this patch is trying to fix this problem.
      
      According to Intel Vt-d specs(Feb 2011, Revision 1.3), Chapter 9.1 and 9.2,
      field ctp in root entry is using bits 12:63, field asr in context entry is
      using bits 12:63.
      
      To set these fields, the following functions are used:
      static inline void context_set_address_root(struct context_entry *context,
              unsigned long value);
      and
      static inline void set_root_value(struct root_entry *root, unsigned long value)
      
      But they are using an invalid method to set these fields, in current code, only
      a '|' operator is used to set it. This will not set the asr to the expected
      value if it has an old value.
      
      For example:
      Before calling this function,
      	context->lo = 0x3456789012111;
      	value = 0x123456789abcef12;
      
      After we call context_set_address_root(context, value), expected result is
      	context->lo == 0x123456789abce111;
      
      But the actual result is:
      	context->lo == 0x1237577f9bbde111;
      
      So we need to clear bits 12:63 before setting the new value, this will fix
      this problem.
      Signed-off-by: NLi, Zhen-Hua <zhen-hual@hp.com>
      Signed-off-by: NJoerg Roedel <jroedel@suse.de>
      1a2262f9
  13. 05 11月, 2014 1 次提交
  14. 04 11月, 2014 7 次提交
    • A
    • K
      iommu/omap: Use dev_get_platdata() · 99cb9aee
      Kiran Padwal 提交于
      Use the wrapper function for retrieving the platform data instead of
      accessing dev->platform_data directly.
      Signed-off-by: NKiran Padwal <kiran.padwal@smartplayin.com>
      Signed-off-by: NJoerg Roedel <jroedel@suse.de>
      99cb9aee
    • K
      iommu/msm: Use dev_get_platdata() · 263bc3fd
      Kiran Padwal 提交于
      Use the wrapper function for retrieving the platform data instead of
      accessing dev->platform_data directly.
      Signed-off-by: NKiran Padwal <kiran.padwal@smartplayin.com>
      Signed-off-by: NJoerg Roedel <jroedel@suse.de>
      263bc3fd
    • H
      iommu: Improve error handling when setting bus iommu · d7da6bdc
      Heiko Stübner 提交于
      When some part of bus_set_iommu fails it should undo any made changes
      and not simply leave everything as is.
      
      This includes unregistering the bus notifier in iommu_bus_init when
      add_iommu_group fails and also setting the bus->iommu_ops back to NULL.
      Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
      Signed-off-by: NJoerg Roedel <jroedel@suse.de>
      d7da6bdc
    • J
      iommu: Do more input validation in iommu_map_sg() · 38ec010d
      Joerg Roedel 提交于
      The IOMMU-API works on page boundarys, unlike the DMA-API
      which can work with sub-page buffers. The sg->offset
      field does not make sense on the IOMMU level, so force it to
      be 0. Do some error-path consolidation while at it.
      Signed-off-by: NJoerg Roedel <jroedel@suse.de>
      38ec010d
    • O
      iommu: Add iommu_map_sg() function · 315786eb
      Olav Haugan 提交于
      Mapping and unmapping are more often than not in the critical path.
      map_sg allows IOMMU driver implementations to optimize the process
      of mapping buffers into the IOMMU page tables.
      
      Instead of mapping a buffer one page at a time and requiring potentially
      expensive TLB operations for each page, this function allows the driver
      to map all pages in one go and defer TLB maintenance until after all
      pages have been mapped.
      
      Additionally, the mapping operation would be faster in general since
      clients does not have to keep calling map API over and over again for
      each physically contiguous chunk of memory that needs to be mapped to a
      virtually contiguous region.
      Signed-off-by: NOlav Haugan <ohaugan@codeaurora.org>
      Signed-off-by: NJoerg Roedel <jroedel@suse.de>
      315786eb
    • D
      iommu/rockchip: rk3288 iommu driver · c68a2921
      Daniel Kurtz 提交于
      The rk3288 has several iommus.  Each iommu belongs to a single master
      device.  There is one device (ISP) that has two slave iommus, but that
      case is not yet supported by this driver.
      
      At subsys init, the iommu driver registers itself as the iommu driver for
      the platform bus.  The master devices find their slave iommus using the
      "iommus" field in their devicetree description.  Since each slave iommu
      belongs to exactly one master, their is no additional data needed at probe
      to associate a slave with its master.
      
      An iommu device's power domain, clock and irq are all shared with its
      master device, and the master device must be careful to attach from the
      iommu only after powering and clocking it (and leave it powered and
      clocked before detaching).  Because their is no guarantee what the status
      of the iommu is at probe, and since the driver does not even know if the
      device is powered, we delay requesting its irq until the master device
      attaches, at which point we have a guarantee that the device is powered
      and clocked and we can reset it and disable its interrupt mask.
      
      An iommu_domain describes a virtual iova address space.  Each iommu_domain
      has a corresponding page table that lists the mappings from iova to
      physical address.
      
      For the rk3288 iommu, the page table has two levels:
       The Level 1 "directory_table" has 1024 4-byte dte entries.
       Each dte points to a level 2 "page_table".
       Each level 2 page_table has 1024 4-byte pte entries.
       Each pte points to a 4 KiB page of memory.
      
      An iommu_domain is created when a dma_iommu_mapping is created via
      arm_iommu_create_mapping.  Master devices can then attach themselves to
      this mapping (or attach the mapping to themselves?) by calling
      arm_iommu_attach_device().  This in turn instructs the iommu driver to
      write the page table's physical address into the slave iommu's "Directory
      Table Entry" (DTE) register.
      
      In fact multiple master devices, each with their own slave iommu device,
      can all attach to the same mapping.  The iommus for these devices will
      share the same iommu_domain and therefore point to the same page table.
      Thus, the iommu domain maintains a list of iommu devices which are
      attached.  This driver relies on the iommu core to ensure that all devices
      have detached before destroying a domain.
      
      v6: - add .add/remove_device() callbacks.
          - parse platform_device device tree nodes for "iommus" property
          - store platform device pointer as group iommudata
          - Check for existence of iommu group instead of relying on a
            dev_get_drvdata() to return NULL for a NULL device.
      
      v7: - fixup some strings.
          - In rk_iommu_disable_paging() # and % were reversed.
      Signed-off-by: NDaniel Kurtz <djkurtz@chromium.org>
      Signed-off-by: NSimon Xue <xxm@rock-chips.com>
      Reviewed-by: NGrant Grundler <grundler@chromium.org>
      Reviewed-by: NStéphane Marchesin <marcheu@chromium.org>
      Tested-by: NHeiko Stuebner <heiko@sntech.de>
      Signed-off-by: NJoerg Roedel <jroedel@suse.de>
      c68a2921
  15. 23 10月, 2014 2 次提交
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