1. 01 8月, 2013 1 次提交
    • R
      ARM: move vector stubs · 19accfd3
      Russell King 提交于
      Move the machine vector stubs into the page above the vector page,
      which we can prevent from being visible to userspace.  Also move
      the reset stub, and place the swi vector at a location that the
      'ldr' can get to it.
      
      This hides pointers into the kernel which could give valuable
      information to attackers, and reduces the number of exploitable
      instructions at a fixed address.
      
      Cc: <stable@vger.kernel.org>
      Acked-by: NNicolas Pitre <nico@linaro.org>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      19accfd3
  2. 26 7月, 2013 1 次提交
    • W
      ARM: 7791/1: a.out: remove partial a.out support · acfdd4b1
      Will Deacon 提交于
      a.out support on ARM requires that argc, argv and envp are passed in
      r0-r2 respectively, which requires hacking load_aout_binary to
      prevent argc being clobbered by the return code. Whilst mainline kernels
      do set the registers up in start_thread, the aout loader has never
      carried the hack in mainline.
      
      Initialising the registers in this way actually goes against the libc
      expectations for ELF binaries, where argc, argv and envp are passed on
      the stack, with r0 being used to hold a pointer to an exit function for
      cleaning up after the dynamic linker if required. If the pointer is
      NULL, then it is ignored. When execing an ELF binary, Linux currently
      zeroes r0, then sets it to argc and then finally clobbers it with the
      return value of the execve syscall, so we actually end up with:
      
      	r0 = 0
      	stack[0] = argc
      	r1 = stack[1] = argv
      	r2 = stack[2] = envp
      
      libc treats r1 and r2 as undefined. The clobbering of r0 by sys_execve
      works for user-spawned threads, but when executing an ELF binary from a
      kernel thread (via call_usermodehelper), the execve is performed on the
      ret_from_fork path, which restores r0 from the saved pt_regs, resulting
      in argc being presented to the C library. This has horrible consequences
      when the application exits, since we have an exit function registered
      using argc, resulting in a jump to hyperspace.
      
      This patch solves the problem by removing the partial a.out support from
      arch/arm/ altogether.
      
      Cc: <stable@vger.kernel.org>
      Cc: Ashish Sangwan <ashishsangwan2@gmail.com>
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      acfdd4b1
  3. 24 7月, 2013 1 次提交
    • S
      ARM: EXYNOS: Update CONFIG_ARCH_NR_GPIO for Exynos · 53302bf6
      Sachin Kamat 提交于
      With the recent cleanup in Exynos platform code notably commits
      17859bec ("ARM: EXYNOS: Do not select legacy Kconfig symbols any
      more") and b9222210 ("ARM: EXYNOS: Remove mach/gpio.h"), the definition
      of ARCH_NR_GPIOS got removed. This started causing problems on SoCs like
      Exynos4412 which have more than the default number of GPIOs. Thus define
      this number in KConfig file which takes care of current SoC requirements
      and provides scope for GPIO expanders. Without this patch we get the
      following errors during boot:
      
      gpiochip_add: gpios 251..258 (gpv0) failed to register
      samsung-pinctrl 106e0000.pinctrl: failed to register gpio_chip gpv0, error code: -22
      samsung-pinctrl: probe of 106e0000.pinctrl failed with error -22
      Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
      Cc: Tomasz Figa <t.figa@samsung.com>
      Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
      53302bf6
  4. 10 7月, 2013 2 次提交
  5. 27 6月, 2013 1 次提交
  6. 26 6月, 2013 1 次提交
  7. 25 6月, 2013 1 次提交
    • S
      ARM: msm: Migrate to common clock framework · 8cc7f533
      Stephen Boyd 提交于
      Move the existing clock code in mach-msm to the common clock
      framework. We lose our capability to set the rate of and enable a
      clock through debugfs. This is ok though because the debugfs
      features are mainly used for testing and development of new clock
      code.
      
      To maintain compatibility with the original MSM clock code we
      make a wrapper for clk_reset() that calls the struct msm_clk
      specific reset function. This is necessary for the usb and sdcc
      devices on MSM until a better suited API is made available.
      
      Cc: Saravana Kannan <skannan@codeaurora.org>
      Acked-by: NMike Turquette <mturquette@linaro.org>
      Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
      Signed-off-by: NDavid Brown <davidb@codeaurora.org>
      8cc7f533
  8. 24 6月, 2013 2 次提交
    • A
      ARM: multiplatform: always pick one CPU type · 24e860fb
      Arnd Bergmann 提交于
      With the new default platform code, we can always boot using DT
      without requiring a board file, but we cannot build a kernel
      unless we select at least one CPU core, which breaks some
      "randconfig" builds.
      
      This adapts the ARCH_MULTI_V4T and ARCH_MULTI_V5 options so we
      always default to a common CPU core if no platform was enabled
      that picks something else. The default we pick for ARMv4T is
      ARM920T, while for ARMv5 we pick ARM926T.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      24e860fb
    • G
      ARM: 7773/1: PJ4B: Add support for errata 4742 · 3e0a07f8
      Gregory CLEMENT 提交于
      This commit fixes the regression on Armada 370 (the kernal hang during
      boot) introduced by the commit: "ARM: 7691/1: mm: kill unused
      TLB_CAN_READ_FROM_L1_CACHE and use ALT_SMP instead".
      
      When coming out of either a Wait for Interrupt (WFI) or a Wait for
      Event (WFE) IDLE states, a specific timing sensitivity exists between
      the retiring WFI/WFE instructions and the newly issued subsequent
      instructions. This sensitivity can result in a CPU hang scenario.  The
      workaround is to insert either a Data Synchronization Barrier (DSB) or
      Data Memory Barrier (DMB) command immediately after the WFI/WFE
      instruction.
      
      This commit was based on the work of Lior Amsalem, but heavily
      modified to apply the errata fix dynamically according to the
      processor type thanks to the suggestions of Russell King and Nicolas
      Pitre.
      Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
      Reviewed-by: NWill Deacon <will.deacon@arm.com>
      Acked-by: NNicolas Pitre <nico@linaro.org>
      Tested-by: NWilly Tarreau <w@1wt.eu>
      Cc: <stable@vger.kernel.org>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      3e0a07f8
  9. 22 6月, 2013 1 次提交
  10. 21 6月, 2013 1 次提交
  11. 19 6月, 2013 5 次提交
  12. 18 6月, 2013 3 次提交
    • M
      ARM: davinci: move private EDMA API to arm/common · 3ad7a42d
      Matt Porter 提交于
      Move mach-davinci/dma.c to common/edma.c so it can be used
      by OMAP (specifically AM33xx) as well.
      Signed-off-by: NMatt Porter <mporter@ti.com>
      Acked-by: Chris Ball <cjb@laptop.org> # davinci_mmc.c
      Acked-by: NMark Brown <broonie@linaro.org>
      Acked-by: NOlof Johansson <olof@lixom.net>
      [nsekhar@ti.com: dropped davinci sffsdr changes]
      Signed-off-by: NSekhar Nori <nsekhar@ti.com>
      3ad7a42d
    • S
      ARM: keystone: Add minimal TI Keystone platform support · 828989ad
      Santosh Shilimkar 提交于
      Texas Instruments Keystone family of multi-core devices are
      based on ARM Cortex A15. Patch adds basic definitions for a
      new Keystone sub-architecture in ARM.
      
      The TCI66xxK2H Communications Infrastructure Keystone SoCs
      are member of the C66x family based on TI's new KeyStone 2
      multi-core SoC Architecture designed specifically for high
      performance wireless and networking infrastructure applications.
      The SOCs contains many subsystems like Cortex A15 ARM CorePacs,
      C66XX DSP CorePacs, MSMC memory controller, Tera Net bus,
      IP Network, Navigator, Hyperlink, 1G/10G Ethernet, Radio layers
      and queue based communication systems.
      
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: arm@kernel.org
      Acked-by: NOlof Johansson <olof@lixom.net>
      Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      828989ad
    • S
      ARM: 7759/1: decouple CPU offlining from reboot/shutdown · 19ab428f
      Stephen Warren 提交于
      Add comments to machine_shutdown()/halt()/power_off()/restart() that
      describe their purpose and/or requirements re: CPUs being active/not.
      
      In machine_shutdown(), replace the call to smp_send_stop() with a call to
      disable_nonboot_cpus(). This completely disables all but one CPU, thus
      satisfying the requirement that only a single CPU be active for kexec.
      Adjust Kconfig dependencies for this change.
      
      In machine_halt()/power_off()/restart(), call smp_send_stop() directly,
      rather than via machine_shutdown(); these functions don't need to
      completely de-activate all CPUs using hotplug, but rather just quiesce
      them.
      
      Remove smp_kill_cpus(), and its call from smp_send_stop().
      smp_kill_cpus() was indirectly calling smp_ops.cpu_kill() without calling
      smp_ops.cpu_die() on the target CPUs first. At least some implementations
      of smp_ops had issues with this; it caused cpu_kill() to hang on Tegra,
      for example. Since smp_send_stop() is only used for shutdown, halt, and
      power-off, there is no need to attempt any kind of CPU hotplug here.
      
      Adjust Kconfig to reflect that machine_shutdown() (and hence kexec)
      relies upon disable_nonboot_cpus(). However, this alone doesn't guarantee
      that hotplug will work, or even that hotplug is implemented for a
      particular piece of HW that a multi-platform zImage runs on. Hence, add
      error-checking to machine_kexec() to determine whether it did work.
      Suggested-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      Acked-by: NWill Deacon <will.deacon@arm.com>
      Tested-by: NZhangfei Gao <zhangfei.gao@gmail.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      19ab428f
  13. 17 6月, 2013 6 次提交
  14. 15 6月, 2013 2 次提交
  15. 13 6月, 2013 1 次提交
  16. 12 6月, 2013 3 次提交
  17. 05 6月, 2013 1 次提交
  18. 04 6月, 2013 3 次提交
  19. 31 5月, 2013 1 次提交
    • L
      ARM: u300: device tree support for the timer · 5a5056cc
      Linus Walleij 提交于
      This adds device tree support for the U300 timer, by making
      the memory base offset and IRQ dynamically assigned, then
      optionally looking them up from the device tree.
      
      Since the timer needs to be registered before any platform
      devices are created, we will go into the device tree and look
      up the "/timer@c0014000" node and read our base address and
      IRQ from there.
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      5a5056cc
  20. 30 5月, 2013 1 次提交
  21. 20 5月, 2013 1 次提交
  22. 07 5月, 2013 1 次提交