- 28 4月, 2021 4 次提交
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由 Gal Pressman 提交于
The new attribute indicates that the kernel copies DMA pages on fork, hence libibverbs' fork support through madvise and MADV_DONTFORK is not needed. The introduced attribute is always reported as supported since the kernel has the patch that added the copy-on-fork behavior. This allows the userspace library to identify older vs newer kernel versions. Extra care should be taken when backporting this patch as it relies on the fact that the copy-on-fork patch is merged, hence no check for support is added. Don't backport this patch unless you also have the following series: commit 70e806e4 ("mm: Do early cow for pinned pages during fork() for ptes") and commit 4eae4efa ("hugetlb: do early cow when page pinned on src mm"). Fixes: 70e806e4 ("mm: Do early cow for pinned pages during fork() for ptes") Fixes: 4eae4efa ("hugetlb: do early cow when page pinned on src mm") Link: https://lore.kernel.org/r/20210418121025.66849-1-galpress@amazon.comSigned-off-by: NGal Pressman <galpress@amazon.com> Reviewed-by: NLeon Romanovsky <leonro@nvidia.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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由 Lv Yunlong 提交于
In bnxt_qplib_alloc_res, it calls bnxt_qplib_alloc_dpi_tbl(). Inside bnxt_qplib_alloc_dpi_tbl, dpit->dbr_bar_reg_iomem is freed via pci_iounmap() in unmap_io error branch. After the callee returns err code, bnxt_qplib_alloc_res calls bnxt_qplib_free_res()->bnxt_qplib_free_dpi_tbl() in the fail branch. Then dpit->dbr_bar_reg_iomem is freed in the second time by pci_iounmap(). My patch set dpit->dbr_bar_reg_iomem to NULL after it is freed by pci_iounmap() in the first time, to avoid the double free. Fixes: 1ac5a404 ("RDMA/bnxt_re: Add bnxt_re RoCE driver") Link: https://lore.kernel.org/r/20210426140614.6722-1-lyl2019@mail.ustc.edu.cnSigned-off-by: NLv Yunlong <lyl2019@mail.ustc.edu.cn> Reviewed-by: NLeon Romanovsky <leonro@nvidia.com> Acked-by: NDevesh Sharma <devesh.sharma@broadcom.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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由 Lv Yunlong 提交于
Our code analyzer reported a UAF. In siw_alloc_mr(), it calls siw_mr_add_mem(mr,..). In the implementation of siw_mr_add_mem(), mem is assigned to mr->mem and then mem is freed via kfree(mem) if xa_alloc_cyclic() failed. Here, mr->mem still point to a freed object. After, the execution continue up to the err_out branch of siw_alloc_mr, and the freed mr->mem is used in siw_mr_drop_mem(mr). My patch moves "mr->mem = mem" behind the if (xa_alloc_cyclic(..)<0) {} section, to avoid the uaf. Fixes: 2251334d ("rdma/siw: application buffer management") Link: https://lore.kernel.org/r/20210426011647.3561-1-lyl2019@mail.ustc.edu.cnSigned-off-by: NLv Yunlong <lyl2019@mail.ustc.edu.cn> Reviewed-by: NBernard Metzler <bmt@zurich.ihm.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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由 Jiapeng Chong 提交于
The variable rcd is being assigned a value from a calculation however the variable is never read, so this redundant variable can be removed. Cleans up the following clang-analyzer warning: drivers/infiniband/hw/hfi1/affinity.c:986:3: warning: Value stored to 'rcd' is never read [clang-analyzer-deadcode.DeadStores]. Link: https://lore.kernel.org/r/1619346696-46300-1-git-send-email-jiapeng.chong@linux.alibaba.comReported-by: NAbaci Robot <abaci@linux.alibaba.com> Signed-off-by: NJiapeng Chong <jiapeng.chong@linux.alibaba.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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- 22 4月, 2021 7 次提交
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由 Neta Ostrovsky 提交于
Add QP numbers that are associated with the SRQ to the SRQ information. The QPs are displayed in a range form. Sample output: $ rdma res show srq dev ibp8s0f0 srqn 0 type BASIC pdn 3 comm [ib_ipoib] dev ibp8s0f0 srqn 4 type BASIC lqpn 125-128,130-140 pdn 9 pid 3581 comm ibv_srq_pingpon dev ibp8s0f0 srqn 5 type BASIC lqpn 141-156 pdn 10 pid 3584 comm ibv_srq_pingpon dev ibp8s0f0 srqn 6 type BASIC lqpn 157-172 pdn 11 pid 3590 comm ibv_srq_pingpon dev ibp8s0f1 srqn 0 type BASIC pdn 3 comm [ib_ipoib] dev ibp8s0f1 srqn 1 type BASIC lqpn 329-344 pdn 4 pid 3586 comm ibv_srq_pingpon $ rdma res show srq lqpn 126-141 dev ibp8s0f0 srqn 4 type BASIC lqpn 126-128,130-140 pdn 9 pid 3581 comm ibv_srq_pingpon dev ibp8s0f0 srqn 5 type BASIC lqpn 141 pdn 10 pid 3584 comm ibv_srq_pingpon $ rdma res show srq lqpn 127 dev ibp8s0f0 srqn 4 type BASIC lqpn 127 pdn 9 pid 3581 comm ibv_srq_pingpon Link: https://lore.kernel.org/r/79a4bd4caec2248fd9583cccc26786af8e4414fc.1618753110.git.leonro@nvidia.comSigned-off-by: NNeta Ostrovsky <netao@nvidia.com> Reviewed-by: NMark Zhang <markzhang@nvidia.com> Signed-off-by: NLeon Romanovsky <leonro@nvidia.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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由 Neta Ostrovsky 提交于
Extend the RDMA nldev return a SRQ information, like SRQ number, SRQ type, PD number, CQ number and process ID that created that SRQ. Sample output: $ rdma res show srq dev ibp8s0f0 srqn 0 type BASIC pdn 3 comm [ib_ipoib] dev ibp8s0f0 srqn 4 type BASIC pdn 9 pid 3581 comm ibv_srq_pingpon dev ibp8s0f0 srqn 5 type BASIC pdn 10 pid 3584 comm ibv_srq_pingpon dev ibp8s0f0 srqn 6 type BASIC pdn 11 pid 3590 comm ibv_srq_pingpon dev ibp8s0f1 srqn 0 type BASIC pdn 3 comm [ib_ipoib] dev ibp8s0f1 srqn 1 type BASIC pdn 4 pid 3586 comm ibv_srq_pingpon Link: https://lore.kernel.org/r/322f9210b95812799190dd4a0fb92f3a3bba0333.1618753110.git.leonro@nvidia.comSigned-off-by: NNeta Ostrovsky <netao@nvidia.com> Reviewed-by: NMark Zhang <markzhang@nvidia.com> Signed-off-by: NLeon Romanovsky <leonro@nvidia.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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由 Neta Ostrovsky 提交于
In order to track SRQ resources, a new restrack object is initialized and added to the resource tracking database. Link: https://lore.kernel.org/r/0db71c409f24f2f6b019bf8797a8fed96fe7079c.1618753110.git.leonro@nvidia.comSigned-off-by: NNeta Ostrovsky <netao@nvidia.com> Reviewed-by: NMark Zhang <markzhang@nvidia.com> Signed-off-by: NLeon Romanovsky <leonro@nvidia.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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由 Neta Ostrovsky 提交于
Extend the RDMA nldev return a context information, like ctx number and process ID that created that context. This functionality is helpful to find orphan contexts that are not closed for some reason. Sample output: $ rdma res show ctx dev ibp8s0f0 ctxn 0 pid 980 comm ibv_rc_pingpong dev ibp8s0f0 ctxn 1 pid 981 comm ibv_rc_pingpong dev ibp8s0f0 ctxn 2 pid 992 comm ibv_rc_pingpong dev ibp8s0f1 ctxn 0 pid 984 comm ibv_rc_pingpong dev ibp8s0f1 ctxn 1 pid 987 comm ibv_rc_pingpong $ rdma res show ctx dev ibp8s0f1 dev ibp8s0f1 ctxn 0 pid 984 comm ibv_rc_pingpong dev ibp8s0f1 ctxn 1 pid 987 comm ibv_rc_pingpong Link: https://lore.kernel.org/r/5c956acfeac4e9d532988575f3da7d64cb449374.1618753110.git.leonro@nvidia.comSigned-off-by: NNeta Ostrovsky <netao@nvidia.com> Reviewed-by: NMark Zhang <markzhang@nvidia.com> Signed-off-by: NLeon Romanovsky <leonro@nvidia.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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由 Shay Drory 提交于
The device attach triggers addition of CM_ID to the restrack DB. However, when error occurs, we releasing this device, but defer CM_ID release. This causes to the situation where restrack sees CM_ID that is not valid anymore. As a solution, add the CM_ID to the resource tracking DB only after the attachment is finished. Found by syzcaller: infiniband syz0: added syz_tun rdma_rxe: ignoring netdev event = 10 for syz_tun infiniband syz0: set down infiniband syz0: ib_query_port failed (-19) restrack: ------------[ cut here ]------------ infiniband syz0: BUG: RESTRACK detected leak of resources restrack: User CM_ID object allocated by syz-executor716 is not freed restrack: ------------[ cut here ]------------ Fixes: b09c4d70 ("RDMA/restrack: Improve readability in task name management") Link: https://lore.kernel.org/r/ab93e56ba831eac65c322b3256796fa1589ec0bb.1618753862.git.leonro@nvidia.comSigned-off-by: NShay Drory <shayd@nvidia.com> Signed-off-by: NLeon Romanovsky <leonro@nvidia.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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由 Parav Pandit 提交于
A switchdev RDMA device do not support IB CM. When such device is added to the RDMA CM's device list, when application invokes rdma_listen(), cma attempts to listen to such device, however it has IB CM attribute disabled. Due to this, rdma_listen() call fails to listen for other non switchdev devices as well. A below error message can be seen. infiniband mlx5_0: RDMA CMA: cma_listen_on_dev, error -38 A failing call flow is below. cma_listen_on_all() cma_listen_on_dev() _cma_attach_to_dev() rdma_listen() <- fails on a specific switchdev device This is because rdma_listen() is hardwired to only work with iwarp or IB CM compatible devices. Hence, when a IB device doesn't support IB CM or IW CM, avoid adding such device to the cma list so rdma_listen() can't even be called. Link: https://lore.kernel.org/r/f9cac00d52864ea7c61295e43fb64cf4db4fdae6.1618753862.git.leonro@nvidia.comSigned-off-by: NParav Pandit <parav@nvidia.com> Signed-off-by: NLeon Romanovsky <leonro@nvidia.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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由 Bob Pearson 提交于
Fix a bug in rxe_fill_ip_info() which was attempting to convert from RDMA_NETWORK_XXX to RXE_NETWORK_XXX. .._IPV6 should have mapped to .._IPV6 not .._IPV4. Fixes: edebc840 ("RDMA/rxe: Fix small problem in network_type patch") Link: https://lore.kernel.org/r/20210421035952.4892-1-rpearson@hpe.comSuggested-by: NFrank Zago <frank.zago@hpe.com> Signed-off-by: NBob Pearson <rpearson@hpe.com> Acked-by: NZhu Yanjun <zyjzyj2000@gmail.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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- 21 4月, 2021 2 次提交
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由 Mark Bloch 提交于
Expose a non standard query port via IOCTL that will be used to expose port attributes that are specific to mlx5 devices. The new interface receives a port number to query and returns a structure that contains the available attributes for that port. This will be used to fill the gap between pure DEVX use cases and use cases where a kernel needs to inform userspace about various kernel driver configurations that userspace must use in order to work correctly. Flags is used to indicate which fields are valid on return. MLX5_IB_UAPI_QUERY_PORT_VPORT: The vport number of the queered port. MLX5_IB_UAPI_QUERY_PORT_VPORT_VHCA_ID: The VHCA ID of the vport of the queered port. MLX5_IB_UAPI_QUERY_PORT_VPORT_STEERING_ICM_RX: The vport's RX ICM address used for sw steering. MLX5_IB_UAPI_QUERY_PORT_VPORT_STEERING_ICM_TX: The vport's TX ICM address used for sw steering. MLX5_IB_UAPI_QUERY_PORT_VPORT_REG_C0: The metadata used to tag egress packets of the vport. MLX5_IB_UAPI_QUERY_PORT_ESW_OWNER_VHCA_ID: The E-Switch owner vhca id of the vport. Link: https://lore.kernel.org/r/6e2ef13e5a266a6c037eb0105eb1564c7bb52f23.1618743394.git.leonro@nvidia.comReviewed-by: NMaor Gottlieb <maorg@nvidia.com> Signed-off-by: NMark Bloch <mbloch@nvidia.com> Signed-off-by: NLeon Romanovsky <leonro@nvidia.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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由 Christophe JAILLET 提交于
'in6' is unused. It is just declared and filled-in. It can be removed. This is a left over from commit 5ea8bbfc ("mlx4: Implement IP based gids support for RoCE/SRIOV") Link: https://lore.kernel.org/r/413dc6e2ea9d85bda1131bbd6a730b7620839eab.1618932283.git.christophe.jaillet@wanadoo.frSigned-off-by: NChristophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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- 20 4月, 2021 9 次提交
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由 Maor Gottlieb 提交于
We should hold the UAPI DM type in the base struct and not the internal mlx5 type. Fixes: 251b9d78 ("RDMA/mlx5: Re-organize the DM code") Link: https://lore.kernel.org/r/58dedbd5c132660f808e59166d434e2eaa6ecf7a.1618753425.git.leonro@nvidia.comSigned-off-by: NMaor Gottlieb <maorg@nvidia.com> Signed-off-by: NLeon Romanovsky <leonro@nvidia.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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由 Parav Pandit 提交于
Currently when GID is deleted, it zero out all the fields of the RoCE address in the SET_ROCE_ADDRESS command for a specified index. roce_version = 0 means RoCEv1 in the SET_ROCE_ADDRESS command. This assumes that device has RoCEv1 always enabled which is not always correct. For example Subfunction does not support RoCEv1. Due to this assumption a previously added RoCEv2 GID is always deleted as RoCEv1 GID. This results in a below syndrome: mlx5_core.sf mlx5_core.sf.4: mlx5_cmd_check:777:(pid 4256): SET_ROCE_ADDRESS(0x761) op_mod(0x0) failed, status bad parameter(0x3), syndrome (0x12822d) Hence set the right RoCE version during GID deletion provided by the core. Link: https://lore.kernel.org/r/d3f54129c90ca329caf438dbe31875d8ad08d91a.1618753425.git.leonro@nvidia.comSigned-off-by: NParav Pandit <parav@nvidia.com> Signed-off-by: NLeon Romanovsky <leonro@nvidia.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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由 Sindhu Devale 提交于
When i40iw_hmc_sd_one fails, chunk is freed without the deletion of chunk entry in the PBLE info list. Fix it by adding the chunk entry to the PBLE info list only after successful addition of SD in i40iw_hmc_sd_one. This fixes a static checker warning reported here: https://lore.kernel.org/linux-rdma/YHV4CFXzqTm23AOZ@mwanda/ Fixes: 97158301 ("i40iw: add pble resource files") Link: https://lore.kernel.org/r/20210416002104.323-1-shiraz.saleem@intel.comReported-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NSindhu Devale <sindhu.devale@intel.com> Signed-off-by: NShiraz Saleem <shiraz.saleem@intel.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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由 Potnuri Bharat Teja 提交于
missing qpid increment leads to skipping few qpids while allocating QP. This eventually leads to adapter running out of qpids after establishing fewer connections than it actually supports. Current patch increments the qpid correctly. Fixes: cfdda9d7 ("RDMA/cxgb4: Add driver for Chelsio T4 RNIC") Link: https://lore.kernel.org/r/20210415151422.9139-1-bharat@chelsio.comSigned-off-by: NPotnuri Bharat Teja <bharat@chelsio.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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由 Wan Jiabing 提交于
struct ipoib_cm_tx is defined at 245th line. And the definition is independent on the MACRO. The declaration here is unnecessary. Remove it. Link: https://lore.kernel.org/r/20210415092124.27684-1-wanjiabing@vivo.comSigned-off-by: NWan Jiabing <wanjiabing@vivo.com> Reviewed-by: NChristoph Lameter <cl@linux.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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由 Leon Romanovsky 提交于
Instead of manually messing with parent driver module reference counting rely on export symbol mechanism to ensure that proper probe/remove chain is performed. Link: https://lore.kernel.org/r/20210401065715.565226-4-leon@kernel.orgSigned-off-by: NLeon Romanovsky <leonro@nvidia.com> Acked-By: NDevesh Sharma <devesh.sharma@broadcom.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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由 Leon Romanovsky 提交于
Convert indirect probe call to its direct equivalent to create a symbol link between RDMA and netdev modules. This will give us an ability to remove custom module reference counting that doesn't belong to the driver. Link: https://lore.kernel.org/r/20210401065715.565226-3-leon@kernel.orgSigned-off-by: NLeon Romanovsky <leonro@nvidia.com> Acked-By: NDevesh Sharma <devesh.sharma@broadcom.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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由 Leon Romanovsky 提交于
The "select" kconfig keyword provides reverse dependency, however it doesn't check that selected symbol meets its own dependencies. Usually "select" is used for non-visible symbols, so instead of trying to keep dependencies in sync with BNXT ethernet driver, simply "depends on" it, like Kconfig documentation suggest. * CONFIG_PCI is already required by BNXT * CONFIG_NETDEVICES and CONFIG_ETHERNET are needed to chose BNXT Link: https://lore.kernel.org/r/20210401065715.565226-2-leon@kernel.orgSigned-off-by: NLeon Romanovsky <leonro@nvidia.com> Acked-By: NDevesh Sharma <devesh.sharma@broadcom.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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由 Manjunath Patil 提交于
Currently IPoIB connected mode queries the device to get the pkey table entry during connection formation. This will increase the time taken to form the connection, especially when limited pkeys are in use. This gets worse when multiple connection attempts are done in parallel. Since ipoib interfaces are locked to a single pkey, use the pkey index that was determined at link up time instead of searching for anything. This improved the latency from 500ms to 1ms on an internal setup. Link: https://lore.kernel.org/r/1618338965-16717-1-git-send-email-manjunath.b.patil@oracle.comSuggested-by: NJason Gunthorpe <jgg@nvidia.com> Signed-off-by: NManjunath Patil <manjunath.b.patil@oracle.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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- 19 4月, 2021 1 次提交
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由 Håkon Bugge 提交于
In cm_req_handler(), unify the check for RoCE and re-factor to avoid one test. Link: https://lore.kernel.org/r/1617705423-15570-1-git-send-email-haakon.bugge@oracle.comSuggested-by: NJason Gunthorpe <jgg@nvidia.com> Fixes: 8f974860 ("IB/cm: Reduce dependency on gid attribute ndev check") Fixes: 194f64a3 ("RDMA/core: Fix corrupted SL on passive side") Signed-off-by: NHåkon Bugge <haakon.bugge@oracle.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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- 14 4月, 2021 17 次提交
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由 Jack Wang 提交于
When "enhanced IPoIB" is enabled for CX-5 devices it requires the parent device to be UP, otherwise the child devices won't work. Thus add a debug message to give admin a hint when only the child interface is UP but parent interface is not. Link: https://lore.kernel.org/r/20210408093215.24023-1-jinpu.wang@ionos.comSigned-off-by: NJack Wang <jinpu.wang@ionos.com> Reviewed-by: NLeon Romanovsky <leonro@nvidia.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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由 Xi Wang 提交于
Remove duplicated code for setting hem page size in PF and VF. Link: https://lore.kernel.org/r/1617715514-29039-7-git-send-email-liweihang@huawei.comSigned-off-by: NXi Wang <wangxi11@huawei.com> Signed-off-by: NWeihang Li <liweihang@huawei.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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由 Wei Xu 提交于
Introduce the VF support by adding code changes to allow VF PCI device initialization, assgining the reserved resource of the PF to the active VFs, setting the default abilities, applying the interruptions, resetting and reducing the default QP/GID number to aovid exceeding the hardware limitation. Link: https://lore.kernel.org/r/1617715514-29039-6-git-send-email-liweihang@huawei.comSigned-off-by: NWei Xu <xuwei5@hisilicon.com> Signed-off-by: NShengming Shu <shushengming1@huawei.com> Signed-off-by: NXi Wang <wangxi11@huawei.com> Signed-off-by: NWeihang Li <liweihang@huawei.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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由 Wei Xu 提交于
Switch parameters of all functions belong to a PF should be set including VFs. Link: https://lore.kernel.org/r/1617715514-29039-5-git-send-email-liweihang@huawei.comSigned-off-by: NWei Xu <xuwei5@hisilicon.com> Signed-off-by: NShengming Shu <shushengming1@huawei.com> Signed-off-by: NWeihang Li <liweihang@huawei.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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由 Wei Xu 提交于
Query the resource including EQC/SMAC/SGID from the firmware in the PF and distribute fairly among all the functions belong to the PF. Link: https://lore.kernel.org/r/1617715514-29039-4-git-send-email-liweihang@huawei.comSigned-off-by: NWei Xu <xuwei5@hisilicon.com> Signed-off-by: NShengming Shu <shushengming1@huawei.com> Signed-off-by: NWeihang Li <liweihang@huawei.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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由 Wei Xu 提交于
Query how many functions are supported by the PF from the FW and store it in the hns_roce_dev structure which will be used to support the configuration of virtual functions. Link: https://lore.kernel.org/r/1617715514-29039-3-git-send-email-liweihang@huawei.comSigned-off-by: NWei Xu <xuwei5@hisilicon.com> Signed-off-by: NShengming Shu <shushengming1@huawei.com> Signed-off-by: NWeihang Li <liweihang@huawei.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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由 Xi Wang 提交于
Use hr_reg_write/read() to simplify codes about configuring function's resource. And because the design of PF/VF fields is same, they can be defined only once. Link: https://lore.kernel.org/r/1617715514-29039-2-git-send-email-liweihang@huawei.comSigned-off-by: NXi Wang <wangxi11@huawei.com> Signed-off-by: NWeihang Li <liweihang@huawei.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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由 Gioh Kim 提交于
Two error messages are only different message but have common code to generate the path string. Link: https://lore.kernel.org/r/20210406123639.202899-4-gi-oh.kim@ionos.comSigned-off-by: NGioh Kim <gi-oh.kim@ionos.com> Signed-off-by: NJack Wang <jinpu.wang@ionos.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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由 Gioh Kim 提交于
It does not help to debug if it only print error message without any debugging information which session and connection the error happened. Link: https://lore.kernel.org/r/20210406123639.202899-3-gi-oh.kim@ionos.comSigned-off-by: NGioh Kim <gi-oh.kim@ionos.com> Signed-off-by: NJack Wang <jinpu.wang@ionos.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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由 Gioh Kim 提交于
Client prints only error value and it is not enough for debugging. 1. When client receives an error from server: the client does not only print the error value but also more information of server connection. 2. When client failes to send IO: the client gets an error from RDMA layer. It also print more information of server connection. Link: https://lore.kernel.org/r/20210406123639.202899-2-gi-oh.kim@ionos.comSigned-off-by: NGioh Kim <gi-oh.kim@ionos.com> Signed-off-by: NJack Wang <jinpu.wang@ionos.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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由 Gioh Kim 提交于
Describe new multipath policy min-latency of the RTRS client. Link: https://lore.kernel.org/r/20210407113444.150961-5-gi-oh.kim@ionos.comSigned-off-by: NGioh Kim <gi-oh.kim@ionos.com> Signed-off-by: NJack Wang <jinpu.wang@ionos.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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由 Gioh Kim 提交于
It shows the latest latency that the client checked when sending the heart-beat. Link: https://lore.kernel.org/r/20210407113444.150961-3-gi-oh.kim@ionos.comSigned-off-by: NGioh Kim <gi-oh.kim@ionos.com> Signed-off-by: NJack Wang <jinpu.wang@ionos.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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由 Gioh Kim 提交于
This patch adds new multipath policy: min-latency. Client checks the latency of each path when it sends the heart-beat. And it sends IO to the path with the minimum latency. Link: https://lore.kernel.org/r/20210407113444.150961-2-gi-oh.kim@ionos.comSigned-off-by: NGioh Kim <gi-oh.kim@ionos.com> Signed-off-by: NJack Wang <jinpu.wang@ionos.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux由 Jason Gunthorpe 提交于
Maor Gottlieb says: ==================== This series from Maor extends MEMIC to support atomic operations from the host in addition to already supported regular read/write. ==================== * 'memic_ops': RDMA/mlx5: Expose UAPI to query DM RDMA/mlx5: Add support in MEMIC operations RDMA/mlx5: Add support to MODIFY_MEMIC command RDMA/mlx5: Re-organize the DM code RDMA/mlx5: Move all DM logic to separate file RDMA/uverbs: Make UVERBS_OBJECT_METHODS to consider line number net/mlx5: Add MEMIC operations related bits
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由 Maor Gottlieb 提交于
Expose UAPI to query MEMIC DM, this will let user space application that didn't allocate the DM but has access to by owning the matching command FD to retrieve its information. Link: https://lore.kernel.org/r/20210411122924.60230-8-leon@kernel.orgSigned-off-by: NMaor Gottlieb <maorg@nvidia.com> Signed-off-by: NLeon Romanovsky <leonro@nvidia.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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由 Maor Gottlieb 提交于
MEMIC buffer, in addition to regular read and write operations, can support atomic operations from the host. Introduce and implement new UAPI to allocate address space for MEMIC operations such as atomic. This includes: 1. Expose new IOCTL for request mapping of MEMIC operation. 2. Hold the operations address in a list, so same operation to same DM will be allocated only once. 3. Manage refcount on the mlx5_ib_dm object, so it would be keep valid until all addresses were unmapped. Link: https://lore.kernel.org/r/20210411122924.60230-7-leon@kernel.orgSigned-off-by: NMaor Gottlieb <maorg@nvidia.com> Signed-off-by: NLeon Romanovsky <leonro@nvidia.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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由 Maor Gottlieb 提交于
Add two functions to allocate and deallocate MEMIC operations by using the MODIFY_MEMIC command. Link: https://lore.kernel.org/r/20210411122924.60230-6-leon@kernel.orgSigned-off-by: NMaor Gottlieb <maorg@nvidia.com> Signed-off-by: NLeon Romanovsky <leonro@nvidia.com> Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
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