1. 08 8月, 2012 2 次提交
    • J
      omap: Fix multi.h when only ARCH_OMAP3 and SOC_AM33XX are selected · 6c691b5d
      Jan Luebbe 提交于
      When only ARCH_OMAP3 (or -2,-4,...) and SOC_AM33XX are selected, multi.h
      doesn't set MULTI_OMAP2. In this case, cpu.h will simply define
      cpu_is_omap24xx() as 1.
      
      This causes problems for example for omap_hwmod.c:omap_hwmod_init which
      checks for cpu_is_omap24xx() first, using the wrong soc_ops for AM33xx.
      
      Fix this by defining MULTI_OMAP2 when using SOC_AM33XX together with
      something else.
      Signed-off-by: NJan Luebbe <jlu@pengutronix.de>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      6c691b5d
    • J
      ARM: OMAP2+: Fix dmtimer set source clock failure · 54f32a35
      Jon Hunter 提交于
      Calling the dmtimer function omap_dm_timer_set_source() fails if following a
      call to pm_runtime_put() to disable the timer. For example the following
      sequence would fail to set the parent clock ...
      
      	omap_dm_timer_stop(gptimer);
      	omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_32_KHZ);
      
      The following error message would be seen ...
      
      omap_dm_timer_set_source: failed to set timer_32k_ck as parent
      
      The problem is that, by design, pm_runtime_put() simply decrements the usage
      count and returns before the timer has actually been disabled. Therefore,
      setting the parent clock failed because the timer was still active when the
      trying to set the parent clock. Setting a parent clock will fail if the clock
      you are setting the parent of has a non-zero usage count. To ensure that this
      does not fail use pm_runtime_put_sync() when disabling the timer.
      
      Note that this will not be seen on OMAP1 devices, because these devices do
      not use the clock framework for dmtimers.
      Signed-off-by: NJon Hunter <jon-hunter@ti.com>
      Acked-by: NKevin Hilman <khilman@ti.com>
      Cc: stable@vger.kernel.org
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      54f32a35
  2. 07 8月, 2012 7 次提交
    • M
      omap2: mux: remove comment for nonexistent member · 36b547aa
      Michael Jones 提交于
      remove comment for nonexistent member
      Signed-off-by: NMichael Jones <michael.jones@matrix-vision.de>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      36b547aa
    • D
      OMAP: remove unused parameter arch_id from uncompress.h · 128aa925
      Domenico Andreoli 提交于
      There is not point in having arch_id as parameter of __arch_decomp_setup(),
      nothing in it uses arch_id. The machine id is already exported (and used)
      with symbol __machine_arch_type as per mach-types.h.
      
      Removing the pointless macro as well.
      Signed-off-by: NDomenico Andreoli <domenico.andreoli@linux.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      128aa925
    • R
      arm/dts: Mark vcxio, v2v1 and v1v8 regulators as always on · ae377aaf
      Rajendra Nayak 提交于
      vcxio, v2v1 and v1v8 are expected to be always on, update the dtsi
      for twl6030 to reflect this.
      
      commit '86f5fc' regulator: core: Mark all DT based boards as having
      full constraints) caused these to be disabled at late boot causing
      OMAP4 boards (using twl6030) to lockup.
      Reported-by: NKishon Vijay Abraham I <kishon@ti.com>
      Reported-by: NJ Keerthy <j-keerthy@ti.com>
      Signed-off-by: NRajendra nayak <rnayak@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      ae377aaf
    • S
      OMAP2+: Fix random config build break with !ARM_CPU_SUSPEND · acb11fe8
      Santosh Shilimkar 提交于
      The random config builds with PM and !ARM_CPU_SUSPEND breaks with below
      error on omap2plus_defconfig.
      
      arch/arm/mach-omap2/sleep44xx.S:323: undefined reference to `cpu_resume'
      arch/arm/mach-omap2/omap-mpuss-lowpower.c:278: undefined reference to `cpu_suspend'
      
      This is because recently merged OMAP5 platform shares the common files
      with OMAP4 but doesn't select ARM_CPU_SUSPEND. Without the ARM_CPU_SUSPEND
      the sleep code is meaningless.
      
      Fix the same by adding ARM_CPU_SUSPEND for OMAP5. The suggestion came from
      Russell King in an off-list discussion.
      
      Cc: Russell King <rmk+kernel@arm.linux.org.uk>
      Cc: Kevin Hilman <khilman@ti.com>
      Reported-by: NTony Lindgren <tony@atomide.com>
      Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      acb11fe8
    • A
      arm/dts: Fix am33xx wdt node · 5f789ebc
      Afzal Mohammed 提交于
      Add am33xx wdt node.
      Signed-off-by: NAfzal Mohammed <afzal@ti.com>
      [tony@atomide.com: I messed up and produced an empty commit db27ac80 with stg apply]
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      5f789ebc
    • J
      ARM: OMAP3: igep0020: set GPIO mode for mux mcspi1_cs2 pin · a71eb61c
      Javier Martinez Canillas 提交于
      According to the IGEPv2 Rev.C data-sheet the LAN9221i pin 14 (IRQ) is
      connected to the OMAP3730 mcspi1_cs2 pin. Since this omap mux pin acts
      as an IRQ line, it has to be configured as an input GPIO.
      
      IGEPv2 platform code sets the smsc911x_cfg->gpio_irq to GPIO 176 but
      since the mux pin default mode is MODE7 (safe_mode) the driver fails
      when trying to register the IRQ with the following error message:
      
      [    1.994598] smsc911x: Driver version 2008-10-21
      [    3.704162] irq 272: nobody cared (try booting with the "irqpoll" option)
      [    3.711364] [<c001a114>] (unwind_backtrace+0x0/0xf0) from [<c009a0d4>] (__report_bad_irq+0x20/0xbc)
      [    3.720916] [<c009a0d4>] (__report_bad_irq+0x20/0xbc) from [<c009a41c>] (note_interrupt+0x1d8/0x238)
      [    3.730560] [<c009a41c>] (note_interrupt+0x1d8/0x238) from [<c0098234>] (handle_irq_event_percpu+0xc0/0x260)
      [    3.740936] [<c0098234>] (handle_irq_event_percpu+0xc0/0x260) from [<c0098410>] (handle_irq_event+0x3c/0x5c)
      [    3.751312] [<c0098410>] (handle_irq_event+0x3c/0x5c) from [<c009abe0>] (handle_level_irq+0xac/0x10c)
      [    3.761047] [<c009abe0>] (handle_level_irq+0xac/0x10c) from [<c0097a34>] (generic_handle_irq+0x30/0x48)
      [    3.770935] [<c0097a34>] (generic_handle_irq+0x30/0x48) from [<c02a6b74>] (gpio_irq_handler+0x180/0x1d4)
      [    3.780944] [<c02a6b74>] (gpio_irq_handler+0x180/0x1d4) from [<c0097a34>] (generic_handle_irq+0x30/0x48)
      [    3.790954] [<c0097a34>] (generic_handle_irq+0x30/0x48) from [<c0013e18>] (handle_IRQ+0x4c/0xac)
      [    3.800231] [<c0013e18>] (handle_IRQ+0x4c/0xac) from [<c000858c>] (omap3_intc_handle_irq+0x60/0x74)
      [    3.809783] [<c000858c>] (omap3_intc_handle_irq+0x60/0x74) from [<c04979e4>] (__irq_svc+0x44/0x60)
      [    3.819213] Exception stack(0xee42fde0 to 0xee42fe28)
      [    3.824554] fde0: 00000001 00000001 00000000 00000000 60000013 c06cce14 c06cce14 00000110
      [    3.833190] fe00: 00000000 c06ccdf4 60000013 ee41d000 fb058064 ee42fe28 c0089e08 c04976b4
      [    3.841796] fe20: 20000013 ffffffff
      [    3.845489] [<c04979e4>] (__irq_svc+0x44/0x60) from [<c04976b4>] (_raw_spin_unlock_irqrestore+0x34/0x44)
      [    3.855499] [<c04976b4>] (_raw_spin_unlock_irqrestore+0x34/0x44) from [<c0099744>] (__setup_irq+0x1b8/0x3f0)
      [    3.865875] [<c0099744>] (__setup_irq+0x1b8/0x3f0) from [<c0099a34>] (request_threaded_irq+0xb8/0x140)
      [    3.875701] [<c0099a34>] (request_threaded_irq+0xb8/0x140) from [<c0487950>] (smsc911x_drv_probe+0x75c/0x11a4)
      [    3.886260] [<c0487950>] (smsc911x_drv_probe+0x75c/0x11a4) from [<c02e9bcc>] (platform_drv_probe+0x18/0x1c)
      [    3.906707] [<c02e89b8>] (driver_probe_device+0x90/0x210) from [<c02e8bcc>] (__driver_attach+0x94/0x98)
      [    3.916625] [<c02e8bcc>] (__driver_attach+0x94/0x98) from [<c02e7298>] (bus_for_each_dev+0x50/0x7c)
      [    3.926177] [<c02e7298>] (bus_for_each_dev+0x50/0x7c) from [<c02e81d4>] (bus_add_driver+0x184/0x248)
      [    3.935821] [<c02e81d4>] (bus_add_driver+0x184/0x248) from [<c02e909c>] (driver_register+0x78/0x12c)
      [    3.945465] [<c02e909c>] (driver_register+0x78/0x12c) from [<c0008648>] (do_one_initcall+0x34/0x178)
      [    3.955108] [<c0008648>] (do_one_initcall+0x34/0x178) from [<c066e8f4>] (kernel_init+0xfc/0x1c0)
      [    3.964385] [<c066e8f4>] (kernel_init+0xfc/0x1c0) from [<c00140b0>] (kernel_thread_exit+0x0/0x8)
      [    3.973632] handlers:
      [    3.976043] [<c034e2cc>] smsc911x_irqhandler
      [    3.980560] Disabling IRQ #272
      Signed-off-by: NJavier Martinez Canillas <javier@dowhile0.org>
      Acked-by: NEnric Balletbo i Serra <eballetbo@gmail.com>
      Tested-by: NEnric Balletbo i Serra <eballetbo@gmail.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      a71eb61c
    • I
      Revert "ARM: OMAP3530evm: set pendown_state and debounce time for ads7846" · c31cc1b7
      Igor Grinberg 提交于
      1) The above commit introduced a common ->get_pendown_state() function
      into the generic code, but that function was board-specific for the
      OMAP3EVM and thus broke most other boards using this code.
      
      2) The above commit was mis-merged introducing another bug which
      prevents the ads7846 driver probe function to succeed.
      The omap_ads7846_init() function frees the pendown GPIO in case there is
      no ->get_pendown_state() function set by the caller (board specific
      code), so it can be requested later by the ads7846 driver.
      The above commit add a common ->get_pendown_state() function without
      removing the gpio_free() call and thus once the ads7846 driver tries
      to use the pendown GPIO, it crashes as the pendown GPIO has not been
      requested.
      
      3) The above commit introduces NO new functionality as
      get_pendown_state() function is already implemented in a suitable way by
      the ads7846 driver and the debounce time handling has already been
      fixed by commit 97ee9f01 (ARM: OMAP: fix the ads7846 init code).
      
      This reverts commit 16aced80.
      
      Conflicts:
      	arch/arm/mach-omap2/common-board-devices.c
      
      Solved by taking the working version prior to the above commit.
      
      Cc: Zumeng Chen <zumeng.chen@windriver.com>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Signed-off-by: NIgor Grinberg <grinberg@compulab.co.il>
      Reviewed-by: NKevin Hilman <khilman@ti.com>
      Tested-by: NKevin Hilman <khilman@ti.com>
      Signed-off-by: NKevin Hilman <khilman@ti.com>
      c31cc1b7
  3. 03 8月, 2012 3 次提交
  4. 02 8月, 2012 7 次提交
  5. 01 8月, 2012 18 次提交
  6. 31 7月, 2012 3 次提交