- 14 1月, 2013 1 次提交
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由 Rafael J. Wysocki 提交于
The ACPI handles of PCI root bridges need to be known to acpi_bind_one(), so that it can create the appropriate "firmware_node" and "physical_node" files for them, but currently the way it gets to know those handles is not exactly straightforward (to put it lightly). This is how it works, roughly: 1. acpi_bus_scan() finds the handle of a PCI root bridge, creates a struct acpi_device object for it and passes that object to acpi_pci_root_add(). 2. acpi_pci_root_add() creates a struct acpi_pci_root object, populates its "device" field with its argument's address (device->handle is the ACPI handle found in step 1). 3. The struct acpi_pci_root object created in step 2 is passed to pci_acpi_scan_root() and used to get resources that are passed to pci_create_root_bus(). 4. pci_create_root_bus() creates a struct pci_host_bridge object and passes its "dev" member to device_register(). 5. platform_notify(), which for systems with ACPI is set to acpi_platform_notify(), is called. So far, so good. Now it starts to be "interesting". 6. acpi_find_bridge_device() is used to find the ACPI handle of the given device (which is the PCI root bridge) and executes acpi_pci_find_root_bridge(), among other things, for the given device object. 7. acpi_pci_find_root_bridge() uses the name (sic!) of the given device object to extract the segment and bus numbers of the PCI root bridge and passes them to acpi_get_pci_rootbridge_handle(). 8. acpi_get_pci_rootbridge_handle() browses the list of ACPI PCI root bridges and finds the one that matches the given segment and bus numbers. Its handle is then used to initialize the ACPI handle of the PCI root bridge's device object by acpi_bind_one(). However, this is *exactly* the ACPI handle we started with in step 1. Needless to say, this is quite embarassing, but it may be avoided thanks to commit f3fd0c8a (ACPI: Allow ACPI handles of devices to be initialized in advance), which makes it possible to initialize the ACPI handle of a device before passing it to device_register(). Accordingly, add a new __weak routine, pcibios_root_bridge_prepare(), defaulting to an empty implementation that can be replaced by the interested architecutres (x86 and ia64 at the moment) with functions that will set the root bridge's ACPI handle before its dev member is passed to device_register(). Make both x86 and ia64 provide such implementations of pcibios_root_bridge_prepare() and remove acpi_pci_find_root_bridge() and acpi_get_pci_rootbridge_handle() that aren't necessary any more. Included is a fix for breakage on systems with non-ACPI PCI host bridges from Bjorn Helgaas. Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 22 9月, 2012 1 次提交
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由 Yinghai Lu 提交于
Use kzalloc() so the struct resource doesn't contain garbage in fields we don't initialize. Signed-off-by: NYinghai Lu <yinghai@kernel.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: linux-ia64@vger.kernel.org
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- 19 9月, 2012 2 次提交
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由 Thierry Reding 提交于
Most architectures implement this in exactly the same way. Instead of having each architecture duplicate this function, provide a single implementation in the core and make it a weak symbol so that it can be overridden on architectures where it is required. Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Thierry Reding 提交于
Remove the __init annotations in order to keep pci_fixup_irqs() around after init (e.g. for hotplug). This requires the same change for the implementation of pcibios_update_irq() on all architectures. While at it, all __devinit annotations are removed as well, since they will be useless now that HOTPLUG is always on. Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 06 7月, 2012 1 次提交
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由 Myron Stowe 提交于
The PCI core provides a generic pcibios_setup() routine. Drop this architecture-specific version in favor of that. Acked-by: NTony Luck <tony.luck@intel.com> Signed-off-by: NMyron Stowe <myron.stowe@redhat.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 14 6月, 2012 2 次提交
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由 Yinghai Lu 提交于
Add the host bridge bus number aperture from _CRS to the resource list. Like the MMIO and I/O port apertures, this is used when assigning resources to hot-added devices or in the case of conflicts. [bhelgaas: changelog] CC: Tony Luck <tony.luck@intel.com> CC: Fenghua Yu <fenghua.yu@intel.com> CC: linux-ia64@vger.kernel.org Signed-off-by: NYinghai Lu <yinghai@kernel.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Yinghai Lu 提交于
Replace the struct pci_bus secondary/subordinate members with the struct resource busn_res. Later we'll build a resource tree of these bus numbers. [bhelgaas: changelog] Signed-off-by: NYinghai Lu <yinghai@kernel.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 29 3月, 2012 1 次提交
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由 David Howells 提交于
Disintegrate asm/system.h for IA64. Signed-off-by: NDavid Howells <dhowells@redhat.com> Acked-by: NTony Luck <tony.luck@intel.com> cc: linux-ia64@vger.kernel.org
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- 24 2月, 2012 1 次提交
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由 Bjorn Helgaas 提交于
Tell the PCI core about host bridge address translation so it can take care of bus-to-resource conversion for us. CC: Tony Luck <tony.luck@intel.com> CC: Jack Steiner <steiner@sgi.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 07 1月, 2012 3 次提交
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由 Bjorn Helgaas 提交于
Convert from pci_create_bus() to pci_create_root_bus(). This way the root bus resources are correct immediately. This fixes the problem of "early" and "header" quirks seeing incorrect root bus resources. We can't use pci_scan_root_bus() because, like x86, ACPI hotplug currently requires pci_bus_add_devices() in a separate host bridge .start() method. v2: fix compile error by using window resource pointer instead CC: Tony Luck <tony.luck@intel.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Bjorn Helgaas 提交于
This doesn't change any functionality, but it makes a subsequent patch slightly simpler. CC: Tony Luck <tony.luck@intel.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Myron Stowe 提交于
This patch converts IA64's architecture-specific 'pcibios_set_master()' routine to a non-inlined function. This will allow follow on patches to create a generic 'pcibios_set_master()' function using the '__weak' attribute which can be used by all architectures as a default which, if necessary, can then be over-ridden by architecture- specific code. Converting 'pci_bios_set_master()' to a non-inlined function will allow IA64's 'pcibios_set_master()' implementation to remain architecture- specific after the generic version is introduced and thus, not change current behavior. No functional change. Signed-off-by: NMyron Stowe <myron.stowe@redhat.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 01 11月, 2011 1 次提交
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由 Paul Gortmaker 提交于
Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
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- 04 4月, 2010 1 次提交
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由 Bjorn Helgaas 提交于
The acpi_pci_root structure contains all the individual items (acpi_device, domain, bus number) we pass to pci_acpi_scan_root(), so just pass the single acpi_pci_root pointer directly. This will make it easier to add _CBA support later. For _CBA, we need the entire downstream bus range, not just the base bus number. We have that in the acpi_pci_root structure, so passing the pointer makes it available to the arch-specific code. Signed-off-by: NBjorn Helgaas <bjorn.helgaas@hp.com> Reviewed-by: NKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: NLen Brown <len.brown@intel.com>
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- 24 2月, 2010 2 次提交
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由 Bjorn Helgaas 提交于
Previously we used a table of size PCI_BUS_NUM_RESOURCES (16) for resources forwarded to a bus by its upstream bridge. We've increased this size several times when the table overflowed. But there's no good limit on the number of resources because host bridges and subtractive decode bridges can forward any number of ranges to their secondary buses. This patch reduces the table to only PCI_BRIDGE_RESOURCE_NUM (4) entries, which corresponds to the number of windows a PCI-to-PCI (3) or CardBus (4) bridge can positively decode. Any additional resources, e.g., PCI host bridge windows or subtractively-decoded regions, are kept in a list. I'd prefer a single list rather than this split table/list approach, but that requires simultaneous changes to every architecture. This approach only requires immediate changes where we set up (a) host bridges with more than four windows and (b) subtractive-decode P2P bridges, and we can incrementally change other architectures to use the list. Signed-off-by: NBjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Bjorn Helgaas 提交于
No functional change; this converts loops that iterate from 0 to PCI_BUS_NUM_RESOURCES through pci_bus resource[] table to use the pci_bus_for_each_resource() iterator instead. This doesn't change the way resources are stored; it merely removes dependencies on the fact that they're in a table. Signed-off-by: NBjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 23 2月, 2010 2 次提交
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由 Dominik Brodowski 提交于
Now that we return the new resource start position, there is no need to update "struct resource" inside the align function. Therefore, mark the struct resource as const. Cc: Bjorn Helgaas <bjorn.helgaas@hp.com> Cc: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: NDominik Brodowski <linux@dominikbrodowski.net> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Dominik Brodowski 提交于
As suggested by Linus, align functions should return the start of a resource, not void. An update of "res->start" is no longer necessary. Cc: Bjorn Helgaas <bjorn.helgaas@hp.com> Cc: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: NDominik Brodowski <linux@dominikbrodowski.net> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 05 11月, 2009 3 次提交
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由 Bjorn Helgaas 提交于
Jesse accidentally applied v1 [1] of the patchset instead of v2 [2]. This is the diff between v1 and v2. The changes in this patch are: - tidied vsprintf stack buffer to shrink and compute size more accurately - use %pR for decoding and %pr for "raw" (with type and flags) instead of adding %pRt and %pRf [1] http://lkml.org/lkml/2009/10/6/491 [2] http://lkml.org/lkml/2009/10/13/441Signed-off-by: NBjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Bjorn Helgaas 提交于
This uses %pRt to print additional resource information (type, size, prefetchability, etc.) consistently. Signed-off-by: NBjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Jesse Barnes 提交于
Till now, CLS has been determined either by arch code or as L1_CACHE_BYTES. Only x86 and ia64 set CLS explicitly and x86 doesn't always get it right. On most configurations, the chance is that firmware configures the correct value during boot. This patch makes pci_init() determine CLS by looking at what firmware has configured. It scans all devices and if all non-zero values agree, the value is used. If none is configured or there is a disagreement, pci_dfl_cache_line_size is used. arch can set the dfl value (via PCI_CACHE_LINE_BYTES or pci_dfl_cache_line_size) or override the actual one. ia64, x86 and sparc64 updated to set the default cls instead of the actual one. While at it, declare pci_cache_line_size and pci_dfl_cache_line_size in pci.h and drop private declarations from arch code. Signed-off-by: NTejun Heo <tj@kernel.org> Acked-by: NDavid Miller <davem@davemloft.net> Acked-by: NGreg KH <gregkh@suse.de> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Tony Luck <tony.luck@intel.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 14 10月, 2009 1 次提交
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由 Matthew Wilcox 提交于
We had assumed that SAL firmware would return an error if it didn't understand extended config space. Unfortunately, the SAL on the SGI 750 doesn't do that, it panics the machine. So, condition the extended PCI config space accesses on SAL revision 3.2. Signed-off-by: NMatthew Wilcox <willy@linux.intel.com> Tested-by: NBrad Spengler <spender@grsecurity.net> Signed-off-by: NTony Luck <tony.luck@intel.com>
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- 01 7月, 2009 1 次提交
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由 Ingo Molnar 提交于
Should be __init. Acked-by: NTony Luck <tony.luck@intel.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 18 6月, 2009 2 次提交
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由 Matthew Wilcox 提交于
ia64 was assigning resources to root busses after allocations had been made for child busses. Calling pcibios_setup_root_windows() from pcibios_fixup_bus() solves this problem by assigning the resources to the root bus before child busses are scanned. Signed-off-by: NMatthew Wilcox <willy@linux.intel.com> Tested-by: NAndrew Patterson <andrew.patterson@hp.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Matthew Wilcox 提交于
It is generally agreed that it would be beneficial for u64 to be an unsigned long long on all architectures. ia64 (in common with several other 64-bit architectures) currently uses unsigned long. Migrating piecemeal is too painful; this giant patch fixes all compilation warnings and errors that come as a result of switching to use int-ll64.h. Note that userspace will still see __u64 defined as unsigned long. This is important as it affects C++ name mangling. [Updated by Tony Luck to change efi.h:efi_freemem_callback_t to use u64 for start/end rather than unsigned long] Signed-off-by: NMatthew Wilcox <willy@linux.intel.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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- 16 1月, 2009 1 次提交
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由 John Keller 提交于
Create a platform specific version of dma_get_required_mask() for ia64 SN Altix. All SN Altix platforms support 64 bit DMA addressing regardless of the size of system memory. Create an ia64 machvec for dma_get_required_mask, with the SN version unconditionally returning DMA_64BIT_MASK. Signed-off-by: NJohn Keller <jpk@sgi.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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- 21 10月, 2008 1 次提交
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由 Benjamin Herrenschmidt 提交于
This adds the ability to mmap legacy IO space to the legacy_io files in sysfs on platforms that support it. This will allow to clean up X to use this instead of /dev/mem for legacy IO accesses such as those performed by Int10. While at it I moved pci_create/remove_legacy_files() to pci-sysfs.c where I think they belong, thus making more things statis in there and cleaned up some spurrious prototypes in the ia64 pci.h file Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 19 8月, 2008 1 次提交
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由 Luck, Tony 提交于
The code walks all the acpi _CRS methods to see how many windows to allocate. It then scans them all again to insert_resource() for each *even if the first scan found that there were none*. Move the second scan inside the "if (windows)" clause. Signed-off-by: NTony Luck <tony.luck@intel.com>
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- 21 4月, 2008 1 次提交
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由 Bjorn Helgaas 提交于
Use the generic pci_enable_resources() instead of the arch-specific code. Unlike this arch-specific code, the generic version: - does not check for a NULL dev pointer - skips resources that have neither IORESOURCE_IO nor IORESOURCE_MEM set Signed-off-by: NBjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 16 4月, 2008 1 次提交
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由 yakui.zhao@intel.com 提交于
http://bugzilla.kernel.org/show_bug.cgi?id=10124 this change: commit 08f1c192 Author: Muli Ben-Yehuda <muli@il.ibm.com> Date: Sun Jul 22 00:23:39 2007 +0300 x86-64: introduce struct pci_sysdata to facilitate sharing of ->sysdata This patch introduces struct pci_sysdata to x86 and x86-64, and converts the existing two users (NUMA, Calgary) to use it. This lays the groundwork for having other users of sysdata, such as the PCI domains work. The Calgary bits are tested, the NUMA bits just look ok. replaces pcibios_scan_root by pci_scan_bus_parented... but in pcibios_scan_root we have a check about scanned busses. Cc: <yakui.zhao@intel.com> Cc: Stian Jordet <stian@jordet.net> Cc: Len Brown <lenb@kernel.org> Cc: Greg KH <greg@kroah.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: "Yinghai Lu" <yhlu.kernel@gmail.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 07 3月, 2008 1 次提交
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由 Harvey Harrison 提交于
__FUNCTION__ is gcc-specific, use __func__ Long lines have been kept where they exist, some small spacing changes have been done. Signed-off-by: NHarvey Harrison <harvey.harrison@gmail.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NTony Luck <tony.luck@intel.com>
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- 11 2月, 2008 1 次提交
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由 Matthew Wilcox 提交于
We want to allow different implementations of pci_raw_ops for standard and extended config space on x86. Rather than clutter generic code with knowledge of this, we make pci_raw_ops private to x86 and use it to implement the new raw interface -- raw_pci_read() and raw_pci_write(). Signed-off-by: NMatthew Wilcox <willy@linux.intel.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 26 7月, 2007 1 次提交
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由 Tony Luck 提交于
pcibios_setup (between 'pci_setup' and 'quirk_mellanox_tavor') setup_profiling_timer (between 'write_profile' and 'delayed_put_task_struct') Signed-off-by: NTony Luck <tony.luck@intel.com>
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- 12 7月, 2007 1 次提交
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由 Alex Chiang 提交于
Example memory map (HP rx7640 with 'default' acpiconfig setting, VGA disabled): 0x00000000 - 0x3FFFBFFF supports only WB (cacheable) access If a user attempts to perform an MMIO mmap (using the PCIIOC_MMAP_IS_MEM ioctl) to PCI config space (like mmap'ing and accessing memory at 0xA0000), we will MCA because the kernel will attempt to use a mapping with the UC attribute. So check the memory attribute in kern_mmap and the EFI memmap. If WC is requested, and WC or UC access is supported for the region, allow it. Otherwise, use the same attribute the kernel uses. Updates documentation and test cases as well. Signed-off-by: NAlex Chiang <achiang@hp.com> Signed-off-by: NBjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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- 23 5月, 2007 1 次提交
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由 Kenji Kaneshige 提交于
Hiroyuki Kamezawa reported the problem that pci_acpi_scan_root() of ia64 might call kmalloc_node() with zero size. Currently ia64's pci_acpi_scan_root() assumes that _CRS method of root bridge has at least one resource window. But, the root bridges that has no resource window must be taken into account. Signed-off-by: NKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NTony Luck <tony.luck@intel.com>
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- 09 5月, 2007 1 次提交
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由 Randy Dunlap 提交于
Remove includes of <linux/smp_lock.h> where it is not used/needed. Suggested by Al Viro. Builds cleanly on x86_64, i386, alpha, ia64, powerpc, sparc, sparc64, and arm (all 59 defconfigs). Signed-off-by: NRandy Dunlap <randy.dunlap@oracle.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 31 3月, 2007 1 次提交
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由 Bjorn Helgaas 提交于
Allow cacheable mmaps of legacy_mem if WB access is supported for the region. The "legacy_mem" file often contains a shadow option ROM, and some versions of X depend on this. Tim Yamin <plasm@roo.me.uk> reported that this change fixes X on a Dell PowerEdge 3250. Signed-off-by: NBjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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- 30 3月, 2007 1 次提交
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由 Tony Luck 提交于
Typo/thinko in bba6f6fcSigned-off-by: NTony Luck <tony.luck@intel.com>
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- 29 3月, 2007 1 次提交
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由 Eric W. Biederman 提交于
So I think the right solution is to simply make pci_enable_device just flip enable bits and move the rest of the work someplace else. However a thorough cleanup is a little extreme for this point in the release cycle, so I think a quick hack that makes the code not stomp the irq when msi irq's are enabled should be the first fix. Then we can later make the code not change the irqs at all. Signed-off-by: NEric W. Biederman <ebiederm@xmission.com> Signed-off-by: NIngo Molnar <mingo@elte.hu> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 08 12月, 2006 1 次提交
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由 Yan Burman 提交于
Replace kmalloc+memset with kzalloc Signed-off-by: NYan Burman <burman.yan@gmail.com> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NTony Luck <tony.luck@intel.com>
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