1. 08 2月, 2013 2 次提交
  2. 01 2月, 2013 3 次提交
  3. 28 1月, 2013 4 次提交
  4. 09 1月, 2013 1 次提交
  5. 03 12月, 2012 1 次提交
  6. 27 11月, 2012 1 次提交
    • O
      mlx4: 64-byte CQE/EQE support · 08ff3235
      Or Gerlitz 提交于
      ConnectX-3 devices can use either 64- or 32-byte completion queue
      entries (CQEs) and event queue entries (EQEs).  Using 64-byte
      EQEs/CQEs performs better because each entry is aligned to a complete
      cacheline.  This patch queries the HCA's capabilities, and if it
      supports 64-byte CQEs and EQES the driver will configure the HW to
      work in 64-byte mode.
      
      The 32-byte vs 64-byte mode is global per HCA and not per CQ or EQ.
      
      Since this mode is global, userspace (libmlx4) must be updated to work
      with the configured CQE size, and guests using SR-IOV virtual
      functions need to know both EQE and CQE size.
      
      In case one of the 64-byte CQE/EQE capabilities is activated, the
      patch makes sure that older guest drivers that use the QUERY_DEV_FUNC
      command (e.g as done in mlx4_core of Linux 3.3..3.6) will notice that
      they need an update to be able to work with the PPF. This is done by
      changing the returned pf_context_behaviour not to be zero any more. In
      case none of these capabilities is activated that value remains zero
      and older guest drivers can run OK.
      
      The SRIOV related flow is as follows
      
      1. the PPF does the detection of the new capabilities using
         QUERY_DEV_CAP command.
      
      2. the PPF activates the new capabilities using INIT_HCA.
      
      3. the VF detects if the PPF activated the capabilities using
         QUERY_HCA, and if this is the case activates them for itself too.
      
      Note that the VF detects that it must be aware to the new PF behaviour
      using QUERY_FUNC_CAP.  Steps 1 and 2 apply also for native mode.
      
      User space notification is done through a new field introduced in
      struct mlx4_ib_ucontext which holds device capabilities for which user
      space must take action. This changes the binary interface so the ABI
      towards libmlx4 exposed through uverbs is bumped from 3 to 4 but only
      when **needed** i.e. only when the driver does use 64-byte CQEs or
      future device capabilities which must be in sync by user space. This
      practice allows to work with unmodified libmlx4 on older devices (e.g
      A0, B0) which don't support 64-byte CQEs.
      
      In order to keep existing systems functional when they update to a
      newer kernel that contains these changes in VF and userspace ABI, a
      module parameter enable_64b_cqe_eqe must be set to enable 64-byte
      mode; the default is currently false.
      Signed-off-by: NEli Cohen <eli@mellanox.com>
      Signed-off-by: NOr Gerlitz <ogerlitz@mellanox.com>
      Signed-off-by: NRoland Dreier <roland@purestorage.com>
      08ff3235
  7. 08 11月, 2012 1 次提交
  8. 26 7月, 2012 1 次提交
  9. 19 7月, 2012 1 次提交
    • A
      net/mlx4_en: Add accelerated RFS support · 1eb8c695
      Amir Vadai 提交于
      Use RFS infrastructure and flow steering in HW to keep CPU
      affinity of rx interrupts and application per TCP stream.
      
      A flow steering filter is added to the HW whenever the RFS
      ndo callback is invoked by core networking code.
      
      Because the invocation takes place in interrupt context, the
      actual setup of HW is done using workqueue. Whenever new filter
      is added, the driver checks for expiry of existing filters.
      
      Since there's window in time between the point where the core
      RFS code invoked the ndo callback, to the point where the HW
      is configured from the workqueue context, the 2nd, 3rd etc
      packets from that stream will cause the net core to invoke
      the callback again and again.
      
      To prevent inefficient/double configuration of the HW, the filters
      are kept in a database which is indexed using hash function to enable
      fast access.
      Signed-off-by: NAmir Vadai <amirv@mellanox.com>
      Signed-off-by: NOr Gerlitz <ogerlitz@mellanox.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      1eb8c695
  10. 17 7月, 2012 1 次提交
  11. 08 7月, 2012 5 次提交
  12. 26 6月, 2012 2 次提交
  13. 18 5月, 2012 1 次提交
    • A
      net/mlx4_en: num cores tx rings for every UP · bc6a4744
      Amir Vadai 提交于
      Change the TX ring scheme such that the number of rings for untagged packets
      and for tagged packets (per each of the vlan priorities) is the same, unlike
      the current situation where for tagged traffic there's one ring per priority
      and for untagged rings as the number of core.
      
      Queue selection is done as follows:
      
      If the mqprio qdisc is operates on the interface, such that the core networking
      code invoked the device setup_tc ndo callback, a mapping of skb->priority =>
      queue set is forced - for both, tagged and untagged traffic.
      
      Else, the egress map skb->priority =>  User priority is used for tagged traffic, and
      all untagged traffic is sent through tx rings of UP 0.
      
      The patch follows the convergence of discussing that issue with John Fastabend
      over this thread http://comments.gmane.org/gmane.linux.network/229877
      
      Cc: John Fastabend <john.r.fastabend@intel.com>
      Cc: Liran Liss <liranl@mellanox.com>
      Signed-off-by: NAmir Vadai <amirv@mellanox.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      bc6a4744
  14. 24 4月, 2012 3 次提交
  15. 05 4月, 2012 3 次提交
  16. 07 3月, 2012 1 次提交
    • Y
      net/mlx4_en: Saving mem access on data path · ebf8c9aa
      Yevgeny Petrilin 提交于
      Localized the pdev->dev, and using dma_map instead of pci_map
      There are multiple map/unmap operations on data path,
      optimizing those by saving redundant pointer access.
      Those places were identified as hot-spots when running kernel profiling
      during some benchmarks.
      The fixes had most impact when testing packet rate with small packets,
      reducing several % from CPU load, and in some case being the difference
      between reaching wire speed or being CPU bound.
      Signed-off-by: NYevgeny Petrilin <yevgenyp@mellanox.co.il>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      ebf8c9aa
  17. 07 2月, 2012 1 次提交
  18. 01 2月, 2012 1 次提交
  19. 23 1月, 2012 2 次提交
  20. 20 12月, 2011 1 次提交
  21. 14 12月, 2011 1 次提交
  22. 09 12月, 2011 1 次提交
  23. 28 11月, 2011 1 次提交
  24. 19 10月, 2011 1 次提交