Now that the only field in struct sys_timer is .init, delete the struct,
and replace the machine descriptor .timer field with the initialization
function itself.

This will enable moving timer drivers into drivers/clocksource without
having to place a public prototype of each struct sys_timer object into
include/linux; the intent is to create a single of_clocksource_init()
function that determines which timer driver to initialize by scanning
the device dtree, much like the proposed irqchip_init() at:
http://www.spinics.net/lists/arm-kernel/msg203686.html

Includes mach-omap2 fixes from Igor Grinberg.
Tested-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

I2S controller has an internal mux for RCLK source clks. The list
of source clk names were passed through platform data in non-dt case.
The variable holding the list of RCLK source clk names is not
required, as the list of clks need to be registered with clkdev
using generic connection id. This is required as part of adding DT
support for I2S controller driver.
Signed-off-by: NPadmavathi Venna <padma.v@samsung.com>
Acked-by: NSangbeom Kim <sbkim73@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Replace clock instance name of MSHC controller for BIC and CIU of Exynos4412.
Signed-off-by: NDongjin Kim <tobetter@gmail.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

When DRM support for Samsung SoC and Samsung S3C framebuffer support
are selected, the kernel crashes as it does not get the required
platform data. Change the compile macro to CONFIG_DRM_EXYNOS_FIMD
to fix this.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

When DRM support for Samsung SoC and Samsung S3C framebuffer support
are selected, the kernel crashes as it does not get the required
platform data. Change the compile macro to CONFIG_DRM_EXYNOS_FIMD
to fix this.

Fixes the following boot time crash:
Unable to handle kernel NULL pointer dereference at virtual address 00000000
PC is at 0x0
LR is at s3c_fb_probe+0x198/0x788
[<c0152270>] (s3c_fb_probe+0x198/0x788) from [<c019e52c>] (platform_drv_probe+0x18/0x1c)
[<c019e52c>] (platform_drv_probe+0x18/0x1c) from [<c019d2e4>] (driver_probe_device+0x70/0x1f0)
[<c019d2e4>] (driver_probe_device+0x70/0x1f0) from [<c019d4f0>] (__driver_attach+0x8c/0x90)
[<c019d4f0>] (__driver_attach+0x8c/0x90) from [<c019bc3c>] (bus_for_each_dev+0x50/0x7c)
[<c019bc3c>] (bus_for_each_dev+0x50/0x7c) from [<c019cb4c>] (bus_add_driver+0x170/0x23c)
[<c019cb4c>] (bus_add_driver+0x170/0x23c) from [<c019d9a4>] (driver_register+0x78/0x144)
[<c019d9a4>] (driver_register+0x78/0x144) from [<c000862c>] (do_one_initcall+0x34/0x174)
[<c000862c>] (do_one_initcall+0x34/0x174) from [<c020ed7c>] (kernel_init+0x100/0x2a0)
[<c020ed7c>] (kernel_init+0x100/0x2a0) from [<c000e118>] (ret_from_fork+0x14/0x3c)
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

When DRM support for Samsung SoC and Samsung S3C framebuffer support
are selected, the kernel crashes as it does not get the required
platform data. Change the compile macro to CONFIG_DRM_EXYNOS_FIMD
to fix this.

Without this patch the following crash occurs during bootup:

Unable to handle kernel NULL pointer dereference at virtual address 00000000
PC is at 0x0
LR is at s3c_fb_probe+0x198/0x788
[<c01520e8>] (s3c_fb_probe+0x198/0x788) from [<c01a3dd4>] (platform_drv_probe+0x18/0x1c)
[<c01a3dd4>] (platform_drv_probe+0x18/0x1c) from [<c01a2b8c>] (driver_probe_device+0x70/0x1f0)
[<c01a2b8c>] (driver_probe_device+0x70/0x1f0) from [<c01a2d98>] (__driver_attach+0x8c/0x90)
[<c01a2d98>] (__driver_attach+0x8c/0x90) from [<c01a14e4>] (bus_for_each_dev+0x50/0x7c)
[<c01a14e4>] (bus_for_each_dev+0x50/0x7c) from [<c01a23f4>] (bus_add_driver+0x170/0x23c)
[<c01a23f4>] (bus_add_driver+0x170/0x23c) from [<c01a324c>] (driver_register+0x78/0x144)
[<c01a324c>] (driver_register+0x78/0x144) from [<c000862c>] (do_one_initcall+0x34/0x174)
[<c000862c>] (do_one_initcall+0x34/0x174) from [<c01de210>] (kernel_init+0x100/0x2a0)
[<c01de210>] (kernel_init+0x100/0x2a0) from [<c000e118>] (ret_from_fork+0x14/0x3c)
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This fixes following:
arch/arm/mach-exynos/built-in.o: In function `exynos5_reserve':
arch/arm/mach-exynos/mach-exynos5-dt.c:177: undefined reference to `s5p_fdt_find_mfc_mem'
arch/arm/mach-exynos/mach-exynos5-dt.c:177: undefined reference to `s5p_fdt_find_mfc_mem'
arch/arm/mach-exynos/mach-exynos5-dt.c:178: undefined reference to `s5p_mfc_reserve_mem'
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

In file included from arch/arm/mach-exynos/clock-exynos5.c:29:0:
arch/arm/mach-exynos/common.h:28:12: warning: 'exynos_pm_late_initcall' defined but not used [-Wunused-function]
Signed-off-by: NOlof Johansson <olof@lixom.net>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Shawn Guo <shawn.guo@linaro.org>

Previously, the ASoC 'platform' (PCM/DMA) object was instantiated via a
platform_device. This didn't represent the hardware well, since there
was no separate hardware associated with this platform_device; it was a
virtual device with sole purpose to call snd_soc_register_platform().

This change removes the platform_device completely. Each Samsung DAI now
registers the ASoC 'platform' itself. Machine drivers are adjusted for
the new 'platform' name.
Signed-off-by: NPadmavathi Venna <padma.v@samsung.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

The recent commit "ARM: EXYNOS: add support for EXYNOS5440 SoC" broke
support for exynos5250 because of_machine_is_compatible() was used too
early in the boot process.  It also probably meant that the exynos5440
failed to use the proper iotable.  Switch to use
of_flat_dt_is_compatible() in both of these cases.

The failure I was seeing in exynos5250 because of this was:
  Division by zero in kernel.
  [<80015ed4>] (unwind_backtrace+0x0/0xec) from [<8045c7a4>] (dump_stack+0x20/0x24)
  [<8045c7a4>] (dump_stack+0x20/0x24) from [<80012990>] (__div0+0x20/0x28)
  [<80012990>] (__div0+0x20/0x28) from [<8021ab04>] (Ldiv0_64+0x8/0x18)
  [<8021ab04>] (Ldiv0_64+0x8/0x18) from [<80068560>] (__clocksource_updatefreq_scale+0x54/0x134)
  [<80068560>] (__clocksource_updatefreq_scale+0x54/0x134) from [<8006865c>] (__clocksource_register_scale+0x1c/0x54)
  [<8006865c>] (__clocksource_register_scale+0x1c/0x54) from [<80612a18>] (exynos_timer_init+0x100/0x1e8)
  [<80612a18>] (exynos_timer_init+0x100/0x1e8) from [<8060d184>] (time_init+0x28/0x38)
  [<8060d184>] (time_init+0x28/0x38) from [<8060a754>] (start_kernel+0x1e0/0x3c8)
  [<8060a754>] (start_kernel+0x1e0/0x3c8) from [<40008078>] (0x40008078)
Signed-off-by: NDoug Anderson <dianders@chromium.org>
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
[olofj: fixed two build errors, one missing include and one !CONFIG_OF failure]
Signed-off-by: NOlof Johansson <olof@lixom.net>

Add missing PL330 MDMA1 controller node to the device tree (DT).

[ Currently there is no problem with using 'non-secure' mdma1 address
  instead of 'secure' one on revision 0 of Exynos4210 SOC (as used by
  Universal C210 board) as this SOC revision is unsupported by DT. ]
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Exynos4412 uses different information register for each core. This
patch adjusts the bring-up code to take that into account.
Signed-off-by: NTomasz Figa <t.figa@samsung.com>
Reviewed-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Remove the unused regs-mem.h file
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

With device tree support enabled for dwmci controller, the unused
non-dt support for dwmci controller can be removed.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
[kgene.kim@samsung.com: updated as per Seungwon Jeon's pointing out]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The core cpu_suspend code no longer calls flush_cache_all to
optimize the cpu idle flow. Add a call for the same in the
exynos specific suspend code.
Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Cortex A9 based exynos4 has a memory mapped SCU while the Cortex
A15 based exynos5 does not. Hence, remove the call to scu_enable
for exynos5.
Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: NInderpal Singh <inderpal.singh@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Upon wake-up, clear the sleep mode set in INFORM1 register.
Signed-off-by: NInderpal Singh <inderpal.singh@samsung.com>
Tested-by: NAbhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Set the gic arch extension callback to support rtc wakeup.
Signed-off-by: NInderpal Singh <inderpal.singh@samsung.com>
Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The sequence of cpu_enter_lowpower() for Cortex-A15 is
different from the sequence for Cortex-A9. This patch
implements cpu_enter_lowpower() for EXYNOS5 SoC which
has Cortex-A15 cores.

Basded on original patch has been submitted by Changhwan Youn
Signed-off-by: NChanghwan Youn <chaos.youn@samsung.com>
Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
[kgene.kim@samsung.com: use flush_cache_louis() instead of
flush_cache_all() as per Lorenzo and Santosh's suggestion]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds support for EXYNOS5440 SoC which is including
ARM Cortex-A15 Quad cores.
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds a way to specify bindings between devices and power
domains using device tree.

A device can be bound to particular power domain by adding a
power-domain property containing a phandle to the domain. The device
will be bound to the domain before binding a driver to it and unbound
after unbinding a driver from it.
Signed-off-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds initialization of name field in generic power domain
struct.
Signed-off-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Initial state of power domains might vary on different boards and with
different bootloaders.

This patch adds detection of initial state of power domains when being
registered from DT.
Signed-off-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Needed to match device ids for clocks, etc.
Signed-off-by: NOlof Johansson <olof@lixom.net>
Signed-off-by: NDoug Anderson <dianders@chromium.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds Device Nodes for SATA and SATA PHY device.
Signed-off-by: NVasanth Ananthan <vasanth.a@samsung.com>
[kgene.kim@samsung.com: removed address definitions as per comments]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds neccessary clock entries for SATA, SATA PHY and
I2C_SATAPHY
Signed-off-by: NVasanth Ananthan <vasanth.a@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

chained_irq_enter/exit() already mask&ack/unmask the chained interrupt.
There is no need to also explicitly do it in the handler.
Signed-off-by: NDaniel Kurtz <djkurtz@chromium.org>
Acked-by: NDoug Anderson <dianders@chromium.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Commit 82145130 ("ARM: EXYNOS: fix address for EXYNOS4 MDMA1")
changed EXYNOS specific setup of PL330 DMA engine to use 'non-secure'
mdma1 address instead of 'secure' one (from 0x12840000 to 0x12850000)
to fix issue with some Exynos4212 SOCs.  Unfortunately it brakes
PL330 setup for revision 0 of Exynos4210 SOC (mdma1 device cannot
be found at 'non-secure' address):

[    0.566245] dma-pl330 dma-pl330.2: PERIPH_ID 0x0, PCELL_ID 0x0 !
[    0.566278] dma-pl330: probe of dma-pl330.2 failed with error -22

Fix it by using 'secure' mdma1 address on Exynos4210 revision 0 SOC.
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

In idle state down clocking the arm cores can result in power
savings. Program the power control registers to achieve this and
save these registers across a suspend/resume cycle.
Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

On resuming from suspend the i2c configuration register that is part
of system controller resets to 0xf. This sets the interrupt source to
the new high speed i2c rather than the legacy one that we are using.
Save and restore the I2C_CFG register for exynos5 to fix this.
Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

On Exynos5 we have a new high-speed i2c controller. The interrupt
sources for the legacy and new controller are muxed and are controlled
via the SYSCON I2C_CFG register. At reset the interrupt source is
configured for the high-speed controller, to continue using the old
i2c controller we need to modify the I2C_CFG register.
Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

All EXYNOS5 based platforms support only device tree based boot and so the
unused non-dt code that sets i2c0 resource information and device names for
sdhci and i2c platform devices are removed.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds missing USB OTG regulators needed for s3c-hsotg driver
to work on Origen board.

Confirmed with schematics of and tested on Origen board.
Signed-off-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Fixes the following warnings:
arch/arm/mach-exynos/clock-exynos5.c:300:19: warning:
symbol 'exynos5_clk_mout_mpll' was not declared. Should it be static?
arch/arm/mach-exynos/clock-exynos5.c:475:12: warning:
symbol 'exynos5_clkset_aclk_top_list' was not declared. Should it be static?
arch/arm/mach-exynos/clock-exynos5.c:480:23: warning:
symbol 'exynos5_clkset_aclk' was not declared. Should it be static?
arch/arm/mach-exynos/clock-exynos5.c:494:12: warning:
symbol 'exynos5_clkset_aclk_333_166_list' was not declared. Should it be static?
arch/arm/mach-exynos/clock-exynos5.c:499:23: warning:
symbol 'exynos5_clkset_aclk_333_166' was not declared. Should it be static?
arch/arm/mach-exynos/clock-exynos5.c:989:12: warning:
symbol 'exynos5_clkset_group_list' was not declared. Should it be static?
arch/arm/mach-exynos/clock-exynos5.c:1002:23: warning:
symbol 'exynos5_clkset_group' was not declared. Should it be static?
arch/arm/mach-exynos/clock-exynos5.c:1218:19: warning:
symbol 'exynos5_clk_sclk_fimd1' was not declared. Should it be static?
arch/arm/mach-exynos/clock-exynos5.c:1499:20: warning:
symbol 'exynos5_clock_syscore_ops' was not declared. Should it be static?
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Silences the following warning:
arch/arm/mach-exynos/common.c:576:12: warning:
symbol 'combiner_of_init' was not declared. Should it be static?
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

EXYNOS5_USB_CFG macro should actually point to USB20PHY_CFG system
register (base addr + 0x230). It's wrongly placed in regs-pmu.
Actual register at offset 0x230 in PMU is SEQ_TRANSITION4.
Signed-off-by: NVivek Gautam <gautam.vivek@samsung.com>
Reviewed-by: NJingoo Han <jg1.han@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch modifies the old wakeup interrupt initialization code to
detect pinctrl driver by using for_each_matching_node instead of
for_each_compatible_node and adds match table for both EXYNOS4210 and
EXYNOS4X12.
Signed-off-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Acked-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds device tree sources for EXYNOS4X12 SoC series
(currently EXYNOS4212 and EXYNOS4412) and enables mach-exynos4-dt
to support these SoCs.
Signed-off-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>