1. 06 12月, 2012 1 次提交
  2. 28 11月, 2012 1 次提交
  3. 06 10月, 2012 15 次提交
  4. 06 9月, 2012 1 次提交
  5. 06 8月, 2012 1 次提交
  6. 30 5月, 2012 1 次提交
    • P
      KVM: PPC: Book3S HV: Make the guest hash table size configurable · 32fad281
      Paul Mackerras 提交于
      This adds a new ioctl to enable userspace to control the size of the guest
      hashed page table (HPT) and to clear it out when resetting the guest.
      The KVM_PPC_ALLOCATE_HTAB ioctl is a VM ioctl and takes as its parameter
      a pointer to a u32 containing the desired order of the HPT (log base 2
      of the size in bytes), which is updated on successful return to the
      actual order of the HPT which was allocated.
      
      There must be no vcpus running at the time of this ioctl.  To enforce
      this, we now keep a count of the number of vcpus running in
      kvm->arch.vcpus_running.
      
      If the ioctl is called when a HPT has already been allocated, we don't
      reallocate the HPT but just clear it out.  We first clear the
      kvm->arch.rma_setup_done flag, which has two effects: (a) since we hold
      the kvm->lock mutex, it will prevent any vcpus from starting to run until
      we're done, and (b) it means that the first vcpu to run after we're done
      will re-establish the VRMA if necessary.
      
      If userspace doesn't call this ioctl before running the first vcpu, the
      kernel will allocate a default-sized HPT at that point.  We do it then
      rather than when creating the VM, as the code did previously, so that
      userspace has a chance to do the ioctl if it wants.
      
      When allocating the HPT, we can allocate either from the kernel page
      allocator, or from the preallocated pool.  If userspace is asking for
      a different size from the preallocated HPTs, we first try to allocate
      using the kernel page allocator.  Then we try to allocate from the
      preallocated pool, and then if that fails, we try allocating decreasing
      sizes from the kernel page allocator, down to the minimum size allowed
      (256kB).  Note that the kernel page allocator limits allocations to
      1 << CONFIG_FORCE_MAX_ZONEORDER pages, which by default corresponds to
      16MB (on 64-bit powerpc, at least).
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      [agraf: fix module compilation]
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      32fad281
  7. 06 5月, 2012 2 次提交
  8. 08 4月, 2012 5 次提交
  9. 08 3月, 2012 1 次提交
  10. 05 3月, 2012 12 次提交
    • A
      KVM: PPC: Rename MMIO register identifiers · b3c5d3c2
      Alexander Graf 提交于
      We need the KVM_REG namespace for generic register settings now, so
      let's rename the existing users to something different, enabling
      us to reuse the namespace for more visible interfaces.
      
      While at it, also move these private constants to a private header.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      b3c5d3c2
    • P
      KVM: PPC: Move kvm_vcpu_ioctl_[gs]et_one_reg down to platform-specific code · 31f3438e
      Paul Mackerras 提交于
      This moves the get/set_one_reg implementation down from powerpc.c into
      booke.c, book3s_pr.c and book3s_hv.c.  This avoids #ifdefs in C code,
      but more importantly, it fixes a bug on Book3s HV where we were
      accessing beyond the end of the kvm_vcpu struct (via the to_book3s()
      macro) and corrupting memory, causing random crashes and file corruption.
      
      On Book3s HV we only accept setting the HIOR to zero, since the guest
      runs in supervisor mode and its vectors are never offset from zero.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      [agraf update to apply on top of changed ONE_REG patches]
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      31f3438e
    • A
      KVM: PPC: Add support for explicit HIOR setting · 1022fc3d
      Alexander Graf 提交于
      Until now, we always set HIOR based on the PVR, but this is just wrong.
      Instead, we should be setting HIOR explicitly, so user space can decide
      what the initial HIOR value is - just like on real hardware.
      
      We keep the old PVR based way around for backwards compatibility, but
      once user space uses the SET_ONE_REG based method, we drop the PVR logic.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      1022fc3d
    • A
      KVM: PPC: Add generic single register ioctls · e24ed81f
      Alexander Graf 提交于
      Right now we transfer a static struct every time we want to get or set
      registers. Unfortunately, over time we realize that there are more of
      these than we thought of before and the extensibility and flexibility of
      transferring a full struct every time is limited.
      
      So this is a new approach to the problem. With these new ioctls, we can
      get and set a single register that is identified by an ID. This allows for
      very precise and limited transmittal of data. When we later realize that
      it's a better idea to shove over multiple registers at once, we can reuse
      most of the infrastructure and simply implement a GET_MANY_REGS / SET_MANY_REGS
      interface.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      e24ed81f
    • M
      KVM: PPC: Add KVM_CAP_NR_VCPUS and KVM_CAP_MAX_VCPUS · b5434032
      Matt Evans 提交于
      PPC KVM lacks these two capabilities, and as such a userland system must assume
      a max of 4 VCPUs (following api.txt).  With these, a userland can determine
      a more realistic limit.
      Signed-off-by: NMatt Evans <matt@ozlabs.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      b5434032
    • M
      KVM: PPC: Fix vcpu_create dereference before validity check. · 03cdab53
      Matt Evans 提交于
      Fix usage of vcpu struct before check that it's actually valid.
      Signed-off-by: NMatt Evans <matt@ozlabs.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      03cdab53
    • P
      KVM: PPC: Implement MMU notifiers for Book3S HV guests · 342d3db7
      Paul Mackerras 提交于
      This adds the infrastructure to enable us to page out pages underneath
      a Book3S HV guest, on processors that support virtualized partition
      memory, that is, POWER7.  Instead of pinning all the guest's pages,
      we now look in the host userspace Linux page tables to find the
      mapping for a given guest page.  Then, if the userspace Linux PTE
      gets invalidated, kvm_unmap_hva() gets called for that address, and
      we replace all the guest HPTEs that refer to that page with absent
      HPTEs, i.e. ones with the valid bit clear and the HPTE_V_ABSENT bit
      set, which will cause an HDSI when the guest tries to access them.
      Finally, the page fault handler is extended to reinstantiate the
      guest HPTE when the guest tries to access a page which has been paged
      out.
      
      Since we can't intercept the guest DSI and ISI interrupts on PPC970,
      we still have to pin all the guest pages on PPC970.  We have a new flag,
      kvm->arch.using_mmu_notifiers, that indicates whether we can page
      guest pages out.  If it is not set, the MMU notifier callbacks do
      nothing and everything operates as before.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      342d3db7
    • P
      KVM: PPC: Make wakeups work again for Book3S HV guests · 4e72dbe1
      Paul Mackerras 提交于
      When commit f43fdc15fa ("KVM: PPC: booke: Improve timer register
      emulation") factored out some code in arch/powerpc/kvm/powerpc.c
      into a new helper function, kvm_vcpu_kick(), an error crept in
      which causes Book3s HV guest vcpus to stall.  This fixes it.
      On POWER7 machines, guest vcpus are grouped together into virtual
      CPU cores that share a single waitqueue, so it's important to use
      vcpu->arch.wqp rather than &vcpu->wq.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      4e72dbe1
    • A
      KVM: PPC: align vcpu_kick with x86 · ae21216b
      Alexander Graf 提交于
      Our vcpu kick implementation differs a bit from x86 which resulted in us not
      disabling preemption during the kick. Get it a bit closer to what x86 does.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      ae21216b
    • S
      KVM: PPC: booke: Improve timer register emulation · dfd4d47e
      Scott Wood 提交于
      Decrementers are now properly driven by TCR/TSR, and the guest
      has full read/write access to these registers.
      
      The decrementer keeps ticking (and setting the TSR bit) regardless of
      whether the interrupts are enabled with TCR.
      
      The decrementer stops at zero, rather than going negative.
      
      Decrementers (and FITs, once implemented) are delivered as
      level-triggered interrupts -- dequeued when the TSR bit is cleared, not
      on delivery.
      Signed-off-by: NLiu Yu <yu.liu@freescale.com>
      [scottwood@freescale.com: significant changes]
      Signed-off-by: NScott Wood <scottwood@freescale.com>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      dfd4d47e
    • S
      KVM: PPC: Paravirtualize SPRG4-7, ESR, PIR, MASn · b5904972
      Scott Wood 提交于
      This allows additional registers to be accessed by the guest
      in PR-mode KVM without trapping.
      
      SPRG4-7 are readable from userspace.  On booke, KVM will sync
      these registers when it enters the guest, so that accesses from
      guest userspace will work.  The guest kernel, OTOH, must consistently
      use either the real registers or the shared area between exits.  This
      also applies to the already-paravirted SPRG3.
      
      On non-booke, it's not clear to what extent SPRG4-7 are supported
      (they're not architected for book3s, but exist on at least some classic
      chips).  They are copied in the get/set regs ioctls, but I do not see any
      non-booke emulation.  I also do not see any syncing with real registers
      (in PR-mode) including the user-readable SPRG3.  This patch should not
      make that situation any worse.
      Signed-off-by: NScott Wood <scottwood@freescale.com>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      b5904972
    • S
      KVM: PPC: Move prepare_to_enter call site into subarch code · 25051b5a
      Scott Wood 提交于
      This function should be called with interrupts disabled, to avoid
      a race where an exception is delivered after we check, but the
      resched kick is received before we disable interrupts (and thus doesn't
      actually trigger the exit code that would recheck exceptions).
      
      booke already does this properly in the lightweight exit case, but
      not on initial entry.
      
      For now, move the call of prepare_to_enter into subarch-specific code so
      that booke can do the right thing here.  Ideally book3s would do the same
      thing, but I'm having a hard time seeing where it does any interrupt
      disabling of this sort (plus it has several additional call sites), so
      I'm deferring the book3s fix to someone more familiar with that code.
      book3s behavior should be unchanged by this patch.
      Signed-off-by: NScott Wood <scottwood@freescale.com>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      25051b5a