Rearrange the pm_runtime_get/put_sync calls so the IP will be turned off
when it is not in use.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

The edma-pcm performs as good as the old davinci-pcm and it's use does not
require the 'ping-pong' mode of davinci-pcm, which was introduced to
overcome under/over flow issues when using davinci-pcm.

Keep the SND_DAVINCI_SOC config option to select the SND_EDMA_SOC to avoid
regression in audio support.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Support for setups where codec is bitclock slave and frame master.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

One of the McASP instances in DM646x line of DMSoC only supports DIT mode.
This means that the given IP does not have support for rx and all the rx
related resources are missing, like irq and DMA request.
The driver should not fail if any or all  of the RX resource is missing
when the op_mode is set to DIT mode.
Since RX is not possible in DIT mode, we can just ignore the rx resources
when the McASP is used in DIT mode.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

On DA830 devices McASP0,1 and 2 shares a single combined interrupt request
line.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Some SoC, like da850/OMAP-L138 uses one common interrupt request for TX/RX
events.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

An underrun (playback) event occurs when the serializer transfer
data from the XRBUF buffer to the XRSR shift register, but the
XRBUF hasn't been filled. Similarly, the overrun (capture) event
occurs when data from the XRSR shift register is transferred to
the XRBUF but it hasn't been read yet.

These events are handled as XRUN events that cause the pcm to stop.
The stream has to be explicitly restarted by the userspace which
ensures that after stopping/starting McASP the data transfer is
aligned with DMA. The other possibility was to internally stop and
start McASP without DMA even knowing about it.
Signed-off-by: NMisael Lopez Cruz <misael.lopez@ti.com>
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Active slots count depends on the number of channels in the stream
and the number of active serializers. Each serializer will handle
at most the number of channels specified via 'tdm-slots' parameter
in DT.

There are two possible scenarios:

- Single serializer: channel count fits in the max slots supported by
  McASP serializers, active slots is same as channel count

- Multiple serializers: channel count is bigger than max slots supported
  by a serializer. Channel count determines how many serializers are
  needed at their max slot count configuration
Signed-off-by: NMisael Lopez Cruz <misael.lopez@ti.com>
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

In IIS (I2S, TDM, etc) mode the maximum number of allowed channels for
either direction can be:
number of serializers for the direction * tdm_slots.
This constraint applicable for the first stream, while consequent stream
should not have more channels then the first stream.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Instead of validating the tdm_slots parameter every time at hw_params we
can do it once during probe. If the parameter is not valid (<2 or >32)
print an error and fix it up.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

When the bus is configured to have more BCLK then the data type demands we
need to use the rotation to move the data to correct place.
Reported-by: NMisael Lopez Cruz <misael.lopez@ti.com>
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

In IIS mode the tx and rx configuration is symmetric, the BCLK and FSYNC is
shared.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

If probe fails then we need to call pm_runtime_disable() to balance
out the previous pm_runtime_enable() call.
Signed-off-by: NAnil Kumar <anilk4.v@gmail.com>
Acked-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

In this way the start code for tx/rx going to be located at the same place.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

The AFIFO should not be stopped (or started for that matter) when McASP is
running since it can cause unpredictable issues because we are switching off
AFIFO for the direction which was handling the requests from McASP and was
generating DMA request toward the system DMA.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Follow the sequence described in the TRMs when starting RX.
Write to RXBUF register was not correct and there is no need to release the
RX state machine/Receive frame sync generator twice.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Follow the sequence described in the TRMs when starting TX. This sequence
will make sure that we are not facing with initial channel swap caused by
no data available in McASP for transmit.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

A platform_driver does not need to set an owner, it will be populated by the
driver core.
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

If the board is sent to suspend (deep sleep) the McASP context will be lost.
In case when suspend happens during active audio we need to save and restore
more registers, which was configured during hw_param times as well.
We need to add more config registers, AFIFO control registers and we also
need to save and restore the serializer configuration as well.
Since the number of serializers depends on the SoC we need to allocate the
memory for it based on the num_serializer for the given McASP instance.

With this patch the ongoing stream will resume after resuming from deep
sleep.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Instead of individual values use an array to store the registers need to be
saved on suspend and restored on resume.
It is going to be easier to add more registers to save and restore.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

In case of capture we should not use rotation. The reverse and mask is
enough to get the data align correctly from the bus to MCU:
Format	  data from bus    after reverse (XRBUF)
S16_LE:  |LSB|MSB|xxx|xxx|  |xxx|xxx|MSB|LSB|
S24_3LE: |LSB|DAT|MSB|xxx|  |xxx|MSB|DAT|LSB|
S24_LE:  |LSB|DAT|MSB|xxx|  |xxx|MSB|DAT|LSB|
S32_LE:  |LSB|DAT|DAT|MSB|  |MSB|DAT|DAT|LSB|

With this patch all supported formats will work for playback and capture.

Reported-by: Jyri Sarha <jsarha@ti.com> (broken S24_3LE capture)
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org

The implicit BLCK divider setting was broken by "ASoC: mcasp: don't
override bclk divider if it was provided by the machine"-patch. After
the BCLK divider is implicitly set for the first time the
mcasp->bclk_div gets a non zero value and the implicit setting is
"turned off".
Signed-off-by: NJyri Sarha <jsarha@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

If a machine driver provides an BCLK divider to the McASP driver, skip the
automatic calculation.

This fixes machines on which the physical sample transport always works
in 32 bits, even though not all of them are actually used.
snd_soc_params_to_bclk() will fail to address such cases properly.
Signed-off-by: NDaniel Mack <zonque@gmail.com>
Acked-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

Use the edma-pcm with AM335x and AM437x SoCs.
Keep using the davinci-pcm for daVinci devices, they can be switched to use
the dmaengine based driver later when they are verified to work correctly.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Tested-by: NDaniel Mack <daniel@zonque.org>
Signed-off-by: NMark Brown <broonie@linaro.org>

In case of S24_LE/U24_LE modes we expect 24bits on the bus while the samples
are stored and transferred in memory on 32bits (lower 3 bytes of the 4
bytes).
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Tested-by: NDaniel Mack <daniel@zonque.org>
Signed-off-by: NMark Brown <broonie@linaro.org>

Do not fail if the exact BLCK rate can not be produced, just print a
warning. Check that sysclk frequency is set before implicitly setting
the BCLK divider.
Signed-off-by: NJyri Sarha <jsarha@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

Fixes build with SND_DAVINCI_SOC or SND_OMAP_SOC alone and adds build
dependecy to SND_DAVINCI_SOC or SND_OMAP_SOC.
Signed-off-by: NJyri Sarha <jsarha@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

In DIT (S/PDIF) mode, program the transmitted user bits to reflect the
configured sample rate, along with some other details.
Signed-off-by: NDaniel Mack <zonque@gmail.com>
Acked-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

Make including the omap-pcm.h outside sound/soc/omap more convenient.
Signed-off-by: NJyri Sarha <jsarha@ti.com>
Acked-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

It allows to remove code from the cleanup paths.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

Remove the cleanup code related to the platform from the DAI drivers at the
same time to avoid breakage.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

Version 4 of McASP is using omap-pcm as platform driver and the omap-pcm
platform need to be registered using the cpu dai's device.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

This register is not defined in TI81xx and on AM335x/AM437x it is the
SYSCONFIG register which should not be touched by drivers since it is
related to PM and handled by the generic PM code.
This register write was there since the first time the davinci-mcasp driver
was appeared in the kernel.
The reason why it did not caused any issues on AM335x/AM437x is that it sets
bit 1 in SYSCONFIG register which in turn will enable the smart-idle mode.
This is the default mode and this is the mode McASP should be in also when
in use.
On TI81xx the register is not defined.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

To make the code look uniform.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

Configuration for LEFT_J format.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

The FS needs to be inverted in McASP compared to other supported formats.
Use a flag to indicate if the FS needs to be inverted.
At the same time fail when non supported format is asked since the default
case was anyways configuring McASP to a not valid format.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

FS polarity can be either rising or falling edge in McASP. Instead of
accessing the registers in every switch/case set a flag and write the
registers after the switch for the invert configuration.
This change will help when adding support for more formats also.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

DSP_A is like DSP_B mode but with one bit delay after the FS.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

Use intermediate variable for the data delay needed for the specific format
and write the register after the format configuration at once.
This will help to control the number of lines as support for more formats
going to be added.
Also fixes a case when we switch between two formats with different delay
requirements.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

When the AFIFO is not enabled but more than one serializers are used the DMA
need to transfer number of words equal to active serializers when a DMA
request is generated.
When configuring the burst for the DMA avoid using value '1' for the burst
since it is going to enable additional logic in the DMA drivers. Burst '1'
means that the DMA should send/receive one word per DMA requests.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>