1. 13 10月, 2007 3 次提交
    • J
      PCI: X86: Introduce and enable PCI domain support · a79e4198
      Jeff Garzik 提交于
      * fix bug in pci_read() and pci_write() which prevented PCI domain
        support from working (hardcoded domain 0).
      
      * unconditionally enable CONFIG_PCI_DOMAINS
      
      * implement pci_domain_nr() and pci_proc_domain(), as required of
        all arches when CONFIG_PCI_DOMAINS is enabled.
      
      * store domain in struct pci_sysdata, as assigned by ACPI
      
      * support "pci=nodomains"
      Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
      Cc: Andi Kleen <ak@suse.de>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      a79e4198
    • G
      PCI: use _CRS for PCI resource allocation · 62f420f8
      Gary Hade 提交于
      Use _CRS for PCI resource allocation
      
      This patch resolves an issue where incorrect PCI memory and i/o ranges
      are being assigned to hotplugged PCI devices on some IBM systems.  The
      resource mis-allocation not only makes the PCI device unuseable but
      often makes the entire system unuseable due to resulting machine checks.
      
      The hotplug capable PCI slots on the affected systems are not located
      under a standard P2P bridge but are instead located under PCI root
      bridges or subtractive decode P2P bridges.  For example, the IBM x3850
      contains 2 hotplug capable PCI-X slots and 4 hotplug capable PCIe slots
      with the PCI-X slots each located under a PCI root bridge and the PCIe
      slots each located under a subtractive decode P2P bridge.
      
      The current i386/x86_64 PCI resource allocation code does not use _CRS
      returned resource information.  No other resource information source is
      available for slots that are not below a standard P2P bridge so
      incorrect ranges are being allocated from e820 hole causing the bad
      result.
      
      This patch causes the kernel to use _CRS returned resource info.  It is
      roughly based on a change provided by Matthew Wilcox for the ia64 kernel
      in 2005.  Due to possible buggy BIOS factor and possible yet to be
      discovered kernel issues the function is disabled by default and can be
      enabled with pci=use_crs.
      Signed-off-by: NGary Hade <gary.hade@us.ibm.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      62f420f8
    • G
      PCI: skip ISA ioresource alignment on some systems · 036fff4c
      Gary Hade 提交于
      Skip ISA ioresource alignment on some systems
      
      To conserve limited PCI i/o resource on some IBM multi-node systems, the
      BIOS allocates (via _CRS) and expects the kernel to use addresses in
      ranges currently excluded by pcibios_align_resource() [i386/pci/i386.c].
      This change allows the kernel to use the currently excluded address
      ranges on the IBM x3800, x3850, and x3950.
      Signed-off-by: NGary Hade <gary.hade@us.ibm.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      036fff4c
  2. 11 10月, 2007 1 次提交
  3. 22 7月, 2007 1 次提交
  4. 10 1月, 2006 1 次提交
  5. 01 10月, 2005 1 次提交
  6. 27 9月, 2005 1 次提交
  7. 13 9月, 2005 1 次提交
  8. 30 7月, 2005 1 次提交
  9. 17 4月, 2005 1 次提交
    • L
      Linux-2.6.12-rc2 · 1da177e4
      Linus Torvalds 提交于
      Initial git repository build. I'm not bothering with the full history,
      even though we have it. We can create a separate "historical" git
      archive of that later if we want to, and in the meantime it's about
      3.2GB when imported into git - space that would just make the early
      git days unnecessarily complicated, when we don't have a lot of good
      infrastructure for it.
      
      Let it rip!
      1da177e4