1. 14 12月, 2013 1 次提交
  2. 11 12月, 2013 1 次提交
  3. 23 10月, 2013 1 次提交
  4. 18 7月, 2013 1 次提交
    • J
      ARM: clocksource: Add support for MOXA ART SoCs · 07862c1c
      Jonas Jensen 提交于
      This patch adds an clocksource driver for the main timer(s)
      found on MOXA ART SoCs.
      
      The MOXA ART SoC provides three separate timers with individual
      count/load/match registers, two are used here:
      
      TIMER1: clockevents, used to support oneshot and periodic events
      TIMER2: set up as a free running counter, used as clocksource
      
      Timers are preconfigured by bootloader to count down and interrupt
      on match or zero. Count increments every APB clock cycle and is
      automatically reloaded when it reaches zero.
      Signed-off-by: NJonas Jensen <jonas.jensen@gmail.com>
      Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
      07862c1c
  5. 03 7月, 2013 1 次提交
    • S
      clocksource: arm_global_timer: Add ARM global timer support · c1b40e44
      Stuart Menefy 提交于
      This is a simple driver for the global timer module found in the Cortex
      A9-MP cores from revision r1p0 onwards. This should be able to perform
      the functions of the system timer and the local timer in an SMP system.
      
      The global timer has the following features:
          The global timer is a 64-bit incrementing counter with an
      auto-incrementing feature. It continues incrementing after sending
      interrupts. The global timer is memory mapped in the private memory
      region.
          The global timer is accessible to all Cortex-A9 processors in the
      cluster. Each Cortex-A9 processor has a private 64-bit comparator that
      is used to assert a private interrupt when the global timer has reached
      the comparator value. All the Cortex-A9 processors in a design use the
      banked ID, ID27, for this interrupt. ID27 is sent to the Interrupt
      Controller as a Private Peripheral Interrupt. The global timer is
      clocked by PERIPHCLK.
      Signed-off-by: NStuart Menefy <stuart.menefy@st.com>
      Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com>
      CC: Arnd Bergmann <arnd@arndb.de>
      CC: Rob Herring <robherring2@gmail.com>
      CC: Linus Walleij <linus.walleij@linaro.org>
      CC: Will Deacon <will.deacon@arm.com>
      CC: Thomas Gleixner <tglx@linutronix.de>
      Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
      c1b40e44
  6. 02 7月, 2013 1 次提交
  7. 25 6月, 2013 1 次提交
    • M
      clocksource: Add generic dummy timer driver · 06470651
      Mark Rutland 提交于
      Several architectures have a dummy timer driver tightly coupled with
      their broadcast code to support machines without cpu-local timers (or
      where there is a lack of driver support).
      
      Since 12ad1000: "clockevents: Add generic timer broadcast function"
      it's been possible to write broadcast-capable timer drivers decoupled
      from the broadcast mechanism. We can use this functionality to implement
      a generic dummy timer driver that can be shared by all architectures
      with generic tick broadcast (ARCH_HAS_TICK_BROADCAST).
      
      This patch implements a generic dummy timer using this facility.
      
      [sboyd: Make percpu data static, use __this_cpu_ptr(), move to
              early_initcall to properly register on each CPU, only
      	register if more than one CPU possible]
      Signed-off-by: NMark Rutland <mark.rutland@arm.com>
      Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
      Acked-by: Marc Zyngier <marc.zyngier@arm.com>,
      Cc: John Stultz <john.stultz@linaro.org>
      Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
      Cc: linux-arm-kernel@lists.infradead.org
      Link: http://lkml.kernel.org/r/1370291642-13259-3-git-send-email-sboyd@codeaurora.orgSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      06470651
  8. 06 6月, 2013 2 次提交
  9. 21 4月, 2013 1 次提交
    • T
      clocksource: add samsung pwm timer driver · f1189989
      Tomasz Figa 提交于
      This adds a new clocksource driver for the PWM timer that is
      present in most Samsung SoCs, based on the existing driver in
      arch/arm/plat-samsung/samsung-time.c and many changes implemented by
      Tomasz Figa.
      
      Originally, the conversion of all Samsung machines to the new driver was
      planned for 3.10, but that work ended up being too late and too invasive
      just before the merge window.
      
      Unfortunately, other changes in the Exynos platform resulted in some
      Exynos4 setups, particularly the Universal C210 board to be broken. In
      order to fix that with minimum risk, so we now leave the existing pwm
      clocksource driver in place for all older platforms and use the new
      driver only for device tree enabled boards. This way, we can get the
      broken machines running again using DT descriptions.
      
      All clocksource changes were implemented by Tomasz, while the DT
      registration was rewritten by Arnd.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Cc: Tomasz Figa <t.figa@samsung.com>
      Cc: Kyungmin Park <kyungmin.park@samsung.com>
      Cc: Kukjin Kim <kgene.kim@samsung.com>
      Cc: Ben Dooks <ben-linux@fluff.org>
      Cc: John Stultz <john.stultz@linaro.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      f1189989
  10. 09 4月, 2013 1 次提交
    • M
      clocksource: sunxi: Rename sunxi to sun4i · 119fd635
      Maxime Ripard 提交于
      During the introduction of the Allwinner SoC platforms, sunxi was
      initially meant as a generic name for all the variants of the Allwinner
      SoC.
      
      It was ok at the time of the support of only the A10 and A13 that
      looks pretty much the same, but it's beginning to be troublesome with
      the future addition of the Allwinner A31 (sun6i) that is quite
      different, and would introduce some weird logic, where sunxi would
      actually mean in some case sun4i and sun5i but without sun6i...
      
      Moreover, it makes the compatible strings naming scheme not consistent
      with other architectures, where usually for this kind of compability, we
      just use the oldest SoC name that has this IP, so let's do just this.
      Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
      119fd635
  11. 04 4月, 2013 1 次提交
  12. 01 4月, 2013 1 次提交
  13. 29 3月, 2013 1 次提交
    • C
      ARM: bcm281xx: Add timer driver (driver portion) · 8011657b
      Christian Daudt 提交于
      This adds support for the Broadcom timer, used in the following SoCs:
      BCM11130, BCM11140, BCM11351, BCM28145, BCM28155
      
      Updates from V6:
      - Split DT portion into a separate patch
      
      Updates from V5:
      - Rebase to latest arm-soc/for-next
      
      Updates from V4:
      - Switch code to use CLOCKSOURCE_OF_DECLARE
      
      Updates from V3:
      - Migrate to 3.9 timer framework updates
      
      Updates from V2:
      - prepend static fns + fields with kona_
      
      Updates from V1:
      - Rename bcm_timer.c to bcm_kona_timer.c
      - Pull .h into bcm_kona_timer.c
      - Make timers static
      - Clean up comment block
      - Switched to using clockevents_config_and_register
      - Added an error to the get_timer loop if it repeats too much
      - Added to Documentation/devicetree/bindings/arm/bcm/bcm,kona-timer.txt
      - Added missing readl to timer_disable_and_clear
      
      Note: bcm,kona-timer was kept as the 'compatible' field to make it
      specific enough for when there are multiple bcm timers (bcm,timer is
      too generic).
      Signed-off-by: NChristian Daudt <csd@broadcom.com>
      Acked-by: NArnd Bergmann <arnd@arndb.de>
      Acked-by: NJohn Stultz <john.stultz@linaro.org>
      Reviewed-by: NStephen Warren <swarren@nvidia.com>
      Signed-off-by: NJohn Stultz <john.stultz@linaro.org>
      8011657b
  14. 25 3月, 2013 1 次提交
  15. 09 3月, 2013 1 次提交
  16. 03 3月, 2013 1 次提交
    • J
      metag: Time keeping · a2c5d4ed
      James Hogan 提交于
      Add time keeping code for metag. Meta hardware threads have 2 timers.
      The background timer (TXTIMER) is used as a free-running time base, and
      the interrupt timer (TXTIMERI) is used for the timer interrupt. Both
      counters traditionally count at approximately 1MHz.
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: John Stultz <johnstul@us.ibm.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      a2c5d4ed
  17. 31 1月, 2013 2 次提交
  18. 29 1月, 2013 1 次提交
  19. 14 1月, 2013 1 次提交
  20. 03 1月, 2013 1 次提交
    • S
      clocksource: add common of_clksrc_init() function · ae278a93
      Stephen Warren 提交于
      It is desirable to move all clocksource drivers to drivers/clocksource,
      yet each requires its own initialization function. We'd rather not
      pollute <linux/> with a header for each function. Instead, create a
      single of_clksrc_init() function which will determine which clocksource
      driver to initialize based on device tree.
      
      Based on a similar patch for drivers/irqchip by Thomas Petazzoni.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      ae278a93
  21. 17 11月, 2012 1 次提交
  22. 05 11月, 2012 1 次提交
    • L
      ARM: plat-nomadik: move MTU, kill plat-nomadik · 694e33a7
      Linus Walleij 提交于
      This moves the MTU timer driver from arch/arm/plat-nomadik
      to drivers/clocksource and moves the header file to the
      platform_data directory.
      
      As this moves the last file being compiled to an object out
      of arch/arm/plat-nomadik, we have to "turn off the light"
      and delete the plat-nomadik directory, because it is not
      allowed to have an empty Makefile in a plat-* directory.
      This is probably also a desired side effect of depopulating
      the arch/arm directory of drivers. Luckily we have just
      deleted all the <plat/*> include files prior to this so
      by moving the last one we may delete the directory.
      
      After this all the Ux500 and Nomadik device drivers live
      outside of the arch/arm hierarchy.
      
      Cc: Alessandro Rubini <rubini@unipv.it>
      Acked-by: NArnd Bergmann <arnd@arndb.de>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      694e33a7
  23. 20 9月, 2012 1 次提交
    • S
      ARM: bcm2835: add system timer · ee4af569
      Simon Arlott 提交于
      The System Timer peripheral provides four 32-bit timer channels and a
      single 64-bit free running counter. Each channel has an output compare
      register, which is compared against the 32 least significant bits of the
      free running counter values, and generates an interrupt.
      
      Timer 3 is used as the Linux timer.
      
      The BCM2835 also contains an SP804-based timer module. However, it
      apparently has significant differences from the standard SP804 IP block,
      and Broadcom's documentation recommends using the system timer instead.
      
      This patch was extracted from git://github.com/lp0/linux.git branch
      rpi-split as of 2012/09/08, and modified as follows:
      
      * s/bcm2708/bcm2835/.
      * Modified device tree vendor prefix.
      * Moved to drivers/clocksource/. This looks like the desired location for
        such code now.
      * Added DT binding docs.
      * Moved struct sys_timer bcm2835_timer into time.c to encapsulate it more.
      * Simplified bcm2835_time_init() to find one matching node and operate on
        it, rather than looping over all matching nodes. This seems more
        consistent with other clocksource code.
      * Simplified bcm2835_time_init() using of_iomap().
      * Renamed struct bcm2835_timer.index to match_mask to better represent its
        purpose.
      * s/printk(PR_INFO/pr_info(/
      Signed-off-by: NChris Boot <bootc@bootc.net>
      Signed-off-by: NSimon Arlott <simon@fire.lp0.eu>
      Signed-off-by: NDom Cobley <popcornmix@gmail.com>
      Signed-off-by: NDom Cobley <dc4@broadcom.com>
      Signed-off-by: NStephen Warren <swarren@wwwdotorg.org>
      Acked-by: NArnd Bergmann <arnd@arndb.de>
      ee4af569
  24. 17 9月, 2012 1 次提交
  25. 12 7月, 2012 1 次提交
  26. 10 7月, 2012 1 次提交
  27. 25 5月, 2012 1 次提交
  28. 22 9月, 2011 1 次提交
  29. 28 6月, 2011 1 次提交
    • J
      clocksource: apb: Share APB timer code with other platforms · 06c3df49
      Jamie Iles 提交于
      The APB timers are an IP block from Synopsys (DesignWare APB timers)
      and are also found in other systems including ARM SoC's.  This patch
      adds functions for creating clock_event_devices and clocksources from
      APB timers but does not do the resource allocation.  This is handled
      in a higher layer to allow the timers to be created from multiple
      methods such as platform_devices.
      
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: "H. Peter Anvin" <hpa@zytor.com>
      Cc: Jacob Pan <jacob.jun.pan@linux.intel.com>
      Signed-off-by: NJamie Iles <jamie@jamieiles.com>
      Signed-off-by: NJohn Stultz <john.stultz@linaro.org>
      06c3df49
  30. 09 6月, 2011 1 次提交
  31. 24 5月, 2011 1 次提交
  32. 14 5月, 2011 1 次提交
  33. 16 12月, 2009 1 次提交
  34. 03 5月, 2009 2 次提交
  35. 29 1月, 2009 1 次提交
    • M
      sh: CMT clockevent platform driver · 3fb1b6ad
      Magnus Damm 提交于
      SuperH CMT clockevent driver.
      
      Both 16-bit and 32-bit CMT versions are supported, but only 32-bit
      is tested. This driver contains support for both clockevents and
      clocksources, but no unregistration is supported at this point.
      
      Works fine as clock source and/or event in periodic or oneshot mode.
      Tested on sh7722 and sh7723, but should work with any cpu/architecture.
      
      This version is lacking clocksource and early platform driver support
      for now - this to minimize the amount of dependencies.
      Signed-off-by: NMagnus Damm <damm@igel.co.jp>
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      3fb1b6ad
  36. 04 3月, 2008 1 次提交
    • D
      atmel_tc clocksource/clockevent code · 4d243f92
      David Brownell 提交于
      Clocksource and clockevent device based on the Atmel TC blocks.
      
      The clockevent device handles both periodic and oneshot modes, so this
      enables NO_HZ and high res timers on some platforms that previously
      couldn't use those mechanisms.
      
      This works on both AVR32 and AT91 chips, given relevant patches for
      tclib support (always) and clockevents (or else this will only look
      like a higher precision clocksource).  It's an updated and modularized
      version of an AT91-only patch that has circulated for some time now.
      
      Changes relative to the original patch:
        * Update to use new tclib API
        * Replace open-coded do-while loop using goto with a real do-while loop
        * Minor irq handler optimization: Load register base address from
          dev_id instead of a global variable.
        * Aggressively turn off clocks when the clockevent isn't being used
        * Include the clockevent code on AT91RM9200 as well. The rating is
          lower than the System Timer, so the clock will usually stay off.
        * Don't assume that the number of clocks is always equal to the
          number of irqs.
      Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
      Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
      4d243f92
  37. 27 6月, 2006 1 次提交