1. 23 10月, 2021 2 次提交
    • T
      x86/fpu: Provide infrastructure for KVM FPU cleanup · 69f6ed1d
      Thomas Gleixner 提交于
      For the upcoming AMX support it's necessary to do a proper integration with
      KVM. Currently KVM allocates two FPU structs which are used for saving the user
      state of the vCPU thread and restoring the guest state when entering
      vcpu_run() and doing the reverse operation before leaving vcpu_run().
      
      With the new fpstate mechanism this can be reduced to one extra buffer by
      swapping the fpstate pointer in current::thread::fpu. This makes the
      upcoming support for AMX and XFD simpler because then fpstate information
      (features, sizes, xfd) are always consistent and it does not require any
      nasty workarounds.
      
      Provide:
      
        - An allocator which initializes the state properly
      
        - A replacement for the existing FPU swap mechanim
      
      Aside of the reduced memory footprint, this also makes state switching
      more efficient when TIF_FPU_NEED_LOAD is set. It does not require a
      memcpy as the state is already correct in the to be swapped out fpstate.
      
      The existing interfaces will be removed once KVM is converted over.
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Signed-off-by: NBorislav Petkov <bp@suse.de>
      Link: https://lkml.kernel.org/r/20211022185312.954684740@linutronix.de
      69f6ed1d
    • T
      x86/fpu: Prepare for sanitizing KVM FPU code · 75c52dad
      Thomas Gleixner 提交于
      For the upcoming AMX support it's necessary to do a proper integration with
      KVM. To avoid more nasty hackery in KVM which violate encapsulation extend
      struct fpu and fpstate so the fpstate switching can be consolidated and
      simplified.
      
      Currently KVM allocates two FPU structs which are used for saving the user
      state of the vCPU thread and restoring the guest state when entering
      vcpu_run() and doing the reverse operation before leaving vcpu_run().
      
      With the new fpstate mechanism this can be reduced to one extra buffer by
      swapping the fpstate pointer in current::thread::fpu. This makes the
      upcoming support for AMX and XFD simpler because then fpstate information
      (features, sizes, xfd) are always consistent and it does not require any
      nasty workarounds.
      
      Add fpu::__task_fpstate to save the regular fpstate pointer while the task
      is inside vcpu_run(). Add some state fields to fpstate to indicate the
      nature of the state.
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Signed-off-by: NBorislav Petkov <bp@suse.de>
      Link: https://lkml.kernel.org/r/20211022185312.896403942@linutronix.de
      75c52dad
  2. 22 10月, 2021 5 次提交
  3. 21 10月, 2021 10 次提交
  4. 20 10月, 2021 19 次提交
  5. 07 10月, 2021 1 次提交
  6. 05 10月, 2021 1 次提交
    • J
      xen/x86: allow PVH Dom0 without XEN_PV=y · cae7d81a
      Jan Beulich 提交于
      Decouple XEN_DOM0 from XEN_PV, converting some existing uses of XEN_DOM0
      to a new XEN_PV_DOM0. (I'm not convinced all are really / should really
      be PV-specific, but for starters I've tried to be conservative.)
      
      For PVH Dom0 the hypervisor populates MADT with only x2APIC entries, so
      without x2APIC support enabled in the kernel things aren't going to work
      very well. (As opposed, DomU-s would only ever see LAPIC entries in MADT
      as of now.) Note that this then requires PVH Dom0 to be 64-bit, as
      X86_X2APIC depends on X86_64.
      
      In the course of this xen_running_on_version_or_later() needs to be
      available more broadly. Move it from a PV-specific to a generic file,
      considering that what it does isn't really PV-specific at all anyway.
      
      Note that xen/interface/version.h cannot be included on its own; in
      enlighten.c, which uses SCHEDOP_* anyway, include xen/interface/sched.h
      first to resolve the apparently sole missing type (xen_ulong_t).
      Signed-off-by: NJan Beulich <jbeulich@suse.com>
      Reviewed-by: NJuergen Gross <jgross@suse.com>
      
      Link: https://lore.kernel.org/r/983bb72f-53df-b6af-14bd-5e088bd06a08@suse.comSigned-off-by: NJuergen Gross <jgross@suse.com>
      cae7d81a
  7. 30 9月, 2021 1 次提交
  8. 23 9月, 2021 1 次提交