- 12 7月, 2021 1 次提交
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由 Dan Sneddon 提交于
Commit 5fa5e6de ("spi: atmel: Switch to transfer_one transfer method") switched to using transfer_one and set_cs. The core doesn't call set_cs when the chip select lines are gpios. Add the SPI_MASTER_GPIO_SS flag to the driver to ensure the calls to set_cs happen since the driver programs configuration registers there. Fixes: 5fa5e6de ("spi: atmel: Switch to transfer_one transfer method") Signed-off-by: NDan Sneddon <dan.sneddon@microchip.com> Link: https://lore.kernel.org/r/20210629192218.32125-1-dan.sneddon@microchip.comSigned-off-by: NMark Brown <broonie@kernel.org>
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- 03 6月, 2021 2 次提交
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由 Dan Sneddon 提交于
The current implementation of the driver holds a spin lock for the duration of the transfer, releasing it only to enable interrupts for short periods of time. As this would prevent any interrupt from happening, this could cause system performance issues every time a SPI message is sent. Since the spi core now handles message syncronization we can reduce the amount of time the spin-lock is held to the regions where both the calling thread and the interrupt might interract. Signed-off-by: NDan Sneddon <dan.sneddon@microchip.com> Link: https://lore.kernel.org/r/20210602160816.4890-2-dan.sneddon@microchip.comSigned-off-by: NMark Brown <broonie@kernel.org>
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由 Dan Sneddon 提交于
Switch from using our own transfer_one_message routine to using the one provided by the SPI core. Signed-off-by: NDan Sneddon <dan.sneddon@microchip.com> Link: https://lore.kernel.org/r/20210602160816.4890-1-dan.sneddon@microchip.comSigned-off-by: NMark Brown <broonie@kernel.org>
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- 10 3月, 2021 1 次提交
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由 Tudor Ambarus 提交于
The DMA cap mask is no longer used since: commit 7758e390 ("spi: atmel: remove compat for non DT board when requesting dma chan") Drop it now. Signed-off-by: NTudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20210218132840.131898-1-tudor.ambarus@microchip.comSigned-off-by: NMark Brown <broonie@kernel.org>
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- 22 1月, 2021 1 次提交
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由 Pan Bian 提交于
The allocated master is not released. Goto error handling label rather than directly return. Fixes: 5e9af37e ("spi: atmel: introduce probe deferring") Signed-off-by: NPan Bian <bianpan2016@163.com> Fixes: 5e9af37e ("spi: atmel: introduce probe deferring") Reviewed-by: NTudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20210120050025.25426-1-bianpan2016@163.comSigned-off-by: NMark Brown <broonie@kernel.org>
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- 30 10月, 2020 1 次提交
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由 Tudor Ambarus 提交于
The IP's DMA capabilities are described in the SoC dtsi, to spare users duplicating the DMA bindings in their board device tree. Users that don't want to use DMA, have to overwrite the DMA bindings in their board device tree. An example is: commit ddcdaeb8 ("ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and UART flx4 functions") When the DMA bindings are overwritten, one could see on the console: atmel_spi fc018400.spi: error -ENODEV: No TX DMA channel, DMA is disabled atmel_spi fc018400.spi: Atmel SPI Controller using PIO only Choosing to not use DMA is not a reason to print an error message. More, the user is already informed when PIO is used: "Atmel SPI Controller using PIO only". Downgrade to dev_dbg when dma_request_chan() fails. Signed-off-by: NTudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20201030121116.869105-1-tudor.ambarus@microchip.comSigned-off-by: NMark Brown <broonie@kernel.org>
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- 02 10月, 2020 1 次提交
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由 Thomas Kopp 提交于
This patch implements the reporting of the effectively used speed_hz for the transfer by setting xfer->effective_speed_hz. See the following patch, which adds this feature to the SPI core for more information: commit 5d7e2b5e ("spi: core: allow reporting the effectivly used speed_hz for a transfer") Signed-off-by: NThomas Kopp <thomas.kopp@microchip.com> Reviewed-by: NTudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200921071036.2091-1-thomas.kopp@microchip.comSigned-off-by: NMark Brown <broonie@kernel.org>
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- 30 9月, 2020 1 次提交
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由 Alexandre Belloni 提交于
Since commit d5fab59c ("spi: atmel: trivial: remove unused fields in DMA structure"), the driver is not using any definitions from linux/platform_data/dma-atmel.h, stop including it. Signed-off-by: NAlexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20200930145353.3043699-1-alexandre.belloni@bootlin.comSigned-off-by: NMark Brown <broonie@kernel.org>
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- 09 9月, 2020 1 次提交
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由 Krzysztof Kozlowski 提交于
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org> Reviewed-by: NAlexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20200901152713.18629-3-krzk@kernel.orgSigned-off-by: NMark Brown <broonie@kernel.org>
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- 10 7月, 2020 1 次提交
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由 Colin Ian King 提交于
The error exit label out_free is no longer being used, it is redundant and can be removed. Cleans up warning: drivers/spi/spi-atmel.c:1680:1: warning: label ‘out_free’ defined but not used [-Wunused-label] Fixes: 2d9a7446 ("spi: atmel: No need to call spi_master_put() if spi_alloc_master() failed") Signed-off-by: NColin Ian King <colin.king@canonical.com> Link: https://lore.kernel.org/r/20200709101203.1374117-1-colin.king@canonical.comSigned-off-by: NMark Brown <broonie@kernel.org>
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- 07 7月, 2020 1 次提交
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由 Peng Fan 提交于
There is no need to call spi_master_put() if spi_alloc_master() failed, it should return -ENOMEM directly. Signed-off-by: NPeng Fan <fanpeng@loongson.cn> Link: https://lore.kernel.org/r/1594111842-9468-1-git-send-email-fanpeng@loongson.cnSigned-off-by: NMark Brown <broonie@kernel.org>
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- 30 4月, 2020 1 次提交
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由 Jules Irenge 提交于
Sparse reports a warning at atmel_spi_next_xfer_dma_submit() warning: context imbalance in atmel_spi_next_xfer_dma_submit() - unexpected unlock The root cause is the missing annotation at atmel_spi_next_xfer_dma_submit() Add the missing __must_hold(&as->lock) annotation Signed-off-by: NJules Irenge <jbi.octave@gmail.com> Link: https://lore.kernel.org/r/20200429225723.31258-3-jbi.octave@gmail.comSigned-off-by: NMark Brown <broonie@kernel.org>
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- 16 12月, 2019 1 次提交
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由 Peter Ujfalusi 提交于
dma_request_slave_channel() is a wrapper on top of dma_request_chan() eating up the error code. By using dma_request_chan() directly the driver can support deferred probing against DMA. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Link: https://lore.kernel.org/r/20191212135550.4634-2-peter.ujfalusi@ti.comSigned-off-by: NMark Brown <broonie@kernel.org>
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- 15 11月, 2019 1 次提交
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由 Peter Ujfalusi 提交于
dma_request_slave_channel_reason() is: #define dma_request_slave_channel_reason(dev, name) \ dma_request_chan(dev, name) Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20191113094256.1108-3-peter.ujfalusi@ti.comSigned-off-by: NMark Brown <broonie@kernel.org>
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- 19 10月, 2019 8 次提交
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由 Mans Rullgard 提交于
The driver does the wrong thing when cs_change is set on a non-last xfer in a message. When cs_change is set, the driver deactivates the CS and leaves it off until a later xfer again has cs_change set whereas it should be briefly toggling CS off and on again. This patch brings the behaviour of the driver back in line with the documentation and common sense. The delay of 10 us is the same as is used by the default spi_transfer_one_message() function in spi.c. [gregory: rebased on for-5.5 from spi tree] Fixes: 8090d6d1 ("spi: atmel: Refactor spi-atmel to use SPI framework queue") Signed-off-by: NMans Rullgard <mans@mansr.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com> Link: https://lore.kernel.org/r/20191018153504.4249-1-gregory.clement@bootlin.comSigned-off-by: NMark Brown <broonie@kernel.org>
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由 Gregory CLEMENT 提交于
Thanks to the recent change in this driver, it is now possible to prevent using the CS0 with GPIO during setup. It then allows to remove the special handling of this case in the cs_activate() and cs_deactivate() functions. Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com> Link: https://lore.kernel.org/r/20191017141846.7523-8-gregory.clement@bootlin.comSigned-off-by: NMark Brown <broonie@kernel.org>
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由 Gregory CLEMENT 提交于
In the previous implementation of this driver, the index of the GPIO used as CS was linked to the offset of the CS register used to configure the transfer. With this new implementation the first CS register not used by internal CS is associated to all the GPIO CS. It allows to not be anymore limited to have only 4 CS managed, now it is possible to have in the same time until 3 internal CS and no more limit for the CS GPIO. Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com> Link: https://lore.kernel.org/r/20191017141846.7523-7-gregory.clement@bootlin.comSigned-off-by: NMark Brown <broonie@kernel.org>
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由 Gregory CLEMENT 提交于
This driver is now only used through the device tree. Simplify code by explicitly depend on device tree. Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com> Link: https://lore.kernel.org/r/20191017141846.7523-6-gregory.clement@bootlin.comSigned-off-by: NMark Brown <broonie@kernel.org>
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由 Gregory CLEMENT 提交于
Since the conversion to GPIO descriptor, the GPIO used as chip select, can be directly access from the spi_device struct. So there is no need to keep the field npcs_pin. Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com> Link: https://lore.kernel.org/r/20191017141846.7523-5-gregory.clement@bootlin.comSigned-off-by: NMark Brown <broonie@kernel.org>
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由 Gregory CLEMENT 提交于
Instead of setting up the GPIO configuration for the whole controller, do it at CS level. It will allow to mix internal CS and GPIO CS, which is not possible with the current implementation. Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com> Link: https://lore.kernel.org/r/20191017141846.7523-4-gregory.clement@bootlin.comSigned-off-by: NMark Brown <broonie@kernel.org>
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由 Gregory CLEMENT 提交于
Until a few years ago, this driver was only used with CS GPIO. The only exception is CS0 on AT91RM9200 which has to use internal CS. A limitation of the internal CS is that they don't support CS High. So by using the CS GPIO the CS high configuration was available except for the particular case CS0 on RM9200. When the support for the internal chip-select was added, the check of the CS high support was not updated. Due to this the driver accepts this configuration for all the SPI controller v2 (used by all SoCs excepting the AT91RM9200) whereas the hardware doesn't support it for infernal CS. This patch fixes the test to match the hardware capabilities. Fixes: 48203034 ("spi: atmel: add support for the internal chip-select of the spi controller") Cc: <stable@vger.kernel.org> Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com> Link: https://lore.kernel.org/r/20191017141846.7523-3-gregory.clement@bootlin.comSigned-off-by: NMark Brown <broonie@kernel.org>
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由 Gregory CLEMENT 提交于
Since CSAAT functionality support has been added. Some comments become wrong. Fix them to match the current driver behavior. Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com> Link: https://lore.kernel.org/r/20191017141846.7523-2-gregory.clement@bootlin.comSigned-off-by: NMark Brown <broonie@kernel.org>
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- 15 10月, 2019 2 次提交
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由 Alexandru Ardelean 提交于
For many places in the spi drivers, using the new `spi_transfer_delay` helper is straightforward. It's just replacing: ``` if (t->delay_usecs) udelay(t->delay_usecs); ``` with `spi_transfer_delay(t)` which handles both `delay_usecs` and the new `delay` field. This change replaces in all places (in the spi drivers) where this change is simple. Signed-off-by: NAlexandru Ardelean <alexandru.ardelean@analog.com> Link: https://lore.kernel.org/r/20190926105147.7839-10-alexandru.ardelean@analog.comSigned-off-by: NMark Brown <broonie@kernel.org>
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由 Alexandru Ardelean 提交于
This change does a conversion from the `word_delay_usecs` -> `word_delay` for the `spi_device` struct. This allows users to specify inter-word delays in other unit types (nano-seconds or clock cycles), depending on how users want. The Atmel SPI driver is the only current user of the `word_delay_usecs` field (from the `spi_device` struct). So, it needed a slight conversion to use the `word_delay` as an `spi_delay` struct. In SPI core, the only required mechanism is to update the `word_delay` information per `spi_transfer`. This requires a bit more logic than before, because it needs that both delays be converted to a common unit (nano-seconds) for comparison. Signed-off-by: NAlexandru Ardelean <alexandru.ardelean@analog.com> Link: https://lore.kernel.org/r/20190926105147.7839-8-alexandru.ardelean@analog.comSigned-off-by: NMark Brown <broonie@kernel.org>
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- 01 10月, 2019 1 次提交
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由 Gregory CLEMENT 提交于
AV32 support has been from the kernel a few release ago, but there was still some specific macro for this architecture in this driver. Lets remove it. Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com> Link: https://lore.kernel.org/r/20190919154034.7489-1-gregory.clement@bootlin.comSigned-off-by: NMark Brown <broonie@kernel.org>
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- 02 8月, 2019 1 次提交
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由 Uwe Kleine-König 提交于
Driver specific implementations for .transfer_one_message need to call the tracing stuff themself. This is necessary to make spi tracing actually useful. Signed-off-by: NUwe Kleine-König <uwe@kleine-koenig.org> Link: https://lore.kernel.org/r/20190801204710.27309-1-uwe@kleine-koenig.orgSigned-off-by: NMark Brown <broonie@kernel.org>
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- 19 6月, 2019 1 次提交
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由 Thomas Gleixner 提交于
Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Reviewed-by: NEnrico Weigelt <info@metux.net> Reviewed-by: NKate Stewart <kstewart@linuxfoundation.org> Reviewed-by: NAllison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.deSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 31 1月, 2019 1 次提交
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由 Jonas Bonn 提交于
If the SPI slave requires an inter-word delay, configure the DLYBCT register accordingly. Tested on a SAMA5D2 board (derived from SAMA5D2-Xplained reference board). Signed-off-by: NJonas Bonn <jonas@norrbonn.se> Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com> CC: Nicolas Ferre <nicolas.ferre@microchip.com> CC: Mark Brown <broonie@kernel.org> CC: Alexandre Belloni <alexandre.belloni@bootlin.com> CC: Ludovic Desroches <ludovic.desroches@microchip.com> CC: linux-spi@vger.kernel.org CC: linux-arm-kernel@lists.infradead.org Signed-off-by: NMark Brown <broonie@kernel.org>
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- 09 1月, 2019 1 次提交
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由 Linus Walleij 提交于
This converts the Atmel SPI master driver to use GPIO descriptors for chip select handling. The Atmel driver has duplicate code to look up and initialize CS GPIOs from the device tree, so this is removed. It further has code to retrieve a CS GPIO from .controller_data but this seems to be completely unused in the kernel (legacy codepath?) so I deleted this support. It keeps track of polarity when switching the CS, but this is not needed anymore since we moved this over to the gpiolib. The local handling of the "npcs_pin" (I guess this might mean "negative polarity chip select pin") is preserved, but I strongly suspect this can be switched over to handling by the core and using the SPI_MASTER_GPIO_SS flag on the master to assure that the additional CS handling in the driver is also done. Cc: Eugen Hristev <eugen.hristev@microchip.com> Cc: Nicolas Ferre <nicolas.ferre@microchip.com> Cc: Radu Pirea <radu.pirea@microchip.com> Cc: Linuxarm <linuxarm@huawei.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 05 9月, 2018 1 次提交
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由 Geert Uytterhoeven 提交于
spi_controller_{suspend,resume}() already prints an error message on failure, so there is no need to repeat this in individual drivers. Note: spi_master_{suspend,resume}() is an alias for spi_controller_{suspend,resume}(). Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NAlexandre Belloni <alexandre.belloni@bootlin.com> Reviewed-by: NDaniel Mack <daniel@zonque.org> Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 28 3月, 2018 1 次提交
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由 Stefan Agner 提交于
Use enum dma_transfer_direction as required by the functions dmaengine_prep_slave_(sg|single)() instead of enum dma_data_direction. This won't change behavior in practice as the enum values are equivalent. This fixes two warnings when building with clang: drivers/spi/spi-atmel.c:771:12: warning: implicit conversion from enumeration type 'enum dma_data_direction' to different enumeration type 'enum dma_transfer_direction' [-Wenum-conversion] DMA_FROM_DEVICE, ^~~~~~~~~~~~~~~ ... Signed-off-by: NStefan Agner <stefan@agner.ch> Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 27 2月, 2018 1 次提交
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由 Eugen Hristev 提交于
The datasheet recommends initializing FIFOs before SPI enable. If we do not do it like this, there may be a strange behavior. We noticed that DMA does not work properly with FIFOs if we do not clear them beforehand or enable them before SPIEN. Signed-off-by: NEugen Hristev <eugen.hristev@microchip.com> Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: NMark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
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- 05 1月, 2018 1 次提交
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由 Radu Pirea 提交于
This patch enables SPI DMA transfers for Atmel SAM9 SoCs and implements a bounce buffer for transfers which have vmalloc allocated buffers. Those buffers are not cache coherent even if they have been transformed into sg lists. UBIFS is affected by this cache coherency issue. In this patch I also reverted "spi: atmel: fix corrupted data issue on SAM9 family SoCs"(7094576c). Signed-off-by: NRadu Pirea <radu.pirea@microchip.com> Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 19 12月, 2017 1 次提交
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由 Radu Pirea 提交于
The only part of atmel_spi_remove which needs to be atomic is hardware reset. atmel_spi_stop_dma calls dma_terminate_all and this needs interrupts enabled. atmel_spi_release_dma calls dma_release_channel and dma_release_channel locks a mutex inside of spin_lock. So the call of these functions can't be inside a spin_lock. Reported-by: NJia-Ju Bai <baijiaju1990@gmail.com> Signed-off-by: NRadu Pirea <radu.pirea@microchip.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 24 6月, 2017 1 次提交
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由 Cyrille Pitchen 提交于
This patch disables the use of the DMA for data transfer and forces the use of PIO transfers instead as a quick fixup to solve the cache aliasing issue on ARM9 based cores, which embeds a VIVT data cache. Indeed in the case of VIVT data caches, it is not safe to call dma_map_*() functions to map buffers for DMA transfers when those buffers have been allocated by vmalloc() or from any DMA-unsafe area. Further patches may propose a better solution based on the use of a bounce buffer at the SPI sub-system level but such solution needs more time to be discussed. Then the use of DMA transfers could be enabled again to improve the performances but before that, this patch already solves the issue. Signed-off-by: NCyrille Pitchen <cyrille.pitchen@microchip.com> Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: NMark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
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- 07 6月, 2017 1 次提交
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由 Baruch Siach 提交于
Don't print the version at the beginning of atmel_spi_probe(). This avoids spamming the log whenever a deferred probe runs. Signed-off-by: NBaruch Siach <baruch@tkos.co.il> Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 19 4月, 2017 1 次提交
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由 Quentin Schulz 提交于
This adds deepest (Backup+Self-Refresh) PM support to the ATMEL SAMA5D2 SoC's SPI controller. When resuming from deepest state, it is required to restore MR register as the registers are lost since VDD core has been shut down when entering deepest state on the SAMA5D2. Signed-off-by: NQuentin Schulz <quentin.schulz@free-electrons.com> Acked-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 12 4月, 2017 1 次提交
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由 Quentin Schulz 提交于
The SPI controller configuration during the init can be reused, for the resume function for example. Let's move this configuration to a separate function. Signed-off-by: NQuentin Schulz <quentin.schulz@free-electrons.com> Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 25 11月, 2016 2 次提交
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由 Nicolas Ferre 提交于
For DMA transfers, we now use the core DMA framework which provides channel fields in the spi_master structure. Remove the private channels from atmel_spi stucture which were located in a sub-structure. This last one (atmel_spi_dma) which is now empty is also removed. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Nicolas Ferre 提交于
The atmel_spi_dma structure was cluttered with unused fields relative to older DMA channel selection API. Remove them. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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