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  1. 08 3月, 2011 3 次提交
    • P
      OMAP2+: powerdomain: add pwrdm_can_ever_lose_context() · 694606c4
      由 Paul Walmsley 提交于 
      Some drivers wish to know whether the device that they control can
ever lose context, for example, when the device's enclosing
powerdomain loses power.  They can use this information to determine
whether it is necessary to save and restore device context, or whether
it can be skipped.  Implement the powerdomain portion of this by
adding the function pwrdm_can_ever_lose_context().  This is not for
use directly from driver code, but instead is intended to be called
from driver-subarch integration code (i.e., arch/arm/*omap* code).

Currently, the result from this function should be passed into the
driver code via struct platform_data, but at some point this should
be part of some common or OMAP-specific device code.

While here, update file copyrights.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      694606c4
    • P
      OMAP2+: powerdomain: fix bank power state bitfields · 4cb49fec
      由 Paul Walmsley 提交于 
      The bank power state bitfields in the powerdomain data are
encoded incorrectly.  These fields are intended to be bitfields,
representing a set of power states that the memory banks support.
However, when only one power state was supported by a given bank,
the field was incorrectly set to the bit shift -- not the mask.
While here, update some file copyrights.

The OMAP4 autogeneration scripts have been updated accordingly.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
      4cb49fec
    • P
      OMAP2/3: WKUP powerdomain: mark as being always on · cad7a34b
      由 Paul Walmsley 提交于 
      Mark the WKUP powerdomain as being always on -- at least, as long as the
chip has power.  This will be used to enable the powerdomain code to
determine whether a given powerdomain is ever able to power off.  While
here, update the file copyright.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      cad7a34b
  3. 02 3月, 2011 2 次提交
  5. 26 2月, 2011 1 次提交
    • S
      omap4: prcm: Fix the CPUx clockdomain offsets · 51c404b2
      由 Santosh Shilimkar 提交于 
      CPU0 and CPU1 clockdomain is at the offset of 0x18 from the LPRM base.
The header file has set it wrongly to 0x0. Offset 0x0 is for CPUx power
domain control register

Fix the same.

The autogen scripts is fixed thanks to Benoit Cousson

With the old value, the clockdomain code would access the
*_PWRSTCTRL.POWERSTATE field when it thought it was accessing the
*_CLKSTCTRL.CLKTRCTRL field.  In the worst case, this could cause
system power management to behave incorrectly.
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
[paul@pwsan.com: added second paragraph to commit message]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      51c404b2
  7. 25 2月, 2011 1 次提交
    • P
      OMAP2+: clocksource: fix crash on boot when !CONFIG_OMAP_32K_TIMER · cbc94380
      由 Paul Walmsley 提交于 
      
OMAP2+ kernels built without CONFIG_OMAP_32K_TIMER crash on boot after the
2.6.38 sched_clock changes:

[    0.000000] OMAP clockevent source: GPTIMER1 at 13000000 Hz
[    0.000000] Unable to handle kernel NULL pointer dereference at virtual address 00000000
[    0.000000] pgd = c0004000
[    0.000000] [00000000] *pgd=00000000
[    0.000000] Internal error: Oops: 80000005 [#1] SMP
[    0.000000] last sysfs file:
[    0.000000] Modules linked in:
[    0.000000] CPU: 0    Not tainted  (2.6.38-rc5-00057-g04aa67de #152)
[    0.000000] PC is at 0x0
[    0.000000] LR is at sched_clock_poll+0x2c/0x3c

Without CONFIG_OMAP_32K_TIMER, the kernel has an clockevent and
clocksource resolution about three orders of magnitude higher than
with CONFIG_OMAP_32K_TIMER set.  The tradeoff is that the lowest
power consumption states are not available.

Fix by calling init_sched_clock() from the GPTIMER clocksource init code.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
      cbc94380
  9. 23 2月, 2011 1 次提交
    • J
      OMAP2/3: clock: fix fint calculation for DPLL_FREQSEL · ea68c00e
      由 John Ogness 提交于 
      In OMAP35X TRM Rev 2010-05 Figure 7-18 "DPLL With EMI Reduction
Feature", it is shown that the internal frequency is calculated by
CLK_IN/(N+1). However, the value passed to _dpll_test_fint() is
already "N+1" since Linux is using the values to divide by. In the
technical reference manual, "N" is referring to the divider's register
value (0-127).

During power management testing, it was observed that programming the
wrong jitter correction value can cause the system to become unstable
and eventually crash.
Signed-off-by: NJohn Ogness <john.ogness@linutronix.de>
[paul@pwsan.com: added second paragraph to commit message]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      ea68c00e
  11. 15 2月, 2011 1 次提交
  13. 08 2月, 2011 1 次提交
  15. 05 2月, 2011 2 次提交
  17. 03 2月, 2011 1 次提交
  19. 02 2月, 2011 3 次提交
  21. 01 2月, 2011 3 次提交
  23. 28 1月, 2011 3 次提交
  25. 27 1月, 2011 1 次提交
    • K
      OMAP3: PM: fix save secure RAM to restore MPU power state · 617fcc98
      由 Kevin Hilman 提交于 
      Currently, on HS/EMU devices, MPU power state forced to on during PM
init by the save secure RAM code.  Rather than forcing the state of
MPU powerdomain to on, simply read the current value and restore it
after the ROM code has run.

This only affects the !CPUidle case since when CPUidle is enabled, the
MPU power state is dynamically changed by CPUidle.  In the !CPUidle
case, MPU power state is initialized once at init and never touched.
Acked-by: NTero Kristo <tero.kristo@nokia.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>
      617fcc98
  27. 26 1月, 2011 1 次提交
    • T
      console: rename acquire/release_console_sem() to console_lock/unlock() · ac751efa
      由 Torben Hohn 提交于 
      The -rt patches change the console_semaphore to console_mutex.  As a
result, a quite large chunk of the patches changes all
acquire/release_console_sem() to acquire/release_console_mutex()

This commit makes things use more neutral function names which dont make
implications about the underlying lock.

The only real change is the return value of console_trylock which is
inverted from try_acquire_console_sem()

This patch also paves the way to switching console_sem from a semaphore to
a mutex.

[akpm@linux-foundation.org: coding-style fixes]
[akpm@linux-foundation.org: make console_trylock return 1 on success, per Geert]
Signed-off-by: NTorben Hohn <torbenh@gmx.de>
Cc: Thomas Gleixner <tglx@tglx.de>
Cc: Greg KH <gregkh@suse.de>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      ac751efa
  29. 25 1月, 2011 1 次提交
  31. 20 1月, 2011 3 次提交
  33. 19 1月, 2011 3 次提交
    • F
      OMAP: PRCM: remove duplicated headers · bc9fcaf3
      由 Felipe Balbi 提交于 
      A few headers are included twice, remove them.

Found the following errors using make includecheck:
arch/arm/mach-omap2/clock44xx_data.c: prm44xx.h is
included more than once.
arch/arm/mach-omap2/clockdomains44xx_data.c: cm1_44xx.h
is included more than once.
arch/arm/mach-omap2/clockdomains44xx_data.c: cm2_44xx.h
is included more than once.
arch/arm/mach-omap2/powerdomain2xxx_3xxx.c: prm-regbits-34xx.h
is included more than once.

Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: NFelipe Balbi <balbi@ti.com>
[paul@pwsan.com: dropped lists from patch cc:s; tweaked subject line]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      bc9fcaf3
    • P
      OMAP4: clockdomain: bypass unimplemented wake-up dependency functions on OMAP4 · 56bc78d4
      由 Paul Walmsley 提交于 
      Commit 56a6a19d ("omap2plus: prm:
Trvial build break fix for undefined reference to
'omap2_prm_read_mod_reg'") generates a lot of warnings on boot since
clockdomain functions that manipulate wake-up dependencies are not
implemented yet on OMAP4 for 2.6.38.  This patch bypasses the OMAP2/3
functions on OMAP4, which in turn avoids the warnings when the
functions would attempt to call the underlying OMAP2/3 PRCM functions.
A one-line warning is still logged from the clockdomain code that the
OMAP4 wake-up dependency code is not yet implemented.

A clockdomain wake-up and sleep dependency implementation for OMAP4
from Rajendra should be possible to merge during the 2.6.39 merge
window:

    http://www.mail-archive.com/linux-omap@vger.kernel.org/msg41748.html

    http://www.mail-archive.com/linux-omap@vger.kernel.org/msg42222.htmlReported-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      56bc78d4
    • P
      OMAP: counter_32k: init clocksource as part of machine timer init · d8328f3b
      由 Paul Walmsley 提交于 
      After commit dc548fbb ("ARM: omap: convert
sched_clock() to use new infrastructure"), OMAPs that use the 32KiHz
"synchronization timer" as their clocksource crash during boot:

[    0.000000] OMAP clockevent source: GPTIMER1 at 32768 Hz
[    0.000000] Unable to handle kernel NULL pointer dereference at virtual address 00000000
[    0.000000] pgd = c0004000
[    0.000000] [00000000] *pgd=00000000
[    0.000000] Internal error: Oops: 80000005 [#1] SMP
[    0.000000] last sysfs file:
[    0.000000] Modules linked in:
[    0.000000] CPU: 0    Tainted: G        W    (2.6.37-07734-g2467802 #7)
[    0.000000] PC is at 0x0
[    0.000000] LR is at sched_clock_poll+0x2c/0x3c
[    0.000000] pc : [<00000000>]    lr : [<c0060b74>]    psr: 600001d3
[    0.000000] sp : c058bfd0  ip : c058a000  fp : 00000000
[    0.000000] r10: 00000000  r9 : 411fc092  r8 : 800330c8
[    0.000000] r7 : c05a08e0  r6 : c0034c48  r5 : c05ffc40  r4 : c0034c4c
[    0.000000] r3 : c05ffe6c  r2 : c05a0bc0  r1 : c059f098  r0 : 00000000
[    0.000000] Flags: nZCv  IRQs off  FIQs off  Mode SVC_32  ISA ARM  Segment kernel
[    0.000000] Control: 10c53c7f  Table: 8000404a  DAC: 00000017

This is due to the recent ARM init_sched_clock() changes and the late
initialization of the counter_32k clock source.  More information here:

   http://marc.info/?l=linux-omap&m=129513468605208&w=2

Fix by initializing the counter_32k clocksource during the machine timer
initialization.
Reported-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Tested-by: NThomas Weber <weber@corscience.de>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      d8328f3b
  35. 14 1月, 2011 2 次提交
  37. 13 1月, 2011 1 次提交
  39. 12 1月, 2011 4 次提交
  41. 11 1月, 2011 2 次提交