- 24 8月, 2018 1 次提交
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由 Marc Zyngier 提交于
A number of the Rockchip-specific drivers (IOMMU, display controllers) are now assuming that CONFIG_PM is set, and may completely misbehave if that's not the case. Since there is hardly any reason for this configuration option not to be selected anyway, let's require it (in the same way Tegra already does). Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 01 8月, 2018 1 次提交
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由 Masahiro Yamada 提交于
The UniPhier platform highly relies on the reset controller. Select RESET_CONTROLLER to enable it forcibly. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 19 7月, 2018 1 次提交
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由 Nishanth Menon 提交于
Add support for Texas Instrument's K3 Multicore SoC architecture processors. Reviewed-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NNishanth Menon <nm@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 16 5月, 2018 1 次提交
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由 Yoshihiro Shimoda 提交于
Add configuration option for the R-Car E3 (R8A77990) SoC. Signed-off-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 14 3月, 2018 1 次提交
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由 Jacopo Mondi 提交于
Add configuration option for the R-Car M3-N (R8A77965) SoC. Signed-off-by: NJacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 12 2月, 2018 1 次提交
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由 Sergei Shtylyov 提交于
Add a configuration option for the R-Car V3H (R8A77980) SoC. Based on the original (and large) patch by Vladimir Barinov. Signed-off-by: NVladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 14 12月, 2017 1 次提交
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由 Qiufang Dai 提交于
Add clock controller drivers for Amlogic Meson-AXG SoC. Acked-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NQiufang Dai <qiufang.dai@amlogic.com> Signed-off-by: NYixun Lan <yixun.lan@amlogic.com> Signed-off-by: NJerome Brunet <jbrunet@baylibre.com>
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- 07 11月, 2017 1 次提交
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由 Ard Biesheuvel 提交于
The Socionext Synquacer SoC has an external interrupt unit (EXIU) that forwards a block of 32 configurable input lines to 32 adjacent level-high type GICv3 SPIs. The EXIU has per-interrupt level/edge and polarity controls, and mask bits that keep the outgoing lines de-asserted, even though the controller may still latch interrupt conditions that occur while the line is masked. Signed-off-by: NArd Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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- 29 10月, 2017 1 次提交
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由 Jerome Brunet 提交于
select MESON_IRQ_GPIO in Kconfig for Amlogic's meson SoC family Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Reviewed-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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- 20 10月, 2017 1 次提交
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由 Sean Wang 提交于
The latest kernel tree already can support more MediaTek platforms such as MT2712 and MT7622, so additional descriptions for those platforms are added and certain cleanups are also being made here. Signed-off-by: NSean Wang <sean.wang@mediatek.com> Signed-off-by: NMatthias Brugger <matthias.bgg@gmail.com>
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- 18 9月, 2017 1 次提交
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由 Geert Uytterhoeven 提交于
Add a configuration option for the R-Car V3M SoC. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 14 8月, 2017 1 次提交
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由 Shawn Guo 提交于
Select PINCTRL for ZTE platform, so that we can have ZX pinctrl driver options available for enabling. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 27 7月, 2017 1 次提交
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由 Geert Uytterhoeven 提交于
Add a configuration option for the R-Car D3 SoC. Note that r8a77995 is the first Renesas "r8a<n>" SoC using a 5 digit number in its Kconfig symbol, as r8a77990 will be a different SoC. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 21 6月, 2017 2 次提交
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由 Thomas Petazzoni 提交于
This commit enables the newly introduced Marvell GICP and ICUs driver for the 64-bit Marvell EBU platforms. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
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由 Gregory CLEMENT 提交于
This commit makes sure the drivers for the Armada 7K/8K pin controllers are enabled. Reviewed-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
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- 19 6月, 2017 1 次提交
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由 Andreas Färber 提交于
Add ARCH_ACTIONS. Signed-off-by: NAndreas Färber <afaerber@suse.de>
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- 14 6月, 2017 1 次提交
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由 Daniel Lezcano 提交于
The config option name is now renamed to 'TIMER_OF' for consistency with the CLOCKSOURCE_OF_DECLARE => TIMER_OF_DECLARE change. Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
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- 02 6月, 2017 1 次提交
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由 Jayachandran C 提交于
Disable the option ARCH_VULCAN as a step towards deleting it entirely. There is still a reference in the kernel tree for ARCH_VULCAN, so we have to keep the config option around until that reference is removed. Signed-off-by: NJayachandran C <jnair@caviumnetworks.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 25 5月, 2017 1 次提交
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由 Andreas Färber 提交于
Add a Kconfig option ARCH_REALTEK. Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NAndreas Färber <afaerber@suse.de>
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- 28 4月, 2017 1 次提交
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由 Arnd Bergmann 提交于
The sunxi clk driver causes a link error when the reset controller subsystem is disabled: drivers/clk/built-in.o: In function `sun4i_ve_clk_setup': :(.init.text+0xd040): undefined reference to `reset_controller_register' drivers/clk/built-in.o: In function `sun4i_a10_display_init': :(.init.text+0xe5e0): undefined reference to `reset_controller_register' drivers/clk/built-in.o: In function `sunxi_usb_clk_setup': :(.init.text+0x10074): undefined reference to `reset_controller_register' We already force it to be enabled on arm32 and some other arm64 platforms, but not on arm64/sunxi. This adds the respective Kconfig statements to also select it here. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 26 4月, 2017 1 次提交
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由 Gregory CLEMENT 提交于
This commit makes sure the driver for the Armada 37xx pin controller is enabled. Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
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- 22 3月, 2017 1 次提交
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由 Krzysztof Kozlowski 提交于
Enable EXYNOS_PM_DOMAINS because recently Exynos5433 got support for Power Management domains. The Exynos5433 pinctrl driver requires EXYNOS_PMU to get the syscon-regmap for PMU address space. Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org> Reviewed-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Reviewed-by: NAlim Akhtar <alim.akhtar@samsung.com> Reviewed-by: NChanwoo Choi <cw00.choi@samsung.com>
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- 20 3月, 2017 1 次提交
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由 Icenowy Zheng 提交于
As the pinctrl driver selecting is refactored in Kconfig file of pinctrl-sunxi, now we can select only PINCTRL for Allwinner platform, and the default value of several pinctrl drivers useful on ARM64 Allwinner SoCs will become Y. This is the situation of 32-bit ARM ARCH_SUNXI option. Drop the select of per-SoC pinctrl choices, but keep selecting PINCTRL. Signed-off-by: NIcenowy Zheng <icenowy@aosc.xyz> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 09 2月, 2017 1 次提交
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由 Jayachandran C 提交于
Add support for ThunderX2 CN99XX arm64 server processors. Introduce a new arm64 platform config option ARCH_THUNDER2 for these processors. Signed-off-by: NJayachandran C <jnair@caviumnetworks.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 24 11月, 2016 1 次提交
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由 Geert Uytterhoeven 提交于
Identify the SoC type and revision, and register this information with the SoC bus, so it is available under /sys/devices/soc0/, and can be checked where needed using soc_device_match(). Identification is done using the Product Register or Common Chip Code Register, as declared in DT (PRR only for now), or using a hardcoded fallback if missing. Example: Detected Renesas R-Car Gen2 r8a7791 ES1.0 ... # cat /sys/devices/soc0/{machine,family,soc_id,revision} Koelsch R-Car Gen2 r8a7791 ES1.0 Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 13 11月, 2016 1 次提交
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由 Michael Scott 提交于
While debugging a kernel image size issue, I discovered that if all non ARCH_QCOM configs in the ARM64 defconfig are disabled, the QCOM pinctrl drivers will not be built. The QCOM pinctrl drivers have a dependency on GPIOLIB which was being selected when other ARCH configs were enabled, but ARCH_QCOM doesn't select GPIOLIB directly. Let's select GPIOLIB here to ensure the pinctrl drivers are built for QCOM platforms. Signed-off-by: NMichael Scott <michael.scott@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
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- 22 10月, 2016 1 次提交
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由 Masahiro Yamada 提交于
The UniPhier reset driver (drivers/reset/reset-uniphier.c) has been merged. Select ARCH_HAS_RESET_CONTROLLER from the SoC Kconfig. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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- 16 9月, 2016 1 次提交
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由 Jun Nie 提交于
This patch introduces ARCH_ZX to add the support of the ZTE ZX SoC family for the arm64 architecture. Signed-off-by: NJun Nie <jun.nie@linaro.org> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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- 01 9月, 2016 1 次提交
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由 York Sun 提交于
Add DDR EDAC driver for ARM-based compatible controllers. Both big-endian and little-endian are supported, as specified in device tree. Signed-off-by: NYork Sun <york.sun@nxp.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/1471990465-27443-1-git-send-email-york.sun@nxp.comSigned-off-by: NBorislav Petkov <bp@suse.de>
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- 24 8月, 2016 3 次提交
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由 Jon Hunter 提交于
Enable PM_GENERIC_DOMAINS for 64-bit Tegra devices. This is required to ensure that devices dependent upon a particular power domain are probed only after that power domain has been powered up. Signed-off-by: NJon Hunter <jonathanh@nvidia.com> Reviewed-by: NUlf Hansson <ulf.hansson@linaro.org> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 John Stultz 提交于
Things won't work if PINCTRL isn't enabled, so make sure to explicitly set it rather then betting that we have some other platform configed in which selects it. Cc: Arnd Bergmann <arnd@arndb.de> Cc: Wei Xu <xuwei5@hisilicon.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: NJohn Stultz <john.stultz@linaro.org> Signed-off-by: NWei Xu <xuwei5@hisilicon.com>
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由 Andre Przywara 提交于
The pinctrl driver is essential for the Allwinner SoCs to work. Add the driver's config symbol to the Kconfig entry to always compile it in. We can't use the arm approach to make the _driver's_ Kconfig symbol def_bool, because we lack the MACH_* symbols in arm64. That line was in the original pinctrl driver patch, but got removed to avoid the dependency on the Kconfig patch [1]. Also add the general PINCTRL symbol, which isn't selected automatically for the same reason. Reported-by: NJeroen Dekien <dekien@gmail.com> Signed-off-by: NAndre Przywara <andre.przywara@arm.com> [1]: http://lists.infradead.org/pipermail/linux-arm-kernel/2016-March/414086.htmlSigned-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 23 8月, 2016 1 次提交
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由 Thomas Petazzoni 提交于
This commit makes sure the driver for the Marvell PIC interrupt controller (used on Marvell Armada 7K/8K) is enabled. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1470408921-447-4-git-send-email-thomas.petazzoni@free-electrons.comSigned-off-by: NJason Cooper <jason@lakedaemon.net>
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- 22 8月, 2016 1 次提交
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由 Masahiro Yamada 提交于
HAVE_CLK is select'ed by CLKDEV_LOOKUP, which is select'ed by COMMON_CLK, which is select'ed by ARM64. No sub-architecture needs to select HAVE_CLK explicitly. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NWill Deacon <will.deacon@arm.com>
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- 11 8月, 2016 2 次提交
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由 Sudeep Holla 提交于
Even when PCI is disabled, ARCH_HISI selects HISILICON_IRQ_MBIGEN triggerring the following config warning: warning: (ARM64 && HISILICON_IRQ_MBIGEN) selects ARM_GIC_V3_ITS which has unmet direct dependencies (PCI && PCI_MSI) This patch makes selection of HISILICON_IRQ_MBIGEN conditional on PCI. Cc: Ma Jun <majun258@huawei.com> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: NSudeep Holla <sudeep.holla@arm.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Sudeep Holla 提交于
Even when PCI is disabled, ARCH_ALPINE selects ALPINE_MSI triggerring the following config warning: warning: (ARCH_ALPINE) selects ALPINE_MSI which has unmet direct dependencies (PCI) This patch makes selection of ALPINE_MSI conditional on PCI. Cc: Arnd Bergmann <arnd@arndb.de> Acked-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: NSudeep Holla <sudeep.holla@arm.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 09 8月, 2016 1 次提交
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由 Florian Fainelli 提交于
Add an ARCH_BRCMSTB Kconfig symbol which allows us not to update the dependencies for all STB-related drivers. Select BRCMSTB_L2_IRQ and GENERIC_IRQ_CHIP which are required for proper functioning. Signed-off-by: NDoug Berger <opendmb@gmail.com> Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NMarkus Mayer <mmayer@broadcom.com>
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- 08 8月, 2016 1 次提交
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由 Linus Walleij 提交于
This replaces: - "select ARCH_REQUIRE_GPIOLIB" with "select GPIOLIB" as this can now be selected directly. - "select ARCH_WANT_OPTIONAL_GPIOLIB" with no dependency: GPIOLIB is now selectable by everyone, so we need not declare our intent to select it. Cc: Michael Büsch <m@bues.ch> Acked-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 07 7月, 2016 2 次提交
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由 Michael Turquette 提交于
The AmLogic clock controller code is used by both arm and arm64 architectures. Explicitly select the core code for all Meson (arm64) builds, and also select the GXBB driver, since that's the way arm64 does things. Signed-off-by: NMichael Turquette <mturquette@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Simon Horman 提交于
Basic support for the Gen 3 R-Car M3-W SoC. Based on work for the r8a7795 and r8a7796 SoCs by Takeshi Kihara, Dirk Behme and Geert Uytterhoeven. Signed-off-by: NSimon Horman <horms+renesas@verge.net.au> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
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