- 26 4月, 2005 31 次提交
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由 Greg Howard 提交于
The following is an update of the patch I sent yesterday (3/9/05) incorporating suggestions from Christoph Hellwig and Andreas Schwab. It allows Altix and Altix-like systems to handle environmental events generated by the system controllers, and should apply on top of Jack Steiner's patch of 3/1/05 ("New chipset support for SN platform") and Mark Goodwin's patch of 3/8/05 ("Altix SN topology support for new chipsets and pci topology"). Signed-off-by: NGreg Howard <ghoward@sgi.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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由 Kenji Kaneshige 提交于
vector sharing patch had a typo ... mismatched spin_lock() with a spin_unlock_irq(). Fix from Kenji Kaneshige. Signed-off-by: NTony Luck <tony.luck@intel.com>
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由 Tony Luck 提交于
Rohit and Suresh changed their mind about the order to print things in /proc/cpuinfo, but didn't include the change in the version of the patch they sent to me. Signed-off-by: NTony Luck <tony.luck@intel.com>
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由 Kenji Kaneshige 提交于
Current ia64 linux cannot handle greater than 184 interrupt sources because of the lack of vectors. The following patch enables ia64 linux to handle greater than 184 interrupt sources by allowing the same vector number to be shared by multiple IOSAPIC's RTEs. The design of this patch is besed on "Intel(R) Itanium(R) Processor Family Interrupt Architecture Guide". Even if you don't have a large I/O system, you can see the behavior of vector sharing by changing IOSAPIC_LAST_DEVICE_VECTOR to fewer value. Signed-off-by: NKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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由 Suresh Siddha 提交于
Version 3 - rediffed to apply on top of Ashok's hotplug cpu patch. /proc/cpuinfo output in step with x86. This is an updated MC/MT identification patch based on the previous discussions on list. Add the Multi-core and Multi-threading detection for IPF. - Add new core and threading related fields in /proc/cpuinfo. Physical id Core id Thread id Siblings - setup the cpu_core_map and cpu_sibling_map appropriately - Handles Hot plug CPU Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: NGordon Jin <gordon.jin@intel.com> Signed-off-by: NRohit Seth <rohit.seth@intel.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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由 Keith Owens 提交于
memcpy_mck.S::__copy_user breaks in the prefetch code under these conditions :- * src is unaligned and * dst is near the end of a page and * the page after dst is unmapped. Signed-off-by: NKeith Owens <kaos@sgi.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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由 Tony Luck 提交于
Thanks to Mark for tracking down this one. Users of __copy_from_user_inatomic() will be sad if we don't handle lfetch faults for the "no_context" case. Signed-off-by: NTony Luck <tony.luck@intel.com>
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由 Mark Goodwin 提交于
This patch against ia64-test-2.6.12 is needed for forthcoming Altix chipsets. It renames geoid_any_t to geoid_common_t and splits the 8bit 'slab' field into two 4bit fields for 'slab' and 'slot'. Similar changes in the Altix SAL will retain backward compatibility for old kernels. Signed-off-by: NMark Goodwin <markgw@sgi.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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由 David Mosberger-Tang 提交于
Sadly, I goofed in this syscall-tuning patch: ChangeSet 1.1966.1.40 2005/01/22 13:31:05 davidm@hpl.hp.com [IA64] Improve ia64_leave_syscall() for McKinley-type cores. Optimize ia64_leave_syscall() a bit better for McKinley-type cores. The patch looks big, but that's mostly due to renaming r16/r17 to r2/r3. Good for a 13 cycle improvement. The problem is that the size of the physical stacked registers was loaded into the wrong register (r3 instead of r17). Since r17 by coincidence always had the value 1, this had the effect of turning rse_clear_invalid into a no-op. That poses the risk of leaking kernel state back to user-land and is hence not acceptable. The fix below is simple, but unfortunately it costs us about 28 cycles in syscall overhead. ;-( Unfortunately, there isn't much we can do about that since those registers have to be cleared one way or another. --david Signed-off-by: NTony Luck <tony.luck@intel.com>
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由 Russ Anderson 提交于
patch 2: Shub2 BTE recovery code will be implemented in SAL. Define the SAL interface. Modify bte_error to call SAL for shub2. Signed-off-by: NRuss Anderson <rja@sgi.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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由 Russ Anderson 提交于
patch 1: Add new MMR definitions. Modify BTE initialiation. Modify BTE copy. Signed-off-by: NRuss Anderson <rja@sgi.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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由 Mark Maule 提交于
Patch to disable SGI TIOCA GART TLB prefetching due to hw bug. Signed-off-by: NMark Maule <maule@sgi.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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由 Tony Luck 提交于
'min' is very picky about types of arguments, make it happy Signed-off-by: NTony Luck <tony.luck@intel.com>
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由 Tony Luck 提交于
Oops. Should have caught this before I checked it in. Signed-off-by: NTony Luck <tony.luck@intel.com>
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由 Alex Williamson 提交于
This fixes a couple of bugs in the zx1/sx1000 sba_iommu. These are all pretty low likelihood of hitting. The first problem is a simple off by one, deep in the sba_alloc_range() error path. Surrounding that was a lock ordering problem that could have potentially deadlocked with the order the locks are grabbed in sba_unmap_single(). I moved the resource locking into sba_search_bitmap() to prevent this. Finally, there's a potential race between unmapping pdir entries and marking incoming DMA pages clean. If you see any oddities, please let me know, but I've tested it pretty thoroughly here. Tony, please apply. Thanks, BTW, many of the options in this driver not on by default are becoming more and more broken. I'll be working on some patches to clean them out, but I wanted to get this bug fix out first. Signed-off-by: NAlex Williamson <alex.williamson@hp.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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由 Robin Holt 提交于
This patch introduces using the quicklists for pgd, pmd, and pte levels by combining the alloc and free functions into a common set of routines. This greatly simplifies the reading of this header file. This patch is simple but necessary for large numa configurations. It simply ensures that only pages from the local node are added to a cpus quicklist. This prevents the trapping of pages on a remote nodes quicklist by starting a process, touching a large number of pages to fill pmd and pte entries, migrating to another node, and then unmapping or exiting. With those conditions, the pages get trapped and if the machine has more than 100 nodes of the same size, the calculation of the pgtable high water mark will be larger than any single node so page table cache flushing will never occur. I ran lmbench lat_proc fork and lat_proc exec on a zx1 with and without this patch and did not notice any change. On an sn2 machine, there was a slight improvement which is possibly due to pages from other nodes trapped on the test node before starting the run. I did not investigate further. This patch shrinks the quicklist based upon free memory on the node instead of the high/low water marks. I have written it to enable preemption periodically and recalculate the amount to shrink every time we have freed enough pages that the quicklist size should have grown. I rescan the nodes zones each pass because other processess may be draining node memory at the same time as we are adding. Signed-off-by: NRobin Holt <holt@sgi.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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由 Bruce Losure 提交于
Missed the "bk new" for this file in the last commit. Signed-off-by: NBruce Losure <blosure@sgi.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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由 Aaron J Young 提交于
This patch adds the necessary "hook" to allow SGI/SN machines to perform a system power off upon a 'init 0', 'halt -p', 'poweroff' or 'shutdown -h'. The "hook" is to set the pm_power_off callback to ia64_sn_power_down(). pm_power_off is checked in machine_power_off()/do_poweroff() and, if set, is executed. ia64_sn_power_down() is a function already present (but not used currently) in the sn kernel. ia64_sn_power_down() makes a SAL call to execute the power off. Signed-off-by: NAaron J Young <ayoung@sgi.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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由 Bruce Losure 提交于
This patch is to provide CX port infrastructure for SGI TIO-based h/w. Also a 'core services' driver for SGI FPGA-based h/w. Signed-off-by: NBruce Losure <blosure@sgi.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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由 Stephane Eranian 提交于
- make pfm_sysctl a global such that it is possible to enable/disable debug printk in sampling formats using PFM_DEBUG. - remove unused pfm_debug_var variable - fix a bug in pfm_handle_work where an BUG_ON() could be triggered. There is a path where pfm_handle_work() can be called with interrupts enabled, i.e., when TIF_NEED_RESCHED is set. The fix correct the masking and unmasking of interrupts in pfm_handle_work() such that we restore the interrupt mask as it was upon entry. signed-off-by: Nstephane eranian <eranian@hpl.hp.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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由 Colin Ngam 提交于
This patch enables our TIO IO chipset to support variable length nasids in Shub2 chipset. Signed-off-by: NColin Ngam <cngam@sgi.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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由 Colin Ngam 提交于
Signed-off-by: NColin Ngam <cngam@sgi.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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由 Mark Goodwin 提交于
Fix infinite loop if sn_hwperf_location_to_bpos() fails. Signed-off-by: NMark Goodwin <markgw@sgi.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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由 Mark Goodwin 提交于
please accept this patch to the Altix SN platform topology export interface to support new chipsets and to export PCI topology. This follows on top of Jack Steiner's patch dated March 1st ("New chipset support for SN platform"). Signed-off-by: NMark Goodwin <markgw@sgi.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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由 David Mosberger-Tang 提交于
Recently I noticed that clearing ar.ssd/ar.csd right before srlz.d is causing significant stalling in the syscall path. The patch below fixes that by moving the register-writes after srlz.d. On a Madison, this drops break-based getpid() from 241 to 226 cycles (-15 cycles). Signed-off-by: NDavid Mosberger-Tang <davidm@hpl.hp.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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由 Keith Owens 提交于
Detect user space by the unwind frame with predicate PRED_USER_STACK set, instead of a user space IP. Tighten up the last ditch check for running off the top of the kernel stack. Based on a suggestion by David Mosberger, reworked to fit the current tree. This survives my stress test which used to break 2.6.9 kernels. Unlike 2.6.11, the stress test now unwinds to the correct point, so gdb can get the user space registers. Signed-off-by: NKeith Owens <kaos@sgi.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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由 David Mosberger-Tang 提交于
Call cpu_relax() in busy-waiting loops of the ITC-syncing code. Signed-off-by: NDavid Mosberger-Tang <davidm@hpl.hp.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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由 Jack Steiner 提交于
Change the value of the SAL call number for a new SAL request. The initial implementation in the PROM did not match what the OS expected. Since the OS can run on PROMs that do not implement the new call, changing the call number avoids the issue. New PROMs will implement the new call number. (This avoids problems with the 4.05 PROM). Signed-off-by: NJack Steiner <steiner@sgi.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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由 Mark Maule 提交于
Provide a driver for the altix TIOCA AGP chipset. An agpgart backend will be provided as a separate patch. Signed-off-by: NMark Maule <maule@sgi.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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由 Mark Maule 提交于
Move a couple of headers out of arch/ia64/sn/include/pci and into include/asm-ia64/sn. Signed-off-by: NMark Maule <maule@sgi.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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由 Mark Maule 提交于
Provide an abstraction of the altix pci dma runtime layer so that multiple pci-based bridges can be supported. Signed-off-by: NMark Maule <maule@sgi.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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- 25 4月, 2005 9 次提交
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由 Adrian Bunk 提交于
This patch makes some needlessly global code static. Signed-off-by: NAdrian Bunk <bunk@stusta.de> Acked-by: NBenjamin LaHaise <bcrl@kvack.org> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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由 Al Viro 提交于
3rd argument of sys_debug_setcontext() is also a userland pointer. Signed-off-by: NAl Viro <viro@parcelfarce.linux.theplanet.co.uk> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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由 Al Viro 提交于
void * __iomem replaced with intended void __iomem *. Signed-off-by: NAl Viro <viro@parcelfarce.linux.theplanet.co.uk> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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由 Al Viro 提交于
replaced declaration of EA from u32 to unsigned long - this beast is used only to cast it to (userland) pointer and proper integer type for that is unsigned long. Signed-off-by: NAl Viro <viro@parcelfarce.linux.theplanet.co.uk> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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由 Al Viro 提交于
Signed-off-by: NAl Viro <viro@parcelfarce.linux.theplanet.co.uk> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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由 Al Viro 提交于
Signed-off-by: NAl Viro <viro@parcelfarce.linux.theplanet.co.uk> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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由 Al Viro 提交于
* ->io_base_virt in struct pci_controller is iomem pointer. Marked as such. Most of the places that used it are already annotated to expect iomem. * places that did gratitious (and wrong) casts a-la isa_io_base = (unsigned long)ioremap(...); hose->io_base_virt = (void *)isa_io_base; turned into hose->io_base_virt = ioremap(...); isa_io_base = (unsigned long)hose->io_base_virt; * pci_bus_io_base() annotated as returning iomem pointer. Signed-off-by: NAl Viro <viro@parcelfarce.linux.theplanet.co.uk> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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由 Al Viro 提交于
sigcontext.regs is a userland pointer Signed-off-by: NAl Viro <viro@parcelfarce.linux.theplanet.co.uk> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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