1. 07 1月, 2016 6 次提交
    • R
      dts: vt8500: Add SDHC node to DTS file for WM8650 · 0f090bf1
      Roman Volkov 提交于
      Since WM8650 has the same 'WMT' SDHC controller as WM8505, and the driver
      is already in the kernel, this node enables the controller support for
      WM8650
      Signed-off-by: NRoman Volkov <rvolkov@v1ros.org>
      Reviewed-by: NAlexey Charkov <alchark@gmail.com>
      Cc: stable@vger.kernel.org
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      0f090bf1
    • T
      ARM: Fix broken USB support in multi_v7_defconfig for sunxi devices · 5b1a6181
      Timo Sigurdsson 提交于
      Commit 69fb4dca ("power: Add an axp20x-usb-power driver") introduced a
      new driver for the USB power supply used on various Allwinner based SBCs.
      However, the driver was not added to multi_v7_defconfig which breaks USB
      support for some boards (e.g. LeMaker BananaPi) as the kernel will now
      turn off the USB power supply during boot by default if the driver isn't
      present. (This was not the case in linux 4.3 or lower where the USB power
      was always left on.)
      
      Hence, add the driver to multi_v7_defconfig in order to keep USB support
      working on those boards that require it.
      Signed-off-by: NTimo Sigurdsson <public_timo.s@silentcreek.de>
      Tested-by: NTimo Sigurdsson <public_timo.s@silentcreek.de>
      Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      5b1a6181
    • P
      kvm: x86: only channel 0 of the i8254 is linked to the HPET · e5e57e7a
      Paolo Bonzini 提交于
      While setting the KVM PIT counters in 'kvm_pit_load_count', if
      'hpet_legacy_start' is set, the function disables the timer on
      channel[0], instead of the respective index 'channel'. This is
      because channels 1-3 are not linked to the HPET.  Fix the caller
      to only activate the special HPET processing for channel 0.
      Reported-by: NP J P <pjp@fedoraproject.org>
      Fixes: 0185604cSigned-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      e5e57e7a
    • L
      ARM: versatile: fix MMC/SD interrupt assignment · 20f12758
      Linus Walleij 提交于
      Commit 0976c946
      "arm/versatile: Fix versatile irq specifications"
      has an off-by-one error on the Versatile AB that has
      been regressing the Versatile AB hardware for some time.
      
      However it seems like the interrupt assignments have
      never been correct and I have now adjusted them according
      to the specification. The masks for the valid interrupts
      made it impossible to assign the right SIC interrupt
      for the MMCI, so I went in and fixed these to correspond
      to the specifications, and added references if anyone
      wants to double-check.
      
      Due to the Versatile PB including the Versatile AB
      as a base DTS file, we need to override and correct
      some values to correspond to the actual changes in the
      hardware.
      
      For the Versatile PB I don't think the IRQ line
      assignment for MMCI has ever been correct for either of
      the two MMCI blocks. It would be nice if someone with the
      physical PB board could test this.
      
      Patch tested on the Versatile AB, QEMU for Versatile AB
      and QEMU for Versatile PB.
      
      Cc: Rob Herring <robh@kernel.org>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: stable@vger.kernel.org
      Fixes: 0976c946 ("arm/versatile: Fix versatile irq specifications")
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      20f12758
    • L
      ARM: nomadik: set latencies to 8 cycles · a461a3ec
      Linus Walleij 提交于
      The Nomadik has sporadic crashes because of these latencies, setting
      them to max makes the platform work nicely, so use this values for
      now.
      
      These latencies were set to 2 since the Nomadik platform was merged,
      but I suspect they never took effect until the right size and
      associativity for the cache was specified in the device tree and
      that is why the crash comes now.
      
      Cc: stable@vger.kernel.org
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      a461a3ec
    • T
      ARM: OMAP2+: Fix onenand rate detection to avoid filesystem corruption · e7b11dc7
      Tony Lindgren 提交于
      Commit 63aa945b ("memory: omap-gpmc: Add Kconfig option for debug")
      unified the GPMC debug for the SoCs with GPMC. The commit also left out
      the option for HWMOD_INIT_NO_RESET as we now require proper timings for
      GPMC to be able to remap GPMC devices out of address 0.
      
      Unfortunately on Nokia N900, onenand now only partially works with the
      device tree provided timings. It works enough to get detected but the
      clock rate supported by the onenand chip gets misdetected. This in turn
      causes the GPMC timings to be miscalculated and this leads into file
      system corruption on N900.
      
      Looks like onenand needs CS_CONFIG1 bit 27 WRITETYPE set for for sync
      write. This is needed also for async timings when we write to onenand
      with omap2_onenand_set_async_mode(). Without sync write bit set, the
      async read for the onenand ONENAND_REG_VERSION_ID will return 0xfff.
      
      Let's exit with an error if onenand rate is not detected. And let's
      remove the extra call to omap2_onenand_set_async_mode() as we only need
      to do this once at the end of omap2_onenand_setup_async().
      
      Fixes: 63aa945b ("memory: omap-gpmc: Add Kconfig option for debug")
      Cc: stable@vger.kernel.org # v4.2+
      Reported-by: NIvaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
      Tested-by: NIvaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
      Tested-by: NAaro Koskinen <aaro.koskinen@iki.fi>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      e7b11dc7
  2. 06 1月, 2016 18 次提交
  3. 05 1月, 2016 1 次提交
    • C
      tile: provide CONFIG_PAGE_SIZE_64KB etc for tilepro · c1b27ab5
      Chris Metcalf 提交于
      This allows the build system to know that it can't attempt to
      configure the Lustre virtual block device, for example, when tilepro
      is using 64KB pages (as it does by default).  The tilegx build
      already provided those symbols.
      
      Previously we required that the tilepro hypervisor be rebuilt with
      a different hardcoded page size in its headers, and then Linux be
      rebuilt using the updated hypervisor header.  Now we allow each of
      the hypervisor and Linux to be built independently.  We still check
      at boot time to ensure that the page size provided by the hypervisor
      matches what Linux expects.
      Signed-off-by: NChris Metcalf <cmetcalf@ezchip.com>
      Cc: stable@vger.kernel.org [3.19+]
      c1b27ab5
  4. 01 1月, 2016 3 次提交
  5. 31 12月, 2015 1 次提交
  6. 30 12月, 2015 5 次提交
  7. 29 12月, 2015 1 次提交
  8. 28 12月, 2015 1 次提交
  9. 25 12月, 2015 4 次提交
    • R
      sparc64: fix FP corruption in user copy functions · a7c5724b
      Rob Gardner 提交于
      Short story: Exception handlers used by some copy_to_user() and
      copy_from_user() functions do not diligently clean up floating point
      register usage, and this can result in a user process seeing invalid
      values in floating point registers. This sometimes makes the process
      fail.
      
      Long story: Several cpu-specific (NG4, NG2, U1, U3) memcpy functions
      use floating point registers and VIS alignaddr/faligndata to
      accelerate data copying when source and dest addresses don't align
      well. Linux uses a lazy scheme for saving floating point registers; It
      is not done upon entering the kernel since it's a very expensive
      operation. Rather, it is done only when needed. If the kernel ends up
      not using FP regs during the course of some trap or system call, then
      it can return to user space without saving or restoring them.
      
      The various memcpy functions begin their FP code with VISEntry (or a
      variation thereof), which saves the FP regs. They conclude their FP
      code with VISExit (or a variation) which essentially marks the FP regs
      "clean", ie, they contain no unsaved values. fprs.FPRS_FEF is turned
      off so that a lazy restore will be triggered when/if the user process
      accesses floating point regs again.
      
      The bug is that the user copy variants of memcpy, copy_from_user() and
      copy_to_user(), employ an exception handling mechanism to detect faults
      when accessing user space addresses, and when this handler is invoked,
      an immediate return from the function is forced, and VISExit is not
      executed, thus leaving the fprs register in an indeterminate state,
      but often with fprs.FPRS_FEF set and one or more dirty bits. This
      results in a return to user space with invalid values in the FP regs,
      and since fprs.FPRS_FEF is on, no lazy restore occurs.
      
      This bug affects copy_to_user() and copy_from_user() for NG4, NG2,
      U3, and U1. All are fixed by using a new exception handler for those
      loads and stores that are done during the time between VISEnter and
      VISExit.
      
      n.b. In NG4memcpy, the problematic code can be triggered by a copy
      size greater than 128 bytes and an unaligned source address.  This bug
      is known to be the cause of random user process memory corruptions
      while perf is running with the callgraph option (ie, perf record -g).
      This occurs because perf uses copy_from_user() to read user stacks,
      and may fault when it follows a stack frame pointer off to an
      invalid page. Validation checks on the stack address just obscure
      the underlying problem.
      Signed-off-by: NRob Gardner <rob.gardner@oracle.com>
      Signed-off-by: NDave Aldridge <david.j.aldridge@oracle.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      a7c5724b
    • R
      sparc64: Perf should save/restore fault info · 83352694
      Rob Gardner 提交于
      There have been several reports of random processes being killed with
      a bus error or segfault during userspace stack walking in perf.  One
      of the root causes of this problem is an asynchronous modification to
      thread_info fault_address and fault_code, which stems from a perf
      counter interrupt arriving during kernel processing of a "benign"
      fault, such as a TSB miss. Since perf_callchain_user() invokes
      copy_from_user() to read user stacks, a fault is not only possible,
      but probable. Validity checks on the stack address merely cover up the
      problem and reduce its frequency.
      
      The solution here is to save and restore fault_address and fault_code
      in perf_callchain_user() so that the benign fault handler is not
      disturbed by a perf interrupt.
      Signed-off-by: NRob Gardner <rob.gardner@oracle.com>
      Signed-off-by: NDave Aldridge <david.j.aldridge@oracle.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      83352694
    • R
      sparc64: Ensure perf can access user stacks · 3f74306a
      Rob Gardner 提交于
      When an interrupt (such as a perf counter interrupt) is delivered
      while executing in user space, the trap entry code puts ASI_AIUS in
      %asi so that copy_from_user() and copy_to_user() will access the
      correct memory. But if a perf counter interrupt is delivered while the
      cpu is already executing in kernel space, then the trap entry code
      will put ASI_P in %asi, and this will prevent copy_from_user() from
      reading any useful stack data in either of the perf_callchain_user_X
      functions, and thus no user callgraph data will be collected for this
      sample period. An additional problem is that a fault is guaranteed
      to occur, and though it will be silently covered up, it wastes time
      and could perturb state.
      
      In perf_callchain_user(), we ensure that %asi contains ASI_AIUS
      because we know for a fact that the subsequent calls to
      copy_from_user() are intended to read the user's stack.
      
      [ Use get_fs()/set_fs() -DaveM ]
      Signed-off-by: NRob Gardner <rob.gardner@oracle.com>
      Signed-off-by: NDave Aldridge <david.j.aldridge@oracle.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      3f74306a
    • R
      sparc64: Don't set %pil in rtrap_nmi too early · 1ca04a4c
      Rob Gardner 提交于
      Commit 28a1f533 delays setting %pil to avoid potential
      hardirq stack overflow in the common rtrap_irq path.
      Setting %pil also needs to be delayed in the rtrap_nmi
      path for the same reason.
      Signed-off-by: NRob Gardner <rob.gardner@oracle.com>
      Signed-off-by: NDave Aldridge <david.j.aldridge@oracle.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      1ca04a4c