1. 13 12月, 2021 1 次提交
  2. 09 12月, 2021 1 次提交
  3. 24 11月, 2021 1 次提交
  4. 23 11月, 2021 1 次提交
  5. 05 10月, 2021 1 次提交
  6. 05 8月, 2021 1 次提交
  7. 31 7月, 2021 2 次提交
  8. 24 7月, 2021 1 次提交
  9. 23 7月, 2021 4 次提交
  10. 10 7月, 2021 1 次提交
    • L
      drm/i915: Add release id version · ca6374e2
      Lucas De Marchi 提交于
      Besides the arch version returned by GRAPHICS_VER(), new platforms
      contain a "release id" to make clear the difference from one platform to
      another.
      
      The release id number is not formally defined by hardware until future
      platforms that will expose it via a new GMD_ID register.  For the
      platforms we support before that register becomes available we will set
      the values in software and we can set them as we please. So the plan is
      to set them so we can group different features under a single
      GRAPHICS_VER_FULL() check.
      
      After GMD_ID is used, the usefulness of a "full version check" will be
      greatly reduced and will be mostly used for deciding workarounds and a
      few code paths. So it makes sense to keep it as a separate field from
      graphics_ver. Also, as a platform with `release == n` may be closer
      feature-wise to `n - 2` than to `n - 1`, use the word "release" rather
      than the more common "minor" for this
      
      This is a mix of 2 independent changes: one by me and the other by Matt
      Roper.
      
      v2:
        - Reword commit message to make it clearer why we don't call it
          "minor" (Matt Roper and Tvrtko)
        - Rename variables s/*_ver_release/*_rel/ and print them in a single
          line formatted as {ver}.{rel:2} (Jani and Matt Roper)
      
      Cc: Matt Roper <matthew.d.roper@intel.com>
      Signed-off-by: NLucas De Marchi <lucas.demarchi@intel.com>
      Signed-off-by: NMatt Roper <matthew.d.roper@intel.com>
      Reviewed-by: NMatt Roper <matthew.d.roper@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20210707235921.2416911-2-lucas.demarchi@intel.com
      ca6374e2
  11. 08 7月, 2021 1 次提交
  12. 09 6月, 2021 1 次提交
  13. 20 5月, 2021 1 次提交
  14. 07 5月, 2021 1 次提交
  15. 21 4月, 2021 2 次提交
  16. 14 4月, 2021 4 次提交
  17. 29 3月, 2021 2 次提交
  18. 25 3月, 2021 1 次提交
  19. 24 3月, 2021 1 次提交
    • M
      drm/i915: Add DISPLAY_VER() and related macros · 01eb15c9
      Matt Roper 提交于
      Although we've long referred to platforms by a single "GEN" number, the
      hardware teams have recommended that we stop doing this since the
      various component IP blocks are going to start using independent number
      schemes with varying cadence.  To support this, hardware platforms a bit
      down the road are going to start providing MMIO registers that the
      driver can read to obtain the "graphics version," "media version," and
      "display version" without needing to do a PCI ID -> platform -> version
      translation.
      
      Although our current platforms don't yet expose these registers (and the
      next couple we release probably won't have them yet either), the
      hardware teams would still like to see us move to this independent
      numbering scheme now in preparation.  For i915 that means we should try
      to eliminate all usage of INTEL_GEN() throughout our code and instead
      replace it with separate GRAPHICS_VER(), MEDIA_VER(), and DISPLAY_VER()
      constructs in the code.  For old platforms, these will all usually give
      the same value for each IP block (aside from a few special cases like
      GLK which we can no more accurately represent as graphics=9 +
      display=10), but future platforms will have more flexibility to bump IP
      version numbers independently.
      
      The upcoming ADL-P platform will have a display version of 13 and a
      graphics version of 12, so let's just the first step of breaking out
      DISPLAY_VER(), but leaving the rest of INTEL_GEN() untouched for now.
      For now we'll automatically derive the display version from the
      platform's INTEL_GEN() value except in cases where an alternative
      display version is explicitly provided in the device info structure.
      
      We also add some helper macros IS_DISPLAY_VER(i915, ver) and
      IS_DISPLAY_RANGE(i915, from, until) that match the behavior of the
      existing gen-based macros.  However unlike IS_GEN(), we will implement
      those macros with direct comparisons rather than trying to maintain a
      mask to help compiler optimization.  In practice the optimization winds
      up not being used in very many places (since the vast majority of our
      platform checks are of the form "gen >= x") so there is pretty minimal
      size reduction in the final driver binary[1].  We're also likely going
      to need to extend these version numbers to non-integer major.minor
      values at some point in the future, so the mask approach won't work at
      all once we get to platforms like that.
      
       [1] The results before/after the next patch in this series, which
           switches our code over to the new display macros:
      
              $ size i915.ko.{orig,new}
                 text    data     bss     dec     hex filename
              2940291  102944    5384 3048619  2e84ab i915.ko.orig
              2940723  102956    5384 3049063  2e8667 i915.ko.new
      
      v2:
       - Move version into device info's display sub-struct. (Jani)
       - Add extra parentheses to macros.  (Jani)
       - Note the lack of genmask optimization in the display-based macros and
         give size data.  (Lucas)
      
      Cc: Jani Nikula <jani.nikula@linux.intel.com>
      Cc: Lucas De Marchi <lucas.demarchi@intel.com>
      Signed-off-by: NMatt Roper <matthew.d.roper@intel.com>
      Reviewed-by: NLucas De Marchi <lucas.demarchi@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20210320044245.3920043-3-matthew.d.roper@intel.com
      01eb15c9
  20. 13 2月, 2021 1 次提交
    • M
      drm/i915: FPGA_DBG is display-specific · a321c3c6
      Matt Roper 提交于
      Although the bspec's description doesn't make it very clear, the
      hardware architects have confirmed that the FPGA_DBG register that we
      use to check for unclaimed MMIO accesses is display-specific and will
      only properly flag unclaimed MMIO transactions for registers in the
      display range.  If a platform doesn't have display, FPGA_DBG itself will
      not be available and should not be checked.  Let's move the feature flag
      into intel_device_info.display to more accurately reflect this.
      
      Given that we now know FPGA_DBG is display-specific, it could be argued
      that we should only check it on out intel_de_*() functions.  However
      let's not make that change right now; keeping the checks in all of the
      existing locations still helps us catch cases where regular
      intel_uncore_*() functions use bad MMIO offset math / base addresses and
      accidentally wind up landing within an unused area within the display
      MMIO range.  It will also help catch cases where userspace-initiated
      MMIO (e.g., IGT's intel_reg tool) attempt to read bad offsets within the
      display range.
      
      v2:  Add missing hunk with the update to the HAS_FPGA_DBG_UNCLAIMED
           macro.  (CI)
      
      Cc: Lucas De Marchi <lucas.demarchi@intel.com>
      Signed-off-by: NMatt Roper <matthew.d.roper@intel.com>
      Reviewed-by: NLucas De Marchi <lucas.demarchi@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20210212222049.3516344-1-matthew.d.roper@intel.com
      a321c3c6
  21. 21 1月, 2021 1 次提交
    • C
      drm/i915/adl_s: Add ADL-S platform info and PCI ids · 0883d63b
      Caz Yokoyama 提交于
      - Add the initial platform information for Alderlake-S.
      - Specify ppgtt_size value
      - Add dma_mask_size
      - Add ADLS REVIDs
      - HW tracking(Selective Update Tracking Enable) has been
        removed from ADLS. Disable PSR2 till we enable software/
        manual tracking.
      
      v2:
      - Add support for different ADLS SOC steppings to select
        correct GT/DISP stepping based on Bspec 53655 based on
        feedback from Matt Roper.(aswarup)
      
      v3:
      - Make display/gt steppings info generic for reuse with TGL and ADLS.
      - Modify the macros to reuse tgl_revids_get()
      - Add HTI support to adls device info.(mdroper)
      
      v4:
      - Rebase on TGL patch for applying WAs based on stepping info from
        Matt Roper's feedback.(aswarup)
      
      v5:
      - Replace macros with PCI IDs in revid to stepping table.
      
      v6: remove stray adls_revids (Lucas)
      
      Bspec: 53597
      Bspec: 53648
      Bspec: 53655
      Bspec: 48028
      Bspec: 53650
      BSpec: 50422
      
      Cc: José Roberto de Souza <jose.souza@intel.com>
      Cc: Matt Roper <matthew.d.roper@intel.com>
      Cc: Lucas De Marchi <lucas.demarchi@intel.com>
      Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
      Cc: Jani Nikula <jani.nikula@intel.com>
      Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
      Cc: Imre Deak <imre.deak@intel.com>
      Signed-off-by: NCaz Yokoyama <caz.yokoyama@intel.com>
      Signed-off-by: NAditya Swarup <aditya.swarup@intel.com>
      Reviewed-by: NLucas De Marchi <lucas.demarchi@intel.com>
      Signed-off-by: NLucas De Marchi <lucas.demarchi@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20210119192931.1116500-2-lucas.demarchi@intel.com
      0883d63b
  22. 09 1月, 2021 1 次提交
  23. 24 12月, 2020 1 次提交
  24. 14 10月, 2020 1 次提交
  25. 18 8月, 2020 1 次提交
  26. 14 7月, 2020 2 次提交
  27. 09 7月, 2020 4 次提交