- 13 12月, 2021 1 次提交
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由 Thinh Nguyen 提交于
Synopsys introduced a new enhancement to DWC_usb32 called Multi-Stream Transfer (MST) to improve bulk streams performance for SuperSpeed and SuperSpeed Plus. This enhancement allows the controller to look ahead and process multiple bulk streams. Previously, to initiate a bulk stream transfer, the driver has to issue Start Transfer command and wait for the stream to complete before initiating a new stream. As a result, the controller does not process TRBs beyond a single stream. With the enhancement, as long as there are new requests, the dwc3 driver can keep preparing new TRBs and the controller can keep caching and processing them without waiting for the transfer completion. The programming flow is similar to regular bulk endpoint with a few additional rules: 1) Chained TRBs of the same stream must have a matching stream ID 2) The last TRB of a stream must have CHN=0 3) All the TRBs with LST=0 must have CSP=1 Depends on the application and usage, internal tests show significant performance improvement in UASP transfers with this enhancement. Signed-off-by: NThinh Nguyen <Thinh.Nguyen@synopsys.com> Link: https://lore.kernel.org/r/cd9c7a8bf11f790983ac546222dd114893f16b3a.1638242424.git.Thinh.Nguyen@synopsys.comSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 17 11月, 2021 1 次提交
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由 Thinh Nguyen 提交于
During our predesign phase for DWC_usb32, the GHWPARAMS9 register offset was 0xc680. We revised our final design, and the GHWPARAMS9 offset is now moved to 0xc6e8 on release. Fixes: 16710380 ("usb: dwc3: Capture new capability register GHWPARAMS9") Cc: <stable@vger.kernel.org> Signed-off-by: NThinh Nguyen <Thinh.Nguyen@synopsys.com> Link: https://lore.kernel.org/r/1541737108266a97208ff827805be1f32852590c.1635202893.git.Thinh.Nguyen@synopsys.comSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 22 10月, 2021 2 次提交
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由 Jack Pham 提交于
Fix the DWC3_EP_* flag macros so that the definitions are all lined up on the same tab column for consistent style. No functional change. Signed-off-by: NJack Pham <jackp@codeaurora.org> Link: https://lore.kernel.org/r/20211021180129.27938-2-jackp@codeaurora.orgSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Jack Pham 提交于
Some functions may dynamically enable and disable their endpoints regularly throughout their operation, particularly when Set Interface is employed to switch between Alternate Settings. For instance the UAC2 function has its respective endpoints for playback & capture associated with AltSetting 1, in which case those endpoints would not get enabled until the host activates the AltSetting. And they conversely become disabled when the interfaces' AltSetting 0 is chosen. With the DWC3 FIFO resizing algorithm recently added, every usb_ep_enable() call results in a call to resize that EP's TXFIFO, but if the same endpoint is enabled again and again, this incorrectly leads to FIFO RAM allocation exhaustion as the mechanism did not account for the possibility that endpoints can be re-enabled many times. Example log splat: dwc3 a600000.dwc3: Fifosize(3717) > RAM size(3462) ep3in depth:217973127 configfs-gadget gadget: u_audio_start_capture:521 Error! dwc3 a600000.dwc3: request 000000000be13e18 was not queued to ep3in Add another bit DWC3_EP_TXFIFO_RESIZED to dep->flags to keep track of whether an EP had already been resized in the current configuration. If so, bail out of dwc3_gadget_resize_tx_fifos() to avoid the calculation error resulting from accumulating the EP's FIFO depth repeatedly. This flag is retained across multiple ep_disable() and ep_enable() calls and is cleared when GTXFIFOSIZn is reset in dwc3_gadget_clear_tx_fifos() upon receiving the next Set Config. Fixes: 9f607a30 ("usb: dwc3: Resize TX FIFOs to meet EP bursting requirements") Reviewed-by: NThinh Nguyen <Thinh.Nguyen@synopsys.com> Signed-off-by: NJack Pham <jackp@codeaurora.org> Link: https://lore.kernel.org/r/20211021180129.27938-1-jackp@codeaurora.orgSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 21 9月, 2021 1 次提交
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由 Wesley Cheng 提交于
There is a race present where the DWC3 runtime resume runs in parallel to the UDC unbind sequence. This will eventually lead to a possible scenario where we are enabling the run/stop bit, without a valid composition defined. Thread#1 (handling UDC unbind): usb_gadget_remove_driver() -->usb_gadget_disconnect() -->dwc3_gadget_pullup(0) --> continue UDC unbind sequence -->Thread#2 is running in parallel here Thread#2 (handing next cable connect) __dwc3_set_mode() -->pm_runtime_get_sync() -->dwc3_gadget_resume() -->dwc->gadget_driver is NOT NULL yet -->dwc3_gadget_run_stop(1) --> _dwc3gadget_start() ... Fix this by tracking the pullup disable routine, and avoiding resuming of the DWC3 gadget. Once the UDC is re-binded, that will trigger the pullup enable routine, which would handle enabling the DWC3 gadget. Acked-by: NFelipe Balbi <balbi@kernel.org> Signed-off-by: NWesley Cheng <wcheng@codeaurora.org> Link: https://lore.kernel.org/r/20210917021852.2037-1-wcheng@codeaurora.orgSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 14 9月, 2021 1 次提交
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由 Balaji Prakash J 提交于
Set reference clock period when it differs from dwc3 default hardware set. We could calculate clock period based on reference clock frequency. But this information is not always available. This is the case of PCI bus attached USB host. For that reason we use a custom property. Tested (USB2 only) on IPQ6010 SoC based board with 24 MHz reference clock while hardware default is 19.2 MHz. [ baruch: rewrite commit message; drop GFLADJ code; remove 'quirk-' from property name; mention tested hardware ] Acked-by: NFelipe Balbi <balbi@kernel.org> Signed-off-by: NBalaji Prakash J <bjagadee@codeaurora.org> Signed-off-by: NBaruch Siach <baruch@tkos.co.il> Nacked-by: NRob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/9f399bdf1ff752e31ab7497e3d5ce19bbb3ff247.1630389452.git.baruch@tkos.co.ilSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 18 8月, 2021 1 次提交
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由 Jack Pham 提交于
On DWC_usb3 revisions 3.00a and newer (including DWC_usb31 and DWC_usb32) the GUCTL1 register gained the DEV_DECOUPLE_L1L2_EVT field (bit 31) which when enabled allows the controller in device mode to treat USB 2.0 L1 LPM & L2 events separately. After commit d1d90dd2 ("usb: dwc3: gadget: Enable suspend events") the controller will now receive events (and therefore interrupts) for every state change when entering/exiting either L1 or L2 states. Since L1 is handled entirely by the hardware and requires no software intervention, there is no need to even enable these events and unnecessarily notify the gadget driver. Enable the aforementioned bit to help reduce the overall interrupt count for these L1 events that don't need to be handled while retaining the events for full L2 suspend/wakeup. Tested-by: NJun Li <jun.li@nxp.com> Tested-by: Amit Pundir <amit.pundir@linaro.org> # for RB5 (sm8250) Tested-by: John Stultz <john.stultz@linaro.org> # for HiKey960 & db845c Reviewed-by: NJun Li <jun.li@nxp.com> Acked-by: NFelipe Balbi <balbi@kernel.org> Signed-off-by: NJack Pham <jackp@codeaurora.org> Link: https://lore.kernel.org/r/20210812082635.12924-1-jackp@codeaurora.orgSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 21 7月, 2021 1 次提交
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由 Linyu Yuan 提交于
we found crash in dwc3_disconnect_gadget(), it is because dwc->gadget_driver become NULL before async access. 7dc0c55e ('USB: UDC core: Add udc_async_callbacks gadget op') suggest a common way to avoid such kind of issue. this change implment the callback in dwc3 and change related functions which have callback to usb gadget driver. Acked-by: NAlan Stern <stern@rowland.harvard.edu> Signed-off-by: NLinyu Yuan <linyyuan@codeaurora.org> Link: https://lore.kernel.org/r/20210629015118.7944-1-linyyuan@codeaurora.orgSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 12 7月, 2021 1 次提交
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由 Wesley Cheng 提交于
Some devices have USB compositions which may require multiple endpoints that support EP bursting. HW defined TX FIFO sizes may not always be sufficient for these compositions. By utilizing flexible TX FIFO allocation, this allows for endpoints to request the required FIFO depth to achieve higher bandwidth. With some higher bMaxBurst configurations, using a larger TX FIFO size results in better TX throughput. By introducing the check_config() callback, the resizing logic can fetch the maximum number of endpoints used in the USB composition (can contain multiple configurations), which helps ensure that the resizing logic can fulfill the configuration(s), or return an error to the gadget layer otherwise during bind time. Signed-off-by: NWesley Cheng <wcheng@codeaurora.org> Link: https://lore.kernel.org/r/1625908395-5498-4-git-send-email-wcheng@codeaurora.orgSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 11 6月, 2021 1 次提交
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由 Greg Kroah-Hartman 提交于
There is no need to keep around the debugfs "root" directory for the dwc3 device. Instead, look it up anytime we need to find it. This will help when callers get out-of-order and we had the potential to have a "stale" pointer around for the root dentry, as has happened in the past. Tested-by: NJack Pham <jackp@codeaurora.org> Reviewed-by: NPeter Chen <peter.chen@kernel.org> Acked-by: NFelipe Balbi <balbi@kernel.org> Link: https://lore.kernel.org/r/20210609093924.3293230-1-gregkh@linuxfoundation.orgSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 10 5月, 2021 2 次提交
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由 Jack Pham 提交于
The device event corresponding to End of Periodic Frame is only found on older IP revisions (2.10a and prior, according to a cursory SNPS databook search). On revisions 2.30a and newer, including DWC3.1, the same event value and corresponding DEVTEN bit were repurposed to indicate that the link has gone into suspend state (U3 or L2/L1). EOPF events had never been enabled before in this driver, and going forward we expect current and future DWC3-based devices won't likely to be using such old DWC3 IP revisions either. Hence rather than keeping the deprecated EOPF macro names let's rename them to indicate their usage for suspend events. Acked-by: NFelipe Balbi <balbi@kernel.org> Signed-off-by: NJack Pham <jackp@codeaurora.org> Link: https://lore.kernel.org/r/20210428090111.3370-2-jackp@codeaurora.orgSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Thinh Nguyen 提交于
Add missing documentation for struct dwc3_hwparams new field hwparams9 to avoid kernel doc build warning. Fixes: 16710380 ("usb: dwc3: Capture new capability register GHWPARAMS9") Reported-by: NStephen Rothwell <sfr@canb.auug.org.au> Acked-by: NFelipe Balbi <balbi@kernel.org> Signed-off-by: NThinh Nguyen <Thinh.Nguyen@synopsys.com> Link: https://lore.kernel.org/r/f4c491f7614e623755fafe640b7e690e7c5634e2.1619471127.git.Thinh.Nguyen@synopsys.comSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 23 4月, 2021 2 次提交
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由 Thinh Nguyen 提交于
DWC_usb32 IP introduces a new behavior when handling NoStream event for IN endpoints. If the controller is capable of DEV_TXF_FLUSH_BYPASS, then the driver does not need to force to restart stream for IN endpoints. The controller will generate ERDY and restart the stream periodically. Acked-by: NFelipe Balbi <balbi@kernel.org> Signed-off-by: NThinh Nguyen <Thinh.Nguyen@synopsys.com> Link: https://lore.kernel.org/r/65c3070c666cd6b8beeee62d7f8e3e704ebf2d32.1619134559.git.Thinh.Nguyen@synopsys.comSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Thinh Nguyen 提交于
DWC_usb32 introduces a new HW capability register GHWPARAMS9. Capture this in the dwc->hwparams.hwparams9 field. Acked-by: NFelipe Balbi <balbi@kernel.org> Signed-off-by: NThinh Nguyen <Thinh.Nguyen@synopsys.com> Link: https://lore.kernel.org/r/f76cc4a9c8c4ab325f5babe03c57b039166360b0.1619134559.git.Thinh.Nguyen@synopsys.comSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 22 4月, 2021 1 次提交
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由 Yu Chen 提交于
From: John Stultz <john.stultz@linaro.org> According to the programming guide, to switch mode for DRD controller, the driver needs to do the following. To switch from device to host: 1. Reset controller with GCTL.CoreSoftReset 2. Set GCTL.PrtCapDir(host mode) 3. Reset the host with USBCMD.HCRESET 4. Then follow up with the initializing host registers sequence To switch from host to device: 1. Reset controller with GCTL.CoreSoftReset 2. Set GCTL.PrtCapDir(device mode) 3. Reset the device with DCTL.CSftRst 4. Then follow up with the initializing registers sequence Currently we're missing step 1) to do GCTL.CoreSoftReset and step 3) of switching from host to device. John Stult reported a lockup issue seen with HiKey960 platform without these steps[1]. Similar issue is observed with Ferry's testing platform[2]. So, apply the required steps along with some fixes to Yu Chen's and John Stultz's version. The main fixes to their versions are the missing wait for clocks synchronization before clearing GCTL.CoreSoftReset and only apply DCTL.CSftRst when switching from host to device. [1] https://lore.kernel.org/linux-usb/20210108015115.27920-1-john.stultz@linaro.org/ [2] https://lore.kernel.org/linux-usb/0ba7a6ba-e6a7-9cd4-0695-64fc927e01f1@gmail.com/ Fixes: 41ce1456 ("usb: dwc3: core: make dwc3_set_mode() work properly") Cc: Andy Shevchenko <andy.shevchenko@gmail.com> Cc: Ferry Toth <fntoth@gmail.com> Cc: Wesley Cheng <wcheng@codeaurora.org> Cc: <stable@vger.kernel.org> Tested-by: NJohn Stultz <john.stultz@linaro.org> Tested-by: NWesley Cheng <wcheng@codeaurora.org> Signed-off-by: NYu Chen <chenyu56@huawei.com> Signed-off-by: NJohn Stultz <john.stultz@linaro.org> Signed-off-by: NThinh Nguyen <Thinh.Nguyen@synopsys.com> Link: https://lore.kernel.org/r/374440f8dcd4f06c02c2caf4b1efde86774e02d9.1618521663.git.Thinh.Nguyen@synopsys.comSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 14 4月, 2021 2 次提交
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由 Thinh Nguyen 提交于
If the device doesn't support LPM, make sure to disable the LPM capability and don't advertise to the host that it supports it. Acked-by: NFelipe Balbi <balbi@kernel.org> Signed-off-by: NThinh Nguyen <Thinh.Nguyen@synopsys.com> Link: https://lore.kernel.org/r/9e68527ff932b1646f92a7593d4092a903754666.1618366071.git.Thinh.Nguyen@synopsys.comSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Thinh Nguyen 提交于
Currently the controller handles single stream only. So, Ignore Packet Pending bit for stream selection and don't search for another stream if the host sends Data Packet with PP=0 (for OUT direction) or ACK with NumP=0 and PP=0 (for IN direction). This slightly improves the stream performance. Acked-by: NFelipe Balbi <balbi@kernel.org> Signed-off-by: NThinh Nguyen <Thinh.Nguyen@synopsys.com> Link: https://lore.kernel.org/r/097ba9e104c143f7ba0195ebff29390ec3043692.1618282705.git.Thinh.Nguyen@synopsys.comSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 02 4月, 2021 1 次提交
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由 Ray Chi 提交于
Currently, when dwc3 handles request cancelled, dwc3 just returns -ECONNRESET for all requests. It will cause USB function drivers can't know if the requests are cancelled by other reasons. This patch will replace DWC3_REQUEST_STATUS_CANCELLED with the reasons below. - DWC3_REQUEST_STATUS_DISCONNECTED - DWC3_REQUEST_STATUS_DEQUEUED - DWC3_REQUEST_STATUS_STALLED Reviewed-by: NThinh Nguyen <Thinh.Nguyen@synopsys.com> Signed-off-by: NRay Chi <raychi@google.com> Link: https://lore.kernel.org/r/20210327181742.1810969-1-raychi@google.comSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 28 3月, 2021 1 次提交
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由 Thinh Nguyen 提交于
Different controller IPs check different HW parameters for MDWIDTH. To help with maintainability, create a helper function to consolidate the logic in a single place. Signed-off-by: NThinh Nguyen <Thinh.Nguyen@synopsys.com> Link: https://lore.kernel.org/r/456329d36e8c188df5c234f3282595b630bf1470.1616892233.git.Thinh.Nguyen@synopsys.comSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 23 3月, 2021 1 次提交
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由 Thinh Nguyen 提交于
None of the DWC_usb3x IPs (and all their versions) supports low-speed setting in device mode. In the early days, our "Early Adopter Edition" DWC_usb3 databook shows that the controller may be configured to operate in low-speed, but it was revised on release. Let's remove this invalid speed setting to avoid any confusion. Signed-off-by: NThinh Nguyen <Thinh.Nguyen@synopsys.com> Link: https://lore.kernel.org/r/258b1c7fbb966454f4c4c2c1367508998498fc30.1615509438.git.Thinh.Nguyen@synopsys.comSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 10 3月, 2021 2 次提交
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由 Ray Chi 提交于
The new struct member was added to struct dwc3, but a documentation was missing: drivers/usb/dwc3/core.h:1273: warning: Function parameter or member 'usb_psy' not described in 'dwc3' Reported-by: NStephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: NRay Chi <raychi@google.com> Link: https://lore.kernel.org/r/20210303095802.2801733-1-raychi@google.comSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Ray Chi 提交于
Currently, VBUS draw callback does no action when the generic PHYs are used. This patch adds an additional path to control charging current through power supply interface. Signed-off-by: NRay Chi <raychi@google.com> Link: https://lore.kernel.org/r/20210222115149.3606776-2-raychi@google.comSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 06 2月, 2021 3 次提交
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由 Thinh Nguyen 提交于
Track the number of connected lanes and speed in corresponding enum usb_ssp_rate for SuperSpeed Plus capable device. Signed-off-by: NThinh Nguyen <Thinh.Nguyen@synopsys.com> Link: https://lore.kernel.org/r/2389592188d2e37a2ee45edaf04d942b19f3af82.1611106162.git.Thinh.Nguyen@synopsys.comSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Thinh Nguyen 提交于
Implement gadget ops udc_set_ssp_rate(). This allows the gadget/core driver to select SSP signaling rate and number of lanes to for DWC_usb32 controller. Signed-off-by: NThinh Nguyen <Thinh.Nguyen@synopsys.com> Link: https://lore.kernel.org/r/8998b65fddfa02cab57bfc6aa35e9f101b252068.1611106162.git.Thinh.Nguyen@synopsys.comSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Thinh Nguyen 提交于
The DWC_usb32 controller supports dual-lane SuperSpeed Plus. Check the maximum_speed property for any limitation in the HW to initialize and validate the maximum number of lanes and speed the device will operate. Currently the controller has no visibility into the HW parameter to determine the maximum number of lanes the HW supports. If the number of lanes is not specified for SSP, then set the default rate to gen2x2 for DWC_usb32 and gen2x1 for DWC_usb31. Signed-off-by: NThinh Nguyen <Thinh.Nguyen@synopsys.com> Link: https://lore.kernel.org/r/08d43f2a99198bed84895c272340449a6d03710e.1611106162.git.Thinh.Nguyen@synopsys.comSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 14 1月, 2021 1 次提交
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由 Mauro Carvalho Chehab 提交于
This new field was added to struct dwc3_scratchpad_array, but a documentation for it was missed: ../drivers/usb/dwc3/core.h:1259: warning: Function parameter or member 'gadget_max_speed' not described in 'dwc3' Signed-off-by: NMauro Carvalho Chehab <mchehab+huawei@kernel.org> Reported-by: NStephen Rothwell <sfr@canb.auug.org.au> Acked-by: NFelipe Balbi <balbi@kernel.org> Link: https://lore.kernel.org/r/e9332e31bec9bcead2c7ced2b25462120488ca85.1610610444.git.mchehab+huawei@kernel.orgSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 04 1月, 2021 1 次提交
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由 Wesley Cheng 提交于
The USB gadget/UDC driver can restrict the DWC3 controller speed using dwc3_gadget_set_speed(). Store this setting into a variable, in order for this setting to persist across controller resets due to runtime PM. Signed-off-by: NWesley Cheng <wcheng@codeaurora.org> Link: https://lore.kernel.org/r/1609283136-22140-3-git-send-email-wcheng@codeaurora.orgSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 28 12月, 2020 1 次提交
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由 Serge Semin 提交于
In accordance with [1] the DWC_usb3 core sets the GUSB2PHYACCn.VStsDone bit when the PHY vendor control access is done and clears it when the application initiates a new transaction. The doc doesn't say anything about the GUSB2PHYACCn.VStsBsy flag serving for the same purpose. Moreover we've discovered that the VStsBsy flag can be cleared before the VStsDone bit. So using the former as a signal of the PHY control registers completion might be dangerous. Let's have the VStsDone flag utilized instead then. [1] Synopsys DesignWare Cores SuperSpeed USB 3.0 xHCI Host Controller Databook, 2.70a, December 2013, p.388 Fixes: 88bc9d19 ("usb: dwc3: add ULPI interface support") Acked-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: NSerge Semin <Sergey.Semin@baikalelectronics.ru> Link: https://lore.kernel.org/r/20201210085008.13264-2-Sergey.Semin@baikalelectronics.ru Cc: stable <stable@vger.kernel.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 28 10月, 2020 1 次提交
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由 Mauro Carvalho Chehab 提交于
There is a common comment marked, instead, with kernel-doc notation. Also, some identifiers have different names between their prototypes and the kernel-doc markup. Signed-off-by: NMauro Carvalho Chehab <mchehab+huawei@kernel.org> Acked-by: NFelipe Balbi <balbi@kernel.org> Link: https://lore.kernel.org/r/0b964be3884def04fcd20ea5c12cb90d0014871c.1603469755.git.mchehab+huawei@kernel.orgSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 02 10月, 2020 3 次提交
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由 Yu Chen 提交于
SPLIT_BOUNDARY_DISABLE should be set for DesignWare USB3 DRD Core of Hisilicon Kirin Soc when dwc3 core act as host. [mchehab: dropped a dev_dbg() as only traces are now allowwed on this driver] Signed-off-by: NYu Chen <chenyu56@huawei.com> Signed-off-by: NMauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: NFelipe Balbi <balbi@kernel.org>
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由 Peter Chen 提交于
The current code uses commit fac32347 ("usb: udc: allow adding and removing the same gadget device") as the workaround to let the gadget device is re-used, but it is not allowed from driver core point. In this commit, we allocate gadget structure dynamically, and free it at its release function. Since the gadget device's driver_data has already occupied by usb_composite_dev structure, we have to use gadget device's platform data to store dwc3 structure. Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Alan Stern <stern@rowland.harvard.edu> Reviewed-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NPeter Chen <peter.chen@nxp.com> Signed-off-by: NFelipe Balbi <balbi@kernel.org>
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由 Felipe Balbi 提交于
no functional changes Signed-off-by: NFelipe Balbi <balbi@kernel.org>
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- 24 9月, 2020 1 次提交
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由 Thinh Nguyen 提交于
According the programming guide (for all DWC3 IPs), when the driver handles ClearFeature(halt) request, it should issue CLEAR_STALL command _after_ the END_TRANSFER command completes. The END_TRANSFER command may take some time to complete. So, delay the ClearFeature(halt) request control status stage and wait for END_TRANSFER command completion interrupt. Only after END_TRANSFER command completes that the driver may issue CLEAR_STALL command. Cc: stable@vger.kernel.org Fixes: cb11ea56 ("usb: dwc3: gadget: Properly handle ClearFeature(halt)") Signed-off-by: NThinh Nguyen <thinhn@synopsys.com> Signed-off-by: NFelipe Balbi <balbi@kernel.org>
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- 15 7月, 2020 1 次提交
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由 Alexander A. Klimov 提交于
Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: NAlexander A. Klimov <grandmaster@al2klimov.de> Link: https://lore.kernel.org/r/20200711135804.19735-1-grandmaster@al2klimov.deSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 25 5月, 2020 5 次提交
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由 Thinh Nguyen 提交于
DWC_usb32 v1.00a and later can use SET_EP_PRIME command to reinitiate a stream. Use the command to handle NoStream rejection instead of ending and restarting the endpoint. Signed-off-by: NThinh Nguyen <thinhn@synopsys.com> Signed-off-by: NFelipe Balbi <balbi@kernel.org>
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由 Thinh Nguyen 提交于
Overview of stream transfer requirement: * A transfer will have a set of TRBs of the same stream ID. * A transfer is started with a stream ID in START_TRANSFER command. * A new stream will only start when the previous completes. Overview of stream events: * A "prime" from host indicates that its endpoints are active (buffers prepared and ready to receive/transmit data). The controller automatically initiates stream if it sees this. * A "NoStream" rejection event indicates that the host isn't ready. Host will put the endpoint back to idle state. Device may need to reinitiate the stream to start transfer again. * A Stream Found event means host accepted device initiated stream. Nothing needs to be done from driver. To initiate a stream, the driver will issue START_TRANSFER command with a stream ID. To reinitiate the stream, the driver must issue END_TRANSFER and restart the transfer with START_TRANSFER command with the same stream ID. This implementation handles device-initated streams (e.g. UASP driver). It also handles some hosts' quirky behavior where they only prime each endpoint once. Signed-off-by: NThinh Nguyen <thinhn@synopsys.com> Signed-off-by: NFelipe Balbi <balbi@kernel.org>
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由 Thinh Nguyen 提交于
If a transfer is in-progress, any new request should not kick off another transfer. The driver needs to wait for the current transfer to complete before starting off the next transfer. Introduce a new flag DWC3_EP_WAIT_TRANSFER_COMPLETE for this. Signed-off-by: NThinh Nguyen <thinhn@synopsys.com> Signed-off-by: NFelipe Balbi <balbi@kernel.org>
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由 Thinh Nguyen 提交于
DWC_usb32 supports MDWIDTH value larger than 255 and up to 1023. The field HWPARAMS6[9:8] stores the upper 2-bit values of the DWC_usb32's MDWIDTH. Check that parameter and properly get the MDWIDTH for DWC_usb32. Signed-off-by: NThinh Nguyen <thinhn@synopsys.com> Signed-off-by: NFelipe Balbi <balbi@kernel.org>
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由 Thinh Nguyen 提交于
Synopsys introduces a new controller DWC_usb32. It supports dual-lane and speed up to 20 Gbps, and the DWC3 driver will drive this controller. Currently the driver uses a single field dwc->revision to ID both DWC_usb3 and DWC_usb31 and their version number. This was sufficient for two IPs, but this method doesn't work with additional IPs. As a result, let's separate the dwc->revision field to 2 separate fields: ip and revision. The ip field now stores the ID of the controller's IP while the revision field stores the controller's version number. This new scheme enforces DWC3 to compare the revision within the same IP only. As a result, we must update all the revision check of the controller to check its corresponding IP. To help with this enforcement, we create a few macros to help with the common version checks: DWC3_IP_IS(IP) DWC3_VER_IS(IP, VERSION) DWC3_VER_IS_PRIOR(IP, VERSION) DWC3_VER_IS_WITHIN(IP, LOWER_VERSION, UPPER_VERSION) DWC3_VER_TYPE_IS_WITHIN(IP, VERSION, LOWER_VERSION_TYPE, UPPER_VERSION_TYPE) The DWC_usb32 controller operates using the same programming model and with very similar configurations as its previous controllers. Please note that the various IP and revision checks in this patch match the current checks for DWC_usb31 version 1.90a. Additional configurations that are unique to DWC_usb32 are applied separately. Signed-off-by: NThinh Nguyen <thinhn@synopsys.com> Signed-off-by: NFelipe Balbi <balbi@kernel.org>
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- 05 5月, 2020 1 次提交
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由 Nishad Kamdar 提交于
This patch corrects the SPDX License Identifier style in header files related to DesignWare USB3 DRD Core Support. For C header files Documentation/process/license-rules.rst mandates C-like comments (opposed to C source files where C++ style should be used). Changes made by using a script provided by Joe Perches here: https://lkml.org/lkml/2019/2/7/46. Suggested-by: NJoe Perches <joe@perches.com> Signed-off-by: NNishad Kamdar <nishadkamdar@gmail.com> Signed-off-by: NFelipe Balbi <balbi@kernel.org>
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