- 19 11月, 2009 1 次提交
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由 David Woodhouse 提交于
We should set this before calling agp_add_bridge() so that it's done before we map the scratch page too. This should probably fix the regression reported as k.o. bug #14627. Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 14 9月, 2009 1 次提交
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由 Zhenyu Wang 提交于
As early pci resume has already restored config for host bridge and graphics device, don't need to restore it again, This removes an original order hack for graphics device restore. This fixed the resume hang issue found by Alan Stern on 845G, caused by extra config restore on graphics device. Cc: Stable Team <stable@kernel.org> Cc: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: NDave Airlie <airlied@linux.ie>
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- 12 9月, 2009 1 次提交
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由 Eric Anholt 提交于
Ever since we enabled GEM, the pre-9xx chipsets (particularly 865) have had serious stability issues. Back in May a wbinvd was added to the DRM to work around much of the problem. Some failure remained -- easily visible by dragging a window around on an X -retro desktop, or by looking at bugzilla. The chipset flush was on the right track -- hitting the right amount of memory, and it appears to be the only way to flush on these chipsets, but the flush page was mapped uncached. As a result, the writes trying to clear the writeback cache ended up bypassing the cache, and not flushing anything! The wbinvd would flush out other writeback data and often cause the data we wanted to get flushed, but not always. By removing the setting of the page to UC and instead just clflushing the data we write to try to flush it, we get the desired behavior with no wbinvd. This exports clflush_cache_range(), which was laying around and happened to basically match the code I was otherwise going to copy from the DRM. Signed-off-by: NEric Anholt <eric@anholt.net> Signed-off-by: NBrice Goglin <Brice.Goglin@ens-lyon.org> Cc: stable@kernel.org
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- 09 9月, 2009 1 次提交
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由 Fabian Henze 提交于
Signed-off-by: NFabian Henze <hoacha@quantentunnel.de> [Fix reversed HB & IG ids for B43] Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: NEric Anholt <eric@anholt.net>
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- 03 9月, 2009 1 次提交
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由 Zhenyu Wang 提交于
New variant of IGDNG mobile chip has new host bridge id. [anholt: Note that this new PCI ID doesn't impact the DRM, which doesn't care about the PCI ID of the bridge] Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: NEric Anholt <eric@anholt.net>
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- 05 8月, 2009 1 次提交
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由 David Woodhouse 提交于
If DMAR is configured in but absent, we really do want to make sure that the dma mask is set appropriately. Otherwise we get mapping failures on highmem. Spotted by Zhenyu Wang. Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 03 8月, 2009 7 次提交
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由 David Woodhouse 提交于
There seems to be no reason for these -- they're a 1:1 mapping on all platforms. Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 David Woodhouse 提交于
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 David Woodhouse 提交于
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 David Woodhouse 提交于
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 David Woodhouse 提交于
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Zhenyu Wang 提交于
When graphics dma remapping engine is active, we must fill gart table with dma address from dmar engine, as now graphics device access to graphics memory must go through dma remapping table to get real physical address. Add this support to all drivers which use intel_i915_insert_entries() Signed-off-by: NZhenyu Wang <zhenyu.z.wang@intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 David Woodhouse 提交于
In commit 07613ba2 ("agp: switch AGP to use page array instead of unsigned long array") we switched the mask_memory() method to take a 'struct page *' instead of an address. This is painful, because in some cases it has to be an IOMMU-mapped virtual bus address (in fact, shouldn't it _always_ be a dma_addr_t returned from pci_map_xxx(), and we just happen to get lucky most of the time?) Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 20 6月, 2009 1 次提交
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由 Pierre Willenbrock 提交于
Otherwise, the high bits to be stuffed in the unused lower bits of the page address are lost. Signed-off-by: NPierre Willenbrock <pierre@pirsoft.de> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 19 6月, 2009 1 次提交
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由 Dave Airlie 提交于
This switches AGP to use an array of pages for tracking the pages allocated to the GART. This should enable GEM on PAE to work a lot better as we can pass highmem pages to the PAT code and it will do the right thing with them. Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 05 6月, 2009 1 次提交
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由 Zhenyu Wang 提交于
Both desktop and mobile versions are added. Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: NEric Anholt <eric@anholt.net>
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- 14 4月, 2009 1 次提交
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由 Stefan Husemann 提交于
Support the Intel 854 Chipset in fbdev. We test and use the patch on a Thomson IP1101 IPTV-Box. On the VGA-Port we get a normal signal. Here is the link to the Mambux-Project: http://www.mambux.de Cc: Keith Packard <keithp@keithp.com> Cc: Dave Airlie <airlied@linux.ie> Cc: Krzysztof Helt <krzysztof.h1@poczta.fm> Signed-off-by: NStefan Husemann <shusemann@googlemail.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 28 3月, 2009 1 次提交
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由 Shaohua Li 提交于
This is a G33-like desktop and mobile chipset. Signed-off-by: NShaohua Li <shaohua.li@intel.com> Signed-off-by: NEric Anholt <eric@anholt.net>
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- 11 3月, 2009 1 次提交
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由 Lubomir Rintel 提交于
When GTT size is equal to amount of video memory, the amount of GTT entries is computed lower than zero, which is invalid and leads to off-by-one error in intel_i915_configure() Originally posted here: http://bugzilla.kernel.org/show_bug.cgi?id=12539 http://bugzilla.redhat.com/show_bug.cgi?id=445592Signed-off-by: NLubomir Rintel <lkundrak@v3.sk> Cc: Lubomir Rintel <lkundrak@v3.sk> Cc: Dave Airlie <airlied@linux.ie> Reviewed-by: NEric Anholt <eric@anholt.net> Cc: <stable@kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 29 12月, 2008 2 次提交
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由 Eric Anholt 提交于
Signed-off-by: NEric Anholt <eric@anholt.net> Signed-off-by: NDave Airlie <airlied@linux.ie>
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由 Zhenyu Wang 提交于
Signed-off-by: NZhenyu Wang <zhenyu.z.wang@intel.com> Signed-off-by: NEric Anholt <eric@anholt.net> Signed-off-by: NDave Airlie <airlied@linux.ie>
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- 21 10月, 2008 1 次提交
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由 Dave Jones 提交于
Update assorted email addresses and related info to point to a single current, valid address. additionally - trivial CREDITS entry updates. (Not that this file means much any more) - remove arjans dead redhat.com address from powernow driver Signed-off-by: NDave Jones <davej@redhat.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 16 10月, 2008 2 次提交
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由 Keith Packard 提交于
Instead of doing a posting read after each GTT entry update, do a single one at the end of the writes. This should reduce boot time a tiny amount by avoiding a lot of extra uncached reads. Signed-off-by: NKeith Packard <keithp@keithp.com> Signed-off-by: NEric Anholt <eric@anholt.net> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Eric Anholt 提交于
On the GM45, the amount of stolen memory mapped to the GTT was underestimated, even though we had 508KB more available since the GTT doesn't take from stolen memory. On the non-GM45 G4X, we overestimated how much stolen was mapped to the GTT by 4KB, resulting in GPU page faults when that page was accessed. This update requires a corresponding update to xf86-video-intel to work correctly. Signed-off-by: NEric Anholt <eric@anholt.net> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 21 8月, 2008 2 次提交
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由 Shaohua Li 提交于
Add agp_generic_destroy_pages(), it uses new pageattr array interface API. Signed-off-by: NDave Airlie <airlied@gmail.com> Signed-off-by: NShaohua Li <shaohua.li@intel.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Shaohua Li 提交于
Add agp_generic_alloc_pages(), it uses new pageattr array interface API. Signed-off-by: NDave Airlie <airlied@gmail.com> Signed-off-by: NShaohua Li <shaohua.li@intel.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 12 8月, 2008 3 次提交
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由 Keith Packard 提交于
On my Intel chipset (965GM), the GTT is entirely erased across suspend/resume. This patch simply re-plays the current mapping at resume time to restore the table.=20 I noticed this once I started relying on persistent GTT mappings across VT switch in our GEM work -- the old X server and DRM code carefully unbind all memory from the GTT on VT switch, but GEM does not bother. I placed the list management and rewrite code in the generic layer on the assumption that it will be needed on other hardware, but I did not add the rewrite call to anything other than the Intel resume function. Keep a list of current GATT mappings. At resume time, rewrite them into the GATT. This is needed on Intel (at least) as the entire GATT is cleared across suspend/resume. [akpm@linux-foundation.org: coding-style fixes] Signed-off-by: NKeith Packard <keithp@keithp.com> Cc: Dave Jones <davej@codemonkey.org.uk> Cc: Andi Kleen <andi@firstfloor.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Bjorn Helgaas 提交于
Convert printks to use dev_printk(). Signed-off-by: NBjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Zhenyu Wang 提交于
Signed-off-by: NZhenyu Wang <zhenyu.z.wang@intel.com> Cc: Dave Airlie <airlied@linux.ie> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 20 6月, 2008 1 次提交
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由 Zhenyu Wang 提交于
Signed-off-by: NZhenyu Wang <zhenyu.z.wang@intel.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 19 6月, 2008 8 次提交
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由 Dave Airlie 提交于
Commit 62c96b9d ("agp/intel: cleanup some serious whitespace badness") didn't just fix whitespace. It also lost two lines. Noticed by Linus. No more whitespace diffs for me. Signed-off-by: NDave Airlie <airlied@redhat.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Dave Airlie 提交于
no more whitespace diffs for me. Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Dave Airlie 提交于
Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Zhenyu Wang 提交于
Signed-off-by: NZhenyu Wang <zhenyu.z.wang@intel.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Zhenyu Wang 提交于
This adds missing stolen memory size detect for IGD_GM, be sure to detect right size as current X intel driver (2.3.2) which has already worked out. Signed-off-by: NZhenyu Wang <zhenyu.z.wang@intel.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Dave Airlie 提交于
Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Joe Perches 提交于
Use boolean in AGP instead of having own TRUE/FALSE -- Signed-off-by: NJoe Perches <joe@perches.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Jan Beulich 提交于
besides it apparently being useful only in 2.6.24 (the changes in 2.6.25 really mean that it could be converted back to a single-stage mechanism), I'm seeing an issue in Xen Dom0 kernels, which is caused by the calling of gart_to_virt() in the second stage invocations of the destroy function. I think that besides this being a real issue with Xen (where unmap_page_from_agp() is not just a page table attribute change), this also is invalid from a theoretical perspective: One should not assume that gart_to_virt() is still valid after unmapping a page. So minimally (keeping the 2-stage mechanism) a patch like the one below would be needed. Jan Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 05 2月, 2008 2 次提交
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由 Dave Airlie 提交于
Signed-off-by: NDave Airlie <airlied@linux.ie>
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由 Dave Airlie 提交于
Add a new IS_I915 and also do some checkpatch whitespace cleanups. Signed-off-by: NDave Airlie <airlied@linux.ie>
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