1. 21 10月, 2008 2 次提交
  2. 20 10月, 2008 2 次提交
  3. 16 10月, 2008 2 次提交
    • M
      [PATCH] remove unused ibcs2/PER_SVR4 in SET_PERSONALITY · 0b592682
      Martin Schwidefsky 提交于
      The SET_PERSONALITY macro is always called with a second argument of 0.
      Remove the ibcs argument and the various tests to set the PER_SVR4
      personality.
      Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
      0b592682
    • S
      powerpc: fix linux-next build failure · 463baa8a
      Stephen Rothwell 提交于
      Today's linux-next build (powerpc allyesconfig) failed like this:
      
      In file included from arch/powerpc/include/asm/mmu-hash64.h:17,
                       from arch/powerpc/include/asm/mmu.h:8,
                       from arch/powerpc/include/asm/pgtable.h:8,
                       from arch/powerpc/mm/slb.c:20:
      arch/powerpc/include/asm/page.h:76: error: expected '=', ',', ';', 'asm' or '__attribute__' before 'memstart_addr'
      arch/powerpc/include/asm/page.h:77: error: expected '=', ',', ';', 'asm' or '__attribute__' before 'kernstart_addr'
      
      Caused by commit 600715dc ("generic: add
      phys_addr_t for holding physical addresses") from the tip-core tree.
      This only fails if CONFIG_RELOCATABLE is set.
      
      So include that instead of asm/types.h in asm/page.h for
      the CONFIG_RELOCATABLE case.
      Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au>
      Cc: ppc-dev <linuxppc-dev@ozlabs.org>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Jeremy Fitzhardinge <jeremy@goop.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      463baa8a
  4. 15 10月, 2008 4 次提交
  5. 14 10月, 2008 2 次提交
  6. 13 10月, 2008 1 次提交
  7. 09 10月, 2008 1 次提交
  8. 03 10月, 2008 1 次提交
  9. 01 10月, 2008 1 次提交
    • K
      powerpc/math-emu: Use kernel generic math-emu code · d2b194ed
      Kumar Gala 提交于
      The math emulation code is centered around a set of generic macros that
      provide the core of the emulation that are shared by the various
      architectures and other projects (like glibc).  Each arch implements its
      own sfp-machine.h to specific various arch specific details.
      
      For historic reasons that are now lost the powerpc math-emu code had
      its own version of the common headers.  This moves us to using the
      kernel generic version and thus getting fixes when those are updated.
      
      Also cleaned up exception/error reporting from the FP emulation functions.
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      d2b194ed
  10. 30 9月, 2008 1 次提交
  11. 25 9月, 2008 7 次提交
  12. 23 9月, 2008 1 次提交
    • S
      signals: demultiplexing SIGTRAP signal · da654b74
      Srinivasa Ds 提交于
      Currently a SIGTRAP can denote any one of below reasons.
      	- Breakpoint hit
      	- H/W debug register hit
      	- Single step
      	- Signal sent through kill() or rasie()
      
      Architectures like powerpc/parisc provides infrastructure to demultiplex
      SIGTRAP signal by passing down the information for receiving SIGTRAP through
      si_code of siginfot_t structure. Here is an attempt is generalise this
      infrastructure by extending it to x86 and x86_64 archs.
      Signed-off-by: NSrinivasa DS <srinivasa@in.ibm.com>
      Cc: Roland McGrath <roland@redhat.com>
      Cc: akpm@linux-foundation.org
      Cc: paulus@samba.org
      Cc: linuxppc-dev@ozlabs.org
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      da654b74
  13. 18 9月, 2008 1 次提交
  14. 16 9月, 2008 6 次提交
    • S
      powerpc: Separate the irq radix tree insertion and lookup · 967e012e
      Sebastien Dugue 提交于
      irq_radix_revmap() currently serves 2 purposes, irq mapping lookup
      and insertion which happen in interrupt and process context respectively.
      
      Separate the function into its 2 components, one for lookup only and one
      for insertion only.
      
      Fix the only user of the revmap tree (XICS) to use the new functions.
      
      Also, move the insertion into the radix tree of those irqs that were
      requested before it was initialized at said tree initialization.
      
      Mutual exclusion between the tree initialization and readers/writers is
      handled via a state variable (revmap_trees_allocated) set to 1 when the tree
      has been initialized and set to 2 after the already requested irqs have been
      inserted in the tree by the init path. This state is checked before any reader
      or writer access just like we used to check for tree.gfp_mask != 0 before.
      
      Finally, now that we're not any longer inserting nodes into the radix-tree
      in interrupt context, turn the GFP_ATOMIC allocations into GFP_KERNEL ones.
      Signed-off-by: NSebastien Dugue <sebastien.dugue@bull.net>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Michael Ellerman <michael@ellerman.id.au>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      967e012e
    • C
      powerpc: Use sys_pause for 32-bit pause entry point · d6c93adb
      Christoph Hellwig 提交于
      sys32_pause is a useless copy of the generic sys_pause.
      Signed-off-by: NChristoph Hellwig <hch@lst.de>
      Acked-by: NStephen Rothwell <sfr@canb.auug.org.au>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      d6c93adb
    • P
      powerpc: Make the 64-bit kernel as a position-independent executable · 549e8152
      Paul Mackerras 提交于
      This implements CONFIG_RELOCATABLE for 64-bit by making the kernel as
      a position-independent executable (PIE) when it is set.  This involves
      processing the dynamic relocations in the image in the early stages of
      booting, even if the kernel is being run at the address it is linked at,
      since the linker does not necessarily fill in words in the image for
      which there are dynamic relocations.  (In fact the linker does fill in
      such words for 64-bit executables, though not for 32-bit executables,
      so in principle we could avoid calling relocate() entirely when we're
      running a 64-bit kernel at the linked address.)
      
      The dynamic relocations are processed by a new function relocate(addr),
      where the addr parameter is the virtual address where the image will be
      run.  In fact we call it twice; once before calling prom_init, and again
      when starting the main kernel.  This means that reloc_offset() returns
      0 in prom_init (since it has been relocated to the address it is running
      at), which necessitated a few adjustments.
      
      This also changes __va and __pa to use an equivalent definition that is
      simpler.  With the relocatable kernel, PAGE_OFFSET and MEMORY_START are
      constants (for 64-bit) whereas PHYSICAL_START is a variable (and
      KERNELBASE ideally should be too, but isn't yet).
      
      With this, relocatable kernels still copy themselves down to physical
      address 0 and run there.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      549e8152
    • P
      powerpc: Use LOAD_REG_IMMEDIATE only for constants on 64-bit · e31aa453
      Paul Mackerras 提交于
      Using LOAD_REG_IMMEDIATE to get the address of kernel symbols
      generates 5 instructions where LOAD_REG_ADDR can do it in one,
      and will generate R_PPC64_ADDR16_* relocations in the output when
      we get to making the kernel as a position-independent executable,
      which we'd rather not have to handle.  This changes various bits
      of assembly code to use LOAD_REG_ADDR when we need to get the
      address of a symbol, or to use suitable position-independent code
      for cases where we can't access the TOC for various reasons, or
      if we're not running at the address we were linked at.
      
      It also cleans up a few minor things; there's no reason to save and
      restore SRR0/1 around RTAS calls, __mmu_off can get the return
      address from LR more conveniently than the caller can supply it in
      R4 (and we already assume elsewhere that EA == RA if the MMU is on
      in early boot), and enable_64b_mode was using 5 instructions where
      2 would do.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      e31aa453
    • P
      powerpc: Make it possible to move the interrupt handlers away from the kernel · 1f6a93e4
      Paul Mackerras 提交于
      This changes the way that the exception prologs transfer control to
      the handlers in 64-bit kernels with the aim of making it possible to
      have the prologs separate from the main body of the kernel.  Now,
      instead of computing the address of the handler by taking the top
      32 bits of the paca address (to get the 0xc0000000........ part) and
      ORing in something in the bottom 16 bits, we get the base address of
      the kernel by doing a load from the paca and add an offset.
      
      This also replaces an mfmsr and an ori to compute the MSR value for
      the handler with a load from the paca.  That makes it unnecessary to
      have a separate version of EXCEPTION_PROLOG_PSERIES that forces 64-bit
      mode.
      
      We can no longer use a direct branches in the exception prolog code,
      which means that the SLB miss handlers can't branch directly to
      .slb_miss_realmode any more.  Instead we have to compute the address
      and do an indirect branch.  This is conditional on CONFIG_RELOCATABLE;
      for non-relocatable kernels we use a direct branch as before.  (A later
      change will allow CONFIG_RELOCATABLE to be set on 64-bit powerpc.)
      
      Since the secondary CPUs on pSeries start execution in the first 0x100
      bytes of real memory and then have to get to wherever the kernel is,
      we can't use a direct branch to get there.  Instead this changes
      __secondary_hold_spinloop from a flag to a function pointer.  When it
      is set to a non-NULL value, the secondary CPUs jump to the function
      pointed to by that value.
      
      Finally this eliminates one code difference between 32-bit and 64-bit
      by making __secondary_hold be the text address of the secondary CPU
      spinloop rather than a function descriptor for it.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      1f6a93e4
    • M
      powerpc: Add new CPU feature: CPU_FTR_CP_USE_DCBTZ · 2a929436
      Mark Nelson 提交于
      Add a new CPU feature bit, CPU_FTR_CP_USE_DCBTZ, to be added to the
      64bit powerpc chips that benefit from having dcbt and dcbz
      instructions used in their memory copy routines.
      
      This will be used in a subsequent patch that updates copy_4K_page().
      The new bit is added to Cell, PPC970 and Power4 because they show
      better performance with the new copy_4K_page() when dcbt and dcbz
      instructions are used.
      Signed-off-by: NMark Nelson <markn@au1.ibm.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      2a929436
  15. 14 9月, 2008 1 次提交
  16. 10 9月, 2008 1 次提交
  17. 07 9月, 2008 2 次提交
  18. 03 9月, 2008 1 次提交
  19. 27 8月, 2008 1 次提交
  20. 20 8月, 2008 2 次提交