1. 31 8月, 2021 1 次提交
    • C
      Merge remote-tracking branch 'tip/sched/arm64' into for-next/core · 65266a7c
      Catalin Marinas 提交于
      * tip/sched/arm64: (785 commits)
        Documentation: arm64: describe asymmetric 32-bit support
        arm64: Remove logic to kill 32-bit tasks on 64-bit-only cores
        arm64: Hook up cmdline parameter to allow mismatched 32-bit EL0
        arm64: Advertise CPUs capable of running 32-bit applications in sysfs
        arm64: Prevent offlining first CPU with 32-bit EL0 on mismatched system
        arm64: exec: Adjust affinity for compat tasks with mismatched 32-bit EL0
        arm64: Implement task_cpu_possible_mask()
        sched: Introduce dl_task_check_affinity() to check proposed affinity
        sched: Allow task CPU affinity to be restricted on asymmetric systems
        sched: Split the guts of sched_setaffinity() into a helper function
        sched: Introduce task_struct::user_cpus_ptr to track requested affinity
        sched: Reject CPU affinity changes based on task_cpu_possible_mask()
        cpuset: Cleanup cpuset_cpus_allowed_fallback() use in select_fallback_rq()
        cpuset: Honour task_cpu_possible_mask() in guarantee_online_cpus()
        cpuset: Don't use the cpu_possible_mask as a last resort for cgroup v1
        sched: Introduce task_cpu_possible_mask() to limit fallback rq selection
        sched: Cgroup SCHED_IDLE support
        sched/topology: Skip updating masks for non-online nodes
        Linux 5.14-rc6
        lib: use PFN_PHYS() in devmem_is_allowed()
        ...
      65266a7c
  2. 26 8月, 2021 5 次提交
    • C
      Merge branch 'for-next/entry' into for-next/core · 1a7f67e6
      Catalin Marinas 提交于
      * for-next/entry:
        : More entry.S clean-ups and conversion to C.
        arm64: entry: call exit_to_user_mode() from C
        arm64: entry: move bulk of ret_to_user to C
        arm64: entry: clarify entry/exit helpers
        arm64: entry: consolidate entry/exit helpers
      1a7f67e6
    • C
      Merge branches 'for-next/mte', 'for-next/misc' and 'for-next/kselftest',... · 622909e5
      Catalin Marinas 提交于
      Merge branches 'for-next/mte', 'for-next/misc' and 'for-next/kselftest', remote-tracking branch 'arm64/for-next/perf' into for-next/core
      
      * arm64/for-next/perf:
        arm64/perf: Replace '0xf' instances with ID_AA64DFR0_PMUVER_IMP_DEF
      
      * for-next/mte:
        : Miscellaneous MTE improvements.
        arm64/cpufeature: Optionally disable MTE via command-line
        arm64: kasan: mte: remove redundant mte_report_once logic
        arm64: kasan: mte: use a constant kernel GCR_EL1 value
        arm64: avoid double ISB on kernel entry
        arm64: mte: optimize GCR_EL1 modification on kernel entry/exit
        Documentation: document the preferred tag checking mode feature
        arm64: mte: introduce a per-CPU tag checking mode preference
        arm64: move preemption disablement to prctl handlers
        arm64: mte: change ASYNC and SYNC TCF settings into bitfields
        arm64: mte: rename gcr_user_excl to mte_ctrl
        arm64: mte: avoid TFSRE0_EL1 related operations unless in async mode
      
      * for-next/misc:
        : Miscellaneous updates.
        arm64: Do not trap PMSNEVFR_EL1
        arm64: mm: fix comment typo of pud_offset_phys()
        arm64: signal32: Drop pointless call to sigdelsetmask()
        arm64/sve: Better handle failure to allocate SVE register storage
        arm64: Document the requirement for SCR_EL3.HCE
        arm64: head: avoid over-mapping in map_memory
        arm64/sve: Add a comment documenting the binutils needed for SVE asm
        arm64/sve: Add some comments for sve_save/load_state()
        arm64: replace in_irq() with in_hardirq()
        arm64: mm: Fix TLBI vs ASID rollover
        arm64: entry: Add SYM_CODE annotation for __bad_stack
        arm64: fix typo in a comment
        arm64: move the (z)install rules to arch/arm64/Makefile
        arm64/sve: Make fpsimd_bind_task_to_cpu() static
        arm64: unnecessary end 'return;' in void functions
        arm64/sme: Document boot requirements for SME
        arm64: use __func__ to get function name in pr_err
        arm64: SSBS/DIT: print SSBS and DIT bit when printing PSTATE
        arm64: cpufeature: Use defined macro instead of magic numbers
        arm64/kexec: Test page size support with new TGRAN range values
      
      * for-next/kselftest:
        : Kselftest additions for arm64.
        kselftest/arm64: signal: Add a TODO list for signal handling tests
        kselftest/arm64: signal: Add test case for SVE register state in signals
        kselftest/arm64: signal: Verify that signals can't change the SVE vector length
        kselftest/arm64: signal: Check SVE signal frame shows expected vector length
        kselftest/arm64: signal: Support signal frames with SVE register data
        kselftest/arm64: signal: Add SVE to the set of features we can check for
        kselftest/arm64: pac: Fix skipping of tests on systems without PAC
        kselftest/arm64: mte: Fix misleading output when skipping tests
        kselftest/arm64: Add a TODO list for floating point tests
        kselftest/arm64: Add tests for SVE vector configuration
        kselftest/arm64: Validate vector lengths are set in sve-probe-vls
        kselftest/arm64: Provide a helper binary and "library" for SVE RDVL
        kselftest/arm64: Ignore check_gcr_el1_cswitch binary
      622909e5
    • A
      arm64: Do not trap PMSNEVFR_EL1 · 50cb99fa
      Alexandru Elisei 提交于
      Commit 31c00d2a ("arm64: Disable fine grained traps on boot") zeroed
      the fine grained trap registers to prevent unwanted register traps from
      occuring. However, for the PMSNEVFR_EL1 register, the corresponding
      HDFG{R,W}TR_EL2.nPMSNEVFR_EL1 fields must be 1 to disable trapping. Set
      both fields to 1 if FEAT_SPEv1p2 is detected to disable read and write
      traps.
      
      Fixes: 31c00d2a ("arm64: Disable fine grained traps on boot")
      Cc: <stable@vger.kernel.org> # 5.13.x
      Signed-off-by: NAlexandru Elisei <alexandru.elisei@arm.com>
      Reviewed-by: NMark Brown <broonie@kernel.org>
      Acked-by: NMarc Zyngier <maz@kernel.org>
      Link: https://lore.kernel.org/r/20210824154523.906270-1-alexandru.elisei@arm.comSigned-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      50cb99fa
    • X
      arm64: mm: fix comment typo of pud_offset_phys() · 5845e703
      Xujun Leng 提交于
      Fix a typo in the comment of macro pud_offset_phys().
      Signed-off-by: NXujun Leng <lengxujun2007@126.com>
      Link: https://lore.kernel.org/r/20210825150526.12582-1-lengxujun2007@126.comSigned-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      5845e703
    • W
      arm64: signal32: Drop pointless call to sigdelsetmask() · 24de5838
      Will Deacon 提交于
      Commit 77097ae5 ("most of set_current_blocked() callers want
      SIGKILL/SIGSTOP removed from set") extended set_current_blocked() to
      remove SIGKILL and SIGSTOP from the new signal set and updated all
      callers accordingly.
      
      Unfortunately, this collided with the merge of the arm64 architecture,
      which duly removes these signals when restoring the compat sigframe, as
      this was what was previously done by arch/arm/.
      
      Remove the redundant call to sigdelsetmask() from
      compat_restore_sigframe().
      Reported-by: NAl Viro <viro@zeniv.linux.org.uk>
      Signed-off-by: NWill Deacon <will@kernel.org>
      Link: https://lore.kernel.org/r/20210825093911.24493-1-will@kernel.orgSigned-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      24de5838
  3. 24 8月, 2021 5 次提交
  4. 23 8月, 2021 6 次提交
  5. 21 8月, 2021 1 次提交
  6. 20 8月, 2021 21 次提交
  7. 16 8月, 2021 1 次提交