1. 20 10月, 2010 2 次提交
  2. 02 10月, 2010 1 次提交
    • N
      ARM: do not define VMALLOC_END relative to PAGE_OFFSET · 7c63984b
      Nicolas Pitre 提交于
      VMALLOC_END is supposed to be an absolute value, while PAGE_OFFSET may
      vary depending on the selected user:kernel memory split mode through
      CONFIG_VMSPLIT_*.  In fact, the goal of moving PAGE_OFFSET down is to
      accommodate more directly addressed RAM by the kernel below the vmalloc
      area, and having VMALLOC_END move along PAGE_OFFSET is rather against
      the very reason why PAGE_OFFSET can be moved in the first place.
      Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
      7c63984b
  3. 16 8月, 2010 5 次提交
    • K
      OMAP3: PM: ensure IO wakeups are properly disabled · 58a5559e
      Kevin Hilman 提交于
      Commit 5a5f561e (convert OMAP3 PRCM macros to the _SHIFT/_MASK suffixes)
      mistakenly removed the check for PER when disabling the IO chain.
      
      During idle, if the PER powerdomain transitions into a lower state
      and CORE does not, the IO pad wakeups are not being disabled in
      the idle path after they are enabled. This can happen with the
      lower C-states when using CPUidle for example.
      
      This patch ensures that the check for disabling IO wakeups also checks
      for PER transitions, matching the check done to enable IO wakeups.
      
      Found when debugging PM/CPUidle related problems reported by Ameya
      Palande <ameya.palande@nokia.com>.  Problems were triggered
      particularily on boards with UART2 consoles (n900, Overo) since UART2
      is in the PER powerdomain.
      
      Tested on l-o master (omap3_defonfig + CONFIG_CPU_IDLE=y) as well
      as with current PM branch.  Boards tested: n900, Overo, omap3evm.
      
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Ameya Palande <ameya.palande@nokia.com>
      Tested-by: NJarkko Nikula <jhnikula@gmail.com>
      Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
      [tony@atomide.com: updated description to clarify the transistion]
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      58a5559e
    • T
      omap: Use CONFIG_SMP for test_for_ipi and test_for_ltirq · c45bd374
      Tony Lindgren 提交于
      Otherwise we get the following error when enabling CONFIG_SMP
      for omap3_defconfig:
      
      arch/arm/kernel/entry-armv.S: Assembler messages:
      arch/arm/kernel/entry-armv.S:48: Error: bad instruction `test_for_ipi r0,r6,r5,lr'
      arch/arm/kernel/entry-armv.S:48: Error: bad instruction `test_for_ltirq r0,r6,r5,lr'
      arch/arm/kernel/entry-armv.S:48: Error: bad instruction `test_for_ipi r0,r6,r5,lr'
      arch/arm/kernel/entry-armv.S:48: Error: bad instruction `test_for_ltirq r0,r6,r5,lr'
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      c45bd374
    • T
      omap: Fix sev instruction usage for multi-omap · a4192d32
      Tony Lindgren 提交于
      Otherwise we get the following error with omap3_defconfig and CONFIG_SMP:
      
      Error: selected processor does not support `sev'
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      a4192d32
    • S
      OMAP3: Fix a cpu type check problem · 8098bb0d
      stanley.miao 提交于
      cpu_is_omap3517() and cpu_is_omap3505() are the subgroups of cpu_is_omap34xx(),
      so we should check cpu_is_omap3517() and cpu_is_omap3505() first, then check
      cpu_is_omap34xx().
      
      Otherwise, All AM35XX (Sitara) clocks do not get registered and device drivers
      (ti_hecc, etc...) that depend on those clocks are failing to get the clock and
      end up with non working device.
      Signed-off-by: NStanley.Miao <stanley.miao@windriver.com>
      Tested-by: NIgor Grinberg <grinberg@compulab.co.il>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      8098bb0d
    • N
      omap3: id: fix 3630 rev detection · 77c0870c
      Nishanth Menon 提交于
      Wrong placement of break causes all revisions of 3630 to be
      detected as 3630 es1.2, we need to break main loop if we have
      an identified chip, default falls through as in the rest of the
      switches in this function.
      
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Sanjeev Premi <premi@ti.com>
      Cc: Kevin Hilman <khilman@deeprootsystems.com>
      Cc: Manjunath K <manjugk@ti.com>
      Cc: Anand Gadiyar <gadiyar@ti.com>
      Cc: Felipe Balbi <felipe.balbi@nokia.com>
      Signed-off-by: NNishanth Menon <nm@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      77c0870c
  4. 11 8月, 2010 1 次提交
  5. 05 8月, 2010 1 次提交
  6. 04 8月, 2010 16 次提交
  7. 03 8月, 2010 1 次提交
  8. 02 8月, 2010 13 次提交