With arg 1 BACO reset, it will try to reload the SMU FW after reset.
This might failed if driver already in a pending reset status during probe period.
Arg 0 reset will bring  asic back to a clean state and driver will re-init
everythign including SMU FW
Signed-off-by: Nshaoyunl <shaoyun.liu@amd.com>
Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

SMU internal might need to check this pending_reset setting to decide the reset method
Signed-off-by: Nshaoyunl <shaoyun.liu@amd.com>
Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This is to fix the case where it only enable the light SMU
on normal device init. This feature actually need to be enabled after ASIC
been reset as well.
Signed-off-by: Nshaoyunl <shaoyun.liu@amd.com>
Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
vblank_workqueue is never released.

[How]
Free it upon dm finish.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NQingqing Zhuo <qingqing.zhuo@amd.com>
Reviewed-by: NNicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: NSolomon Chiu <solomon.chiu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
When driver disabled, we driver force the YCbCr420 to RGB,
which means some register will be changed, such as
RDPCS_PHY_DP_MPLLB_TX_CLK_DIV changed from 1 to 0
When driver re-enabled, OS will Set Mode YCbCr420 again,
which means the register RDPCS_PHY_DP_MPLLB_TX_CLK_DIV
should to be 1 again, but dmub fw can’t update the
register to 1 due to the mpll is not off

[How]
Adds an interface to disable accelerated mode bit,
which allows DM to decide to call during driver
disable/unload scenarios.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NYao Wang1 <Yao.Wang1@amd.com>
Reviewed-by: NAnthony Koo <Anthony.Koo@amd.com>
Acked-by: NSolomon Chiu <solomon.chiu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

SOC needs to be updated to the WM set A values before validation
happens.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: NEric Bernstein <Eric.Bernstein@amd.com>
Acked-by: NSolomon Chiu <solomon.chiu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Incorrect variable used, missing initialization during validation.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: NEric Bernstein <Eric.Bernstein@amd.com>
Acked-by: NSolomon Chiu <solomon.chiu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This DC patchset brings improvements in multiple areas. In summary, we
highlight:

* Add debug out when viewport too small
* use max lb for latency hiding
* System black screen hangs on driver load
* Fix UBSAN warning for not a valid value for type '_Bool'
* Fix for outbox1 ring buffer typecasting issue
* Bypass sink detect when there are no eDPs connected
* Increase precision for bpp in DSC calculations
* Add changes for dsc bpp in 16ths and unify bw calculations
* Correct algorithm for reversed gamma
* Remove MPC gamut remap logic for DCN30
* Fix typo for helpers function name
* Fix secure display lock problems
* Fix no previous prototype warning
* Separate caps for maximum RGB and YUV plane counts
* Add debugfs to control DMUB trace buffer events
* [FW Promotion] Release 0.0.56
* DCHUB underflow counter increasing in some scenarios
* fix dml prefetch validation
* fix dcn3+ bw validation soc param update sequence
* add a func to disable accelerated mode
* Fix potential memory leak
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NAric Cyr <aric.cyr@amd.com>
Acked-by: NSolomon Chiu <solomon.chiu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
When unplugging a display, the underflow counter can be seen to
increase because PSTATE switch is allowed even when some planes are not
blanked.

[How]
Check that all planes are not active instead of all streams before
allowing PSTATE change.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NAric Cyr <aric.cyr@amd.com>
Acked-by: NSolomon Chiu <solomon.chiu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

More updates to the comments to better describe the function of
different cmds and parameters in the dmub interface.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NAnthony Koo <Anthony.Koo@amd.com>
Reviewed-by: NAric Cyr <Aric.Cyr@amd.com>
Acked-by: NSolomon Chiu <solomon.chiu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
We want to have a debugfs interface to enable or disable DMCUB
trace buffer events.

[How]
Add debugfs interface to enable or disable trace buffer events.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NLeo (Hanghong) Ma <hanghong.ma@amd.com>
Reviewed-by: NHarry Wentland <Harry.Wentland@amd.com>
Acked-by: NSolomon Chiu <solomon.chiu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Not all ASICs have same plane capabilities so need to split them
out for proper support handling.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NAtufa Khan <Atufa.Khan@amd.com>
Reviewed-by: NAric Cyr <Aric.Cyr@amd.com>
Acked-by: NSolomon Chiu <solomon.chiu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
Received compiling warning:

All warnings (new ones prefixed by >>):

>> drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:5574:5:
warning: no previous prototype for 'amdgpu_dm_crtc_late_register'
[-Wmissing-prototypes]
    5574 | int amdgpu_dm_crtc_late_register(struct drm_crtc *crtc)
         |     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c: In
function 'dm_update_mst_vcpi_slots_for_dsc':
   drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:6405:46:
warning: variable 'old_con_state' set but not used
[-Wunused-but-set-variable]
    6405 |  struct drm_connector_state *new_con_state, *old_con_state;
         |                                              ^~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c: In
function 'amdgpu_dm_commit_cursors':
   drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:8006:44:
warning: variable 'new_plane_state' set but not used
[-Wunused-but-set-variable]
    8006 |  struct drm_plane_state *old_plane_state, *new_plane_state;
         |                                            ^~~~~~~~~~~~~~~

vim +/amdgpu_dm_crtc_late_register +5574
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c

  5572
  5573  #ifdef CONFIG_DRM_AMD_SECURE_DISPLAY
> 5574  int amdgpu_dm_crtc_late_register(struct drm_crtc *crtc)
  5575  {
  5576          crtc_debugfs_init(crtc);
  5577
  5578          return 0;
  5579  }
  5580  #endif
  5581

[How]
Fix it with declaration as "static"
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reported-by: Nkernel test robot <lkp@intel.com>
Signed-off-by: NWayne Lin <Wayne.Lin@amd.com>
Reviewed-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: NSolomon Chiu <solomon.chiu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
Find out few locks problems while doing secure display. They are
following few parts:

1. crc_rd_work_lock in amdgpu_dm_crtc_handle_crc_window_irq() should
also use spin_lock_irqsave instead of spin_lock_irq.

2. In crc_win_update_set(), crc_rd_work_lock should be grabbed after
obtaining lock event_lock. Otherwise, will cause deadlock by conflicting
the lock order in amdgpu_dm_crtc_handle_crc_window_irq()

3. flush_work() in crc_win_update_set() is no need and will cause
deadlock since amdgpu_dm_crtc_notify_ta_to_read() also tries to grab
lock crc_rd_work_lock.

[How]
Fix above problems.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NWayne Lin <Wayne.Lin@amd.com>
Reviewed-by: NSolomon Chiu <Solomon.Chiu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[why]
Word "helper" was misspelled as "helpes" in
dm_helpes_dmub_outbox0_interrupt_control function.

[how]
Fix the spelling.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NLeo (Hanghong) Ma <hanghong.ma@amd.com>
Reviewed-by: NYongqiang Sun <yongqiang.sun@amd.com>
Acked-by: NSolomon Chiu <solomon.chiu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why?]
Should only reroute gamut remap to mpc unless 3D LUT is not used and all
planes are using the same src->dest.

[How?]
Remove DCN30 specific logic for rerouting gamut remap to mpc.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NDillon Varone <dillon.varone@amd.com>
Reviewed-by: NKrunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: NAric Cyr <Aric.Cyr@amd.com>
Acked-by: NSolomon Chiu <solomon.chiu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
DCN30 needs to correctly program reversed gamma curve, which DCN20
already has.
Also needs to fix a bug that 252-255 values are clipped.

[How]
Apply two fixes into DCN30.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NCalvin Hou <Calvin.Hou@amd.com>
Reviewed-by: NJun Lei <Jun.Lei@amd.com>
Reviewed-by: NKrunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: NSolomon Chiu <solomon.chiu@amd.com>
Acked-by: NVladimir Stempen <Vladimir.Stempen@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why?]
Some code still expected bpp to be used in whole bits, not 16ths.  dsc.c uses
redundant function now found in dc to calculate stream bandwidth from timing.

[How?]
Fix code to work with 16ths instead of whole bits for dsc bpp.
Refactor get_dsc_bandwidth to accept inputs in 16ths of a bit.
Use dc function to calculate bandwidth from timing, and make dsc bw calculation
a part of dsc.c.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NDillon Varone <dillon.varone@amd.com>
Reviewed-by: NWenjing Liu <Wenjing.Liu@amd.com>
Acked-by: NSolomon Chiu <solomon.chiu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why?]
Many DSC variables and related functions use whole bits for bpp.

[How?]
Change variables and related functions to use 16ths of a bit for bpp.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NDillon Varone <dillon.varone@amd.com>
Signed-off-by: NJun Lei <jun.lei@amd.com>
Reviewed-by: NWenjing Liu <Wenjing.Liu@amd.com>
Acked-by: NSolomon Chiu <solomon.chiu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[How & Why]
Check DC config to determine if there are any eDPs connected. If there
are no eDPs connected, bypass sink detect when querying eDP presence.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NJake Wang <haonan.wang2@amd.com>
Reviewed-by: NNicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: NSolomon Chiu <solomon.chiu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[WHY]
Compiler warning "pointer to integer of different size" reported on
outbox1 ring buffer address typecasting.
Reported-by: Nkernel test robot <lkp@intel.com>

[HOW]
Fixed the issue by typecasting with character pointer.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NMeenakshikumar Somasundaram <meenakshikumar.somasundaram@amd.com>
Reviewed-by: NJun Lei <Jun.Lei@amd.com>
Acked-by: NSolomon Chiu <solomon.chiu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
dc_cursor_position do not initialise position.translate_by_source when
crtc or plane->state->fb is NULL. UBSAN caught this error in
dce110_set_cursor_position, as the value was garbage.

[How]
Initialise dc_cursor_position structure elements to 0 in handle_cursor_update
before calling get_cursor_position.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1471Reported-by: NLyude Paul <lyude@redhat.com>
Signed-off-by: NAnson Jacob <Anson.Jacob@amd.com>
Reviewed-by: NAurabindo Jayamohanan Pillai <Aurabindo.Pillai@amd.com>
Acked-by: NSolomon Chiu <solomon.chiu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This reverts commit dbc43d5f
as it causes crash on driver load in some scenarios.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NAric Cyr <aric.cyr@amd.com>
Reviewed-by: NMartin Leung <Martin.Leung@amd.com>
Acked-by: NSolomon Chiu <solomon.chiu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Enable max memory lb config to improve stutter efficiency and
latency hiding. Also increase max number of lb lines to be
used by dml since experiments have shown that there isnt a hard max
beyond what fits in lb.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: NEric Bernstein <Eric.Bernstein@amd.com>
Acked-by: NSolomon Chiu <solomon.chiu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[why] It helps debugging display setup issues
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NNikola Cornij <nikola.cornij@amd.com>
Reviewed-by: NNicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: NSolomon Chiu <solomon.chiu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Bumping DC version for DMU FW fix
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NAric Cyr <aric.cyr@amd.com>
Acked-by: NSolomon Chiu <solomon.chiu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Workload number mapped to the correct one.
This issue is only on vega10.
Signed-off-by: NKenneth Feng <kenneth.feng@amd.com>
Reviewed-by: NKevin Wang <kevin1.wang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Some ASICs do not have GOP driver to copy vbios image into
VFCT table. And it will go to next check.
Signed-off-by: NFeifei Xu <Feifei.Xu@amd.com>
Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

It was leftover from radeon where it was required for some
specific old hardware.  It hasn't been required for ages
and the driver already falls back to MMIO when legacy IO
is not available.  Legacy IO also seems to be problematic on
on some thunderbolt devices.  Drop it.
Reviewed-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
Cc: Nicholas Johnson <nicholas.johnson-opensource@outlook.com.au>

Fix the following coccicheck warnings:

./drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c:358:69-74: WARNING:
conversion to bool not needed here.
Reported-by: NAbaci Robot <abaci@linux.alibaba.com>
Signed-off-by: NJiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

s/"an minimum"/"a minimum"/
s/"an maxmum"/"a maximum"/
Reviewed-by: NHuang Rui <ray.huang@amd.com>
Acked-by: NRandy Dunlap <rdunlap@infradead.org>
Signed-off-by: NBhaskar Chowdhury <unixbhaskar@gmail.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

The variable result is being initialized with a value that is
never read and it is being updated later with a new value.  The
initialization is redundant and can be removed.

Addresses-Coverity: ("Unused value")
Signed-off-by: NColin Ian King <colin.king@canonical.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

There is a spelling mistake in an assert message. Fix it.
Signed-off-by: NColin Ian King <colin.king@canonical.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Driver doesn't keep the default bootup power limit and expose it
to user. As requested we add it in driver.
Signed-off-by: NEric Huang <jinhuieric.huang@amd.com>
Reviewed-by: NEvan Quan <evan.quan@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Fixes the following memory leak in dc_link_construct():

unreferenced object 0xffffa03e81471400 (size 1024):
comm "amd_module_load", pid 2486, jiffies 4294946026 (age 10.544s)
hex dump (first 32 bytes):
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
backtrace:
[<000000000bdf5c4a>] kmem_cache_alloc_trace+0x30a/0x4a0
[<00000000e7c59f0e>] link_create+0xce/0xac0 [amdgpu]
[<000000002fb6c072>] dc_create+0x370/0x720 [amdgpu]
[<000000000094d1f3>] amdgpu_dm_init+0x18e/0x17a0 [amdgpu]
[<00000000bec048fd>] dm_hw_init+0x12/0x20 [amdgpu]
[<00000000a2bb7cf6>] amdgpu_device_init+0x1463/0x1e60 [amdgpu]
[<0000000032d3bb13>] amdgpu_driver_load_kms+0x5b/0x330 [amdgpu]
[<00000000a27834f9>] amdgpu_pci_probe+0x192/0x280 [amdgpu]
[<00000000fec7d291>] local_pci_probe+0x47/0xa0
[<0000000055dbbfa7>] pci_device_probe+0xe3/0x180
[<00000000815da970>] really_probe+0x1c4/0x4e0
[<00000000b4b6974b>] driver_probe_device+0x62/0x150
[<000000000f9ecc61>] device_driver_attach+0x58/0x60
[<000000000f65c843>] __driver_attach+0xd6/0x150
[<000000002f5e3683>] bus_for_each_dev+0x6a/0xc0
[<00000000a1cfc897>] driver_attach+0x1e/0x20

Fixes: 3a00c042 ("drm/amd/display/dc/core/dc_link: Move some local data from the stack to the heap")
Signed-off-by: NVictor Lu <victorchengchi.lu@amd.com>
Reviewed-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Interrupts on are non-reentrant on linux. This is just an ancient
leftover from radeon where irq processing was kicked of from different
places.
Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

memalloc_nofs_save/restore are no longer sufficient to prevent recursive
lock warnings when holding locks that can be taken in MMU notifiers. Use
memalloc_noreclaim_save/restore instead.

Fixes: f920e413 ("mm: track mmu notifiers in fs_reclaim_acquire/release")
Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

    cause:
	It is necessary to send ras disable command to ras-ta during gfx
	block ras later init, because the ras capability is disable read
	from vbios for vega20 gaming, but the ras context is released
	during ras init process, this will cause send ras disable command
	to ras-to failed.
    how:
	Delay releasing ras context, the ras context
	will be released after gfx block later init done.

Changed from V1:
    move release_ras_context into ras_resume

Changed from V2:
    check BIT(UMC) is more reasonable before access eeprom table
Signed-off-by: NStanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[why]
 the dcn301_calculate_wm_and_dl() calculation exposed a issue
 - switch to dcn30 version for now.
 still need to follow up with dcn301 watermark updates version.

v2: squash in warning fix
Signed-off-by: NCharles Sun <charles.sun@amd.com>
Reviewed-by: NNikola Cornij <nikola.cornij@amd.com>
Acked-by: NCharles Sun <charles.sun@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

arcturus and sienna_cichlid share the same version
of umc_info interface (umc_info v33). arcturus uses
umc_config to indicate ECC capability, while
sienna_cichlid uses umc_config1 to indicate ECC
capability. driver needs to check either umc_config
or umc_config1 to decide ECC capability for ASICs
that use umc_info v33 interface.
Signed-off-by: NHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: NFrank Min <Frank.Min@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>