- 20 11月, 2014 1 次提交
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由 Boris BREZILLON 提交于
read_page_raw and write_page_raw method description is not clear enough. It clearly specifies that ECC correction should not be involved but does not talk about specific layout (by layout I mean where in-band and out-of-band data are stored on the NAND media) used by NAND/ECC controllers. Those specific layouts might impact MTD users and thus should be hidden (as already done in the standard NAND_ECC_HW_SYNDROME implementation). Clearly state this constraint in the nand_ecc_ctrl struct documentation. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 05 11月, 2014 2 次提交
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由 Brian Norris 提交于
We don't need to expose a 'wait-till-ready' interface to drivers. Status register polling should be handled by the core spi-nor.c library, and as of now, I see no need to provide a special driver-specific hook for it. Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Reviewed-by: NMarek Vasut <marex@denx.de>
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由 Brian Norris 提交于
spi-nor.c should be taking care of these now. Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Reviewed-by: NMarek Vasut <marex@denx.de>
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- 22 10月, 2014 2 次提交
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由 Ben Hutchings 提交于
There is currently no useful way to override the default implementation of this operation. The returned struct spi_device_id must have a pointer to struct flash_info in its private data, but this structure is defined inside spi-nor. Signed-off-by: NBen Hutchings <ben@decadent.org.uk> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Ben Hutchings 提交于
m25p80's device ID table is now spi_nor_ids, defined in spi-nor. The MODULE_DEVICE_TABLE() macro doesn't work with extern definitions, but its use was also removed at the same time. Now if m25p80 is built as a module it doesn't get the necessary aliases to be loaded automatically. A clean solution to this will involve defining the list of device IDs in spi-nor.h and removing struct spi_device_id from the spi-nor API, but this is quite a large change. As a quick fix suitable for stable, copy the device IDs back into m25p80. Fixes: 03e296f6 ("mtd: m25p80: use the SPI nor framework") Cc: <stable@vger.kernel.org> # 3.16.x: 32f1b7c8: mtd: move support for struct flash_platform_data into m25p80 Cc: <stable@vger.kernel.org> # 3.16.x: 90e55b38: mtd: m25p80: get rid of spi_get_device_id Cc: <stable@vger.kernel.org> # 3.16.x: 70f3ce05: mtd: spi-nor: make spi_nor_scan() take a chip type name, not spi_device_id Cc: <stable@vger.kernel.org> # 3.16.x Signed-off-by: NBen Hutchings <ben@decadent.org.uk> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 18 10月, 2014 1 次提交
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由 Ben Hutchings 提交于
Drivers currently call spi_nor_match_id() and then spi_nor_scan(). This adds a dependency on struct spi_device_id which we want to avoid. Make spi_nor_scan() do it for them. Signed-off-by: NBen Hutchings <ben@decadent.org.uk> Signed-off-by: NRafał Miłecki <zajec5@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 23 9月, 2014 1 次提交
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由 Boris BREZILLON 提交于
Add an onfi_timing_mode_default field to nand_chip and nand_flash_dev in order to support NAND timings definition for non-ONFI NAND. NAND that support better timings mode than the default one have to define a new entry in the nand_ids table. The default timing mode should be deduced from timings description from the datasheet and the ONFI specification (www.onfi.org/~/media/ONFI/specs/onfi_3_1_spec.pdf, chapter 4.15 "Timing Parameters"). You should choose the closest mode that fit the timings requirements of your NAND chip. Signed-off-by: NBoris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 20 8月, 2014 3 次提交
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由 Boris BREZILLON 提交于
Change the comment type (from /** to /*) to prevent DocBook from complaining about missing description for nand_sdr_timings fields. There is currently no need in documenting those fields because they are fully described in the ONFI specification (which is pointed out in the comment). Signed-off-by: NBoris BREZILLON <boris.brezillon@free-electrons.com> Reported-by: NRandy Dunlap <rdunlap@infradead.org> Acked-by: NRandy Dunlap <rdunlap@infradead.org> Tested-by: NRandy Dunlap <rdunlap@infradead.org> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Brian Norris 提交于
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Randy Dunlap 提交于
Fix kernel-doc warning in <linux/mtd/nand.h>: Warning(..//include/linux/mtd/nand.h:795): No description found for parameter 'ecc' Signed-off-by: NRandy Dunlap <rdunlap@infradead.org> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Brian Norris <computersforpeace@gmail.com> Cc: linux-mtd@lists.infradead.org Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 22 7月, 2014 2 次提交
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由 Boris BREZILLON 提交于
Add a converter to retrieve NAND timings from an ONFI NAND timing mode. At the moment, only SDR NAND timings are supported. Signed-off-by: NBoris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Boris BREZILLON 提交于
Define a struct containing the standard NAND timings as described in NAND datasheets. Signed-off-by: NBoris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 12 7月, 2014 1 次提交
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由 grmoore@altera.com 提交于
Some new Micron flash chips require reading the flag status register to determine when operations have completed. Furthermore, chips with multi-die stacks of the 65nm 256Mb QSPI also require reading the status register before reading the flag status register. This patch adds support for the flag status register in the n25q512ax3 and n25q00 Micron QSPI flash chips. Signed-off-by: NGraham Moore <grmoore@altera.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 09 7月, 2014 1 次提交
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由 Ezequiel Garcia 提交于
In addition to mtd_block_isbad(), which checks if a block is bad or reserved, it's needed to check if a block is reserved only (but not bad). This commit adds an MTD interface for it, in a similar fashion to mtd_block_isbad(). While here, fix mtd_block_isbad() so the out-of-bounds checking is done before the callback check. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NPekon Gupta <pekon@ti.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 28 5月, 2014 1 次提交
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由 Brian Norris 提交于
Fixes warning: In file included from drivers/mtd/lpddr/qinfo_probe.c:31:0: include/linux/mtd/pfow.h: In function ‘send_pfow_command’: include/linux/mtd/pfow.h:104:6: warning: variable ‘chipnum’ set but not used [-Wunused-but-set-variable] int chipnum; ^ Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 21 5月, 2014 1 次提交
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由 Kamal Dasu 提交于
nand_base can be passed a kmap()'d buffers from highmem by filesystems like jffs2. This results in failure to map the physical address of the DMA buffer on various contoller driver on different platforms. This change adds a chip option to use preallocated databuf as bounce buffers used in nand_do_read_ops() and nand_do_write_ops(). This allows for specific nand controller driver to set this option as needed. Signed-off-by: NKamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 10 5月, 2014 1 次提交
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由 Brian Norris 提交于
The nand_chip::erase_cmd callback previously served a dual purpose; for one, it allowed a per-flash-chip override, so that AG-AND devices could use a different erase command than other NAND. These AND devices were dropped in commit 14c65786 (mtd: nand: remove AG-AND support). On the other hand, some drivers (denali and doc-g4) need to use this sort of callback to implement controller-specific erase operations. To make the latter operation easier for some drivers (e.g., ST's new BCH NAND driver), it helps if the command dispatch and wait functions can be lumped together, rather than called separately. This patch does two things: 1. Pull the call to chip->waitfunc() into chip->erase_cmd(), and return the status from this callback 2. Rename erase_cmd() to just erase(), since this callback does a little more than just send a command Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Tested-by: NLee Jones <lee.jones@linaro.org>
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- 19 4月, 2014 1 次提交
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由 Viresh Kumar 提交于
shiraz.hashim@st.com email-id doesn't exist anymore as he has left the company. Replace ST's id with shiraz.linux.kernel@gmail.com. It also updates .mailmap file to fix address for 'git shortlog'. Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org> Cc: Shiraz Hashim <shiraz.linux.kernel@gmail.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 15 4月, 2014 8 次提交
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由 Brian Norris 提交于
serial_flash_cmds.h defines our opcodes a little differently. Let's borrow its naming, since it's borrowed from the SFDP standard, and it's more extensible. This prepares us for merging serial_flash_cmds.h and spi-nor.h opcode listing. Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Reviewed-by: NMarek Vasut <marex@denx.de> Acked-by: NHuang Shijie <b32955@freescale.com>
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由 Brian Norris 提交于
Qualify these with a better namespace, and prepare them for use in more drivers. Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Reviewed-by: NMarek Vasut <marex@denx.de> Acked-by: NHuang Shijie <b32955@freescale.com>
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由 Brian Norris 提交于
Spacing is a little non-standard here. Fix up tabs vs. spaces. Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Acked-by: NHuang Shijie <b32955@freescale.com> Reviewed-by: NMarek Vasut <marex@denx.de>
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由 Huang Shijie 提交于
Add the copyright information for spi-nor.c and spi-nor.h. Signed-off-by: NHuang Shijie <b32955@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Huang Shijie 提交于
Add the spi_nor_match_id() to find the proper spi_device_id with the NOR flash's name in the spi_nor_ids table. Signed-off-by: NHuang Shijie <b32955@freescale.com> Acked-by: NMarek Vasut <marex@denx.de> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Huang Shijie 提交于
This patch cloned most of the m25p80.c. In theory, it adds a new spi-nor layer. Before this patch, the layer is like: MTD ------------------------ m25p80 ------------------------ spi bus driver ------------------------ SPI NOR chip After this patch, the layer is like: MTD ------------------------ spi-nor ------------------------ m25p80 ------------------------ spi bus driver ------------------------ SPI NOR chip With the spi-nor controller driver(Freescale Quadspi), it looks like: MTD ------------------------ spi-nor ------------------------ fsl-quadspi ------------------------ SPI NOR chip New APIs: spi_nor_scan: used to scan a spi-nor flash. Signed-off-by: NHuang Shijie <b32955@freescale.com> Acked-by: NMarek Vasut <marex@denx.de> [Brian: rebased to include additional m25p_ids[] entry] Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Huang Shijie 提交于
The spi_nor{} is cloned from the m25p{}. The spi_nor{} can be used by both the m25p80 and spi-nor controller. We also add the spi_nor_xfer_cfg{} which can be used by the two fundamental primitives: read_xfer/write_xfer. 1) the hooks for spi_nor{}: @prepare/unpreare: used to do some work before or after the read/write/erase/lock/unlock. @read_xfer/write_xfer: We can use these two hooks to code all the following hooks if the driver tries to implement them by itself. @read_reg: used to read the registers, such as read status register, read configure register. @write_reg: used to write the registers, such as write enable, erase sector. @read_id: read out the ID info. @wait_till_ready: wait till the NOR becomes ready. @read: read out the data from the NOR. @write: write data to the NOR. @erase: erase a sector of the NOR. 2) Add a new field sst_write_second for the SST NOR write. Signed-off-by: NHuang Shijie <b32955@freescale.com> Acked-by: NMarek Vasut <marex@denx.de> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Huang Shijie 提交于
This patch adds a new header :spi-nor.h, and copies all the SPI NOR commands and relative macros into this new header. This hearder can be used by the m25p80.c and other spi-nor controller, such as Freescale's Quadspi. Signed-off-by: NHuang Shijie <b32955@freescale.com> Acked-by: NMarek Vasut <marex@denx.de> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 26 3月, 2014 1 次提交
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由 David Mosberger 提交于
GET_FEATURES and SET_FEATURES also need byte-addressing on 16-bit devices. Signed-off-by: NDavid Mosberger <davidm@egauge.net> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 11 3月, 2014 9 次提交
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由 Huang Shijie 提交于
Add the "page" argument for the read_subpage hook. With this argument, the implementation of this hook could prints out more accurate information for debugging. Signed-off-by: NHuang Shijie <b32955@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Christian Riesch 提交于
Signed-off-by: NChristian Riesch <christian.riesch@omicron.at> Cc: Artem Bityutskiy <Artem.Bityutskiy@linux.intel.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Huang Shijie 提交于
This patch adds the parsing code for the JEDEC compliant NAND. Since we need the 0x40 as the column address, this patch also makes the NAND_CMD_PARAM to use the 8-bit address only. Signed-off-by: NHuang Shijie <b32955@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Huang Shijie 提交于
Add a helper to get the supported features for JEDEC compliant NAND. Also add a macro JEDEC_FEATURE_16_BIT_BUS. Signed-off-by: NHuang Shijie <b32955@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Huang Shijie 提交于
Add the jedec_version field, and add an anonymous union which contains the nand_onfi_params and nand_jedec_params. Signed-off-by: NHuang Shijie <b32955@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Huang Shijie 提交于
Create the nand_jedec_params{} and jedec_ecc_info{} according to the JESD230A (Revision of JESD230, October 2012). Signed-off-by: NHuang Shijie <b32955@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Brian Norris 提交于
The NAND command helpers tend to automatically shift the column address for x16 bus devices, since most commands expect a word address, not a byte address. The Read ID command, however, expects an 8-bit address (i.e., 0x00, 0x20, or 0x40 should not be translated to 0x00, 0x10, or 0x20). This fixes the column address for a few drivers which imitate the nand_base defaults. Note that I don't touch sh_flctl.c, since it already handles this problem slightly differently (note its comment "READID is always performed using an 8-bit bus"). I have not tested this patch, as I only have x8 parts up for testing at this point. Hopefully that can change soon... Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-By: NPekon Gupta <pekon@ti.com>
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由 Huang Shijie 提交于
There is no reference to these two macros now. Just remove them. Signed-off-by: NHuang Shijie <shijie8@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Huang Shijie 提交于
The patch converts the arrays to buffer pointers for nand_buffers{}. The cafe_nand.c is the only NAND_OWN_BUFFERS user which allocates nand_buffers{} itself. This patch disables the DMA for nand_scan_ident, and restores the DMA status after we finish the nand_scan_ident. This way, we can get page size and OOB size and use them to allocate cafe->dmabuf. Since the cafe_nand.c uses the NAND_ECC_HW_SYNDROME ECC mode, we do not allocate the buffers for @ecccalc and @ecccode. Signed-off-by: NHuang Shijie <b32955@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 21 1月, 2014 3 次提交
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由 Brian Norris 提交于
mtdram_init_device() wasn't updated along with mtd_partition.name. Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Cc: Geert Uytterhoeven <geert@linux-m68k.org>
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由 Huang Shijie 提交于
Add the Intel manufacturer Id. Tested with Intel JS29F32G08ACMD1(4096 + 224) which is ONFI 2.0 compliant nand. Signed-off-by: NHuang Shijie <b32955@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Huang Shijie 提交于
Add the manufactor ID for SanDisk. Make preparation for SanDisk SDTNRGAMA-008G. Signed-off-by: NHuang Shijie <b32955@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 15 1月, 2014 1 次提交
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由 Uwe Kleine-König 提交于
According to the Open NAND Flash Interface Specification (ONFI) Revision 3.1 "Parameters are always transferred on the lower 8-bits of the data bus." for the Get Features and Set Features commands. So using read_buf and write_buf is wrong for 16-bit wide nand chips as they use I/O[15:0]. The Get Features command is easily fixed using 4 times the read_byte callback. For Set Features implement a new overwritable callback "write_byte". Still I expect the default to work just fine for all controllers and making it overwriteable was just done for symmetry. Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> [Brian: fixed warning] Tested-by: NBrian Norris <computersforpeace@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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