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  1. 24 8月, 2013 6 次提交
  3. 21 8月, 2013 5 次提交
    • S
      powerpc/e500: Set -mcpu flag for 32-bit e500 · 847f56b0
      由 Scott Wood 提交于 
      Unlike 64-bit, we don't currently support multiplatform between e500
and non-e500, so the -mcpu is not configurable at this time.

-msoft-float is specified when testing for -mcpu=8540 because otherwise
some older toolchains will fail with "error: E500 and FPRs not
supported".
Signed-off-by: NScott Wood <scottwood@freescale.com>
      847f56b0
    • S
      powerpc/booke64: Use appropriate -mcpu · 01718ba6
      由 Scott Wood 提交于 
      By default use -mcpu=powerpc64 rather than -mtune=power7

Add options for e5500/e6500, with fallbacks for older compilers.

Hide the POWER cpu options in booke configs.
Signed-off-by: NScott Wood <scottwood@freescale.com>
      01718ba6
    • S
      powerpc/85xx: Remove -Wa,-me500 · f49596a4
      由 Scott Wood 提交于 
      This caused lwsync to be converted to sync on 64-bit (on 32-bit lwsync
is generated at runtime, and so wasn't affected).  Not using lwsync
caused a significant slowdown on certain workloads.

Setting this flag for any e500-enabled build is also not friendly to
multiplatform kernels.
Signed-off-by: NScott Wood <scottwood@freescale.com>
      f49596a4
    • S
      powerpc: Convert some mftb/mftbu into mfspr · beb2dc0a
      由 Scott Wood 提交于 
      Some CPUs (such as e500v1/v2) don't implement mftb and will take a
trap.  mfspr should work on everything that has a timebase, and is the
preferred instruction according to ISA v2.06.

Currently we get away with mftb on 85xx because the assembler converts
it to mfspr due to -Wa,-me500.  However, that flag has other effects
that are undesireable for certain targets (e.g.  lwsync is converted to
sync), and is hostile to multiplatform kernels.  Thus we would like to
stop setting it for all e500-family builds.

mftb/mftbu instances which are in 85xx code or common code are
converted.  Instances which will never run on 85xx are left alone.
Signed-off-by: NScott Wood <scottwood@freescale.com>
      beb2dc0a
    • S
      powerpc/fsl-booke: Work around erratum A-006958 · d52459ca
      由 Scott Wood 提交于 
      Erratum A-006598 says that 64-bit mftb is not atomic -- it's subject
to a similar race condition as doing mftbu/mftbl on 32-bit.  The lower
half of timebase is updated before the upper half; thus, we can share
the workaround for a similar bug on Cell.  This workaround involves
looping if the lower half of timebase is zero, thus avoiding the need
for a scratch register (other than CR0).  This workaround must be
avoided when the timebase is frozen, such as during the timebase sync
code.

This deals with kernel and vdso accesses, but other userspace accesses
will of course need to be fixed elsewhere.
Signed-off-by: NScott Wood <scottwood@freescale.com>
      d52459ca
  5. 16 8月, 2013 1 次提交
  7. 14 8月, 2013 28 次提交