- 20 10月, 2009 1 次提交
-
-
由 Leo (Hao) Chen 提交于
Signed-off-by: NLeo Hao Chen <leochen@broadcom.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
-
- 20 9月, 2009 2 次提交
-
-
由 Alessandro Rubini 提交于
Signed-off-by: NAlessandro Rubini <rubini@unipv.it> Acked-by: NAndrea Gallo <andrea.gallo@stericsson.com> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
-
由 Wan ZongShun 提交于
Add w90p910 NAND driver for w90p910 evaluation board based on w90p910,there is a K8F1G08 NAND on my board. [dwmw2: depend on MTD_PARTITIONS] Signed-off-by: NWan ZongShun <mcuos.com@gmail.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
-
- 06 6月, 2009 1 次提交
-
-
由 Vimal Singh 提交于
This driver is present in the OMAP tree, now pushing it to MTD. Original author(s): Jian Zhang <jzhang@ti.com> Signed-off-by: NVimal Singh <vimalsingh@ti.com> Cc: Jian Zhang <jzhang@ti.com> Cc: Artem Bityutskiy <dedekind@infradead.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
-
- 06 4月, 2009 1 次提交
-
-
由 Wolfgang Grandegger 提交于
Signed-off-by: NIlya Yanok <yanok@emcraft.com> Acked-by: NWolfgang Grandegger <wg@grandegger.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
-
- 21 3月, 2009 1 次提交
-
-
由 Atsushi Nemoto 提交于
This patch adds support for the integrated NAND flash controller of the TXx9 family. Once upon a time there were tx4925ndfmc and tx4938ndfmc driver. They were removed due to bitrot in 2005. This new driver is completely rewritten based on a driver in CELF patch archive. Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp> Cc: Ralf Bächle <ralf@linux-mips.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
-
- 20 3月, 2009 1 次提交
-
-
由 David Brownell 提交于
This is a device driver for the NAND flash controller found on the various DaVinci family chips. It handles up to four SoC chipselects, and some flavors of secondary chipselect (e.g. based on upper bits of the address bus) as used with some multichip packages. (Including the 2 GiB chips used on some TI devel boards.) The 1-bit ECC hardware is supported (3 bytes ECC per 512 bytes data); but not yet the newer 4-bit ECC (10 bytes ECC per 512 bytes data), as available on chips like the DM355 or OMAP-L137 and needed with the more error-prone MLC NAND chips. This is a cleaned-up version of code that's been in use for several years now; sanity checked with the new drivers/mtd/tests. Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NSudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
-
- 18 10月, 2008 1 次提交
-
-
由 Mike Rapoport 提交于
The patch adds support for NAND flashes connected to GPIOs. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NMike Rapoport <mike@compulab.co.il> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
-
- 14 10月, 2008 1 次提交
-
-
由 Yoshihiro Shimoda 提交于
Several Renesas SuperH CPU has FLCTL. The FLCTL support NAND Flash. This driver support SH7723. Signed-off-by: NYoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Acked-by: NPaul Mundt <lethal@linux-sh.org> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
-
- 03 9月, 2008 1 次提交
-
-
由 Sascha Hauer 提交于
This patch adds support for the integrated NAND flash controller of the i.MX2 and i.MX3 family. It is tested on MX27 but should work on MX3 aswell. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Acked-by: NJuergen Beisert <j.beisert@pengutronix.de> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
-
- 11 8月, 2008 1 次提交
-
-
由 Ian Molton 提交于
This patch adds support for the NAND controller commonly found in TMIO based MFDs. Signed-off-by: NIan Molton <spyro@f2s.com> Acked-By: NDavid Woodhouse <David.Woodhouse@intel.com> Signed-off-by: NSamuel Ortiz <sameo@openedhand.com>
-
- 04 8月, 2008 1 次提交
-
-
由 David Woodhouse 提交于
This was a reference board for which support never got merged upstream. Kill it off, at rmk's suggestion. Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
-
- 07 6月, 2008 1 次提交
-
-
由 Håvard Skinnemoen 提交于
The AT91 NAND driver needs just a few tiny modifications to work on AVR32 as well. Rename it atmel_nand to reflect this. Also move the ECC register definitions into drivers/mtd/nand since they are only useful to the atmel_nand driver, and get rid of the useless filename at the top of each file. Signed-off-by: NHåvard Skinnemoen <haavard.skinnemoen@atmel.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
-
- 05 6月, 2008 1 次提交
-
-
由 Adrian Bunk 提交于
Once upon a time, the MTD repository was using CVS. This patch therefore removes all usages of the no longer updated CVS keywords from the MTD code. This also includes code that printed them to the user. Signed-off-by: NAdrian Bunk <bunk@kernel.org> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
-
- 23 4月, 2008 2 次提交
-
-
由 Anton Vorontsov 提交于
This is very simple driver, NAND is connected through localbus, and User-Programmable Machine is doing various adjustments to speak NAND. No special efforts needed to do read and write cycles, though to control ALE and CLE phases, we ask UPM to generate exact pre-programmed signals on the localbus lines. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
-
由 eric miao 提交于
This is preliminary since: 1. It supports only _one_ chip select at the moment. As there is no existing platforms available using two chip selects of the NAND controller, it shall really not include code for supporting the 2nd chip select for now, as such code cannot be verified. 2. It resorts to the default and simpliest memory based badblock table 3. Only limited types of nand flash are currently supported. Most PXA3xx processors come with on-chip NAND flash dies, so there isn't much flexibility for other types of NAND. 4. The NAND controller should be configured to detect the device's ID, thus making it difficult to use nand_scan_ident() to assist the detection process (though it's not impossible) TODO: fix all the above limitations of cuz :-) Signed-off-by: Neric miao <eric.miao@marvell.com> Cc: Sergey Podstavin <spodstavin@ru.mvista.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
-
- 07 2月, 2008 1 次提交
-
-
由 Scott Wood 提交于
Signed-off-by: NNick Spence <nick.spence@freescale.com> Signed-off-by: NScott Wood <scottwood@freescale.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
-
- 03 12月, 2007 1 次提交
-
-
由 Tzachi Perelstein 提交于
Driver for the device bus NAND controller in the Marvell Orion family of ARM SoCs. Signed-off-by: NTzachi Perelstein <tzachi@marvell.com> Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Acked-by: NJörn Engel <joern@logfs.org> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
-
- 29 11月, 2007 1 次提交
-
-
由 Egor Martovetsky 提交于
Plumbing for NAND connected via localbus on PA Semi PWRficient-based boards. From: Egor Martovetsky <egor@pasemi.com> Signed-off-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
-
- 13 10月, 2007 1 次提交
-
-
由 Bryan Wu 提交于
This is the driver for latest Blackfin on-chip nand flash controller - use nand_chip and mtd_info common nand driver interface - provide both PIO and dma operation - compiled with ezkit bf548 configuration - use hardware 1-bit ECC - tested with YAFFS2 and can mount YAFFS2 filesystem as rootfs ChangeLog from try#1 - use hweight32() instead of count_bits() - replace bf54x with bf5xx and BF54X with BF5XX - compare against plat->page_size in 2 cases when enable hardware ECC ChangeLog from try#2 - passed nand_test suites - use cpu_relax() instead of busy wait loop - some coding style issue pointed out by Andrew Signed-off-by: NBryan Wu <bryan.wu@analog.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
-
- 30 8月, 2007 1 次提交
-
-
由 Jörn Engel 提交于
Unlike most stuff on the market the chip inside these two allows raw flash access and doesn't implement and FTL, leaving that functionality to the device driver. Raw flash access in a cheap USB cardreader! An MTD test device one can attach to a PC! What a deal! The command set of the chip is not documented, so information was obtained from the existing mass-storage driver (drivers/usb/storage/alauda.c), its documentation (http://alauda.sourceforge.net/wikka.php?wakka=BulkCommandReference), additional reverse engineering and comparison with a vendor driver for a related chip (http://www.ratocsystems.com/english/download/driver/linux/sma03u.html). Signed-off-by: NJoern Engel <joern@logfs.org> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
-
- 08 5月, 2007 1 次提交
-
-
由 Vitaly Wool 提交于
This patch adds support for generic platform NAND driver. Updated after tglx's review/discussion in IRC #mtd channel. Signed-off-by: NVitaly Wool <vitalywool@gmail.com> Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
-
- 02 5月, 2007 2 次提交
-
-
由 David Woodhouse 提交于
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
-
由 Segher Boessenkool 提交于
Signed-off-by: NSegher Boessenkool <segher@kernel.crashing.org> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
-
- 28 4月, 2007 1 次提交
-
-
由 Mike Rapoport 提交于
This patch provides MTD support for NAND flash devices on CM-x270 modules. Signed-off-by: NMike Rapoport <mike@compulab.co.il> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
-
- 12 2月, 2007 1 次提交
-
-
由 Thomas Koeller 提交于
This is a nand flash driver for the eXcite series of intelligent cameras manufactured by Basler Vision Technologies AG. Signed-off-by: NThomas Koeller <thomas.koeller@baslerweb.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
-
- 22 10月, 2006 1 次提交
-
-
由 David Woodhouse 提交于
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
-
- 21 10月, 2006 1 次提交
-
-
由 Andrew Victor 提交于
This version only differs from version posted by Savin Zlobec (20 Jun 2006) in that the AT91RM9200-specific chip-select / bus setup code has been moved from the at91_nand.c driver into the processor-specific file. From: Savin Zlobec <savin@epico.si> Signed-off-by: NAndrew Victor <andrew@sanpeople.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
-
- 06 10月, 2006 1 次提交
-
-
由 David Woodhouse 提交于
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
-
- 23 5月, 2006 1 次提交
-
-
由 Thomas Gleixner 提交于
NDFC NAND Flash controller is embedded in PPC EP44x SoCs. Add platform driver based support. Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
-
- 22 5月, 2006 1 次提交
-
-
由 Jonathan McDowell 提交于
The patch below adds support for the NAND device on the Amstrad Delta. This is a 32MiB 8bit Toshiba device, with the data bus connected to the OMAP MPUIO pins and ALE, CLE, NCE, NRE, NWE and NWP all connected to the Delta's latch2 16bit latch. Signed-Off-By: NJonathan McDowell <noodles@earth.li> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
-
- 12 5月, 2006 1 次提交
-
-
由 David Woodhouse 提交于
This lacks hardware ECC support and a few optimisations we're going to want fairly soon, but it works well enough to mount and use JFFS2. Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
-
- 01 5月, 2006 1 次提交
-
-
由 Lennert Buytenhek 提交于
The TS-72xx is a series of embedded single board computers from Technologic Systems based on the Cirrus ep93xx (arm920t based) CPU. The TS-7200 uses NOR flash, while all the other models in the series (TS-7250, TS-7260) use NAND flash -- included is a driver for the NAND flash on those boards. Signed-off-by: NLennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
-
- 06 7月, 2005 1 次提交
-
-
由 Thomas Gleixner 提交于
The drivers are unmaintained since long and reference include files which are not available in the kernel. Original author is not longer responsible and no new maintainer showed up within 3 month. Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
-
- 17 4月, 2005 1 次提交
-
-
由 Linus Torvalds 提交于
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
-