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  1. 16 5月, 2007 9 次提交
    • B
      cs5530/sc1200: add ->udma_filter methods · 5fd216bb
      由 Bartlomiej Zolnierkiewicz 提交于 
      CS5530/SC1200 specifies that two drives on the same cable cannot mix
UDMA/MDMA.  Add {cs5530,sc1200}_udma_filter() to handle this.  This also
makes it possible to remove open-coded best DMA mode selection and use
standard ide_use_dma()/ide_max_dma_mode() helpers.  While at it bump
version numbers.

There should be no functionality changes caused by this patch.
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      5fd216bb
    • B
      ide: always disable DMA before tuning it · 793a9722
      由 Bartlomiej Zolnierkiewicz 提交于 
      ide_start_power_step() and set_using_dma() were missing ->dma_off_quietly
call (comment in probe_hwif() states that DMA should be always cleared before
tuning is attempted).  Fix it.
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      793a9722
    • B
      pdc202xx_new: use ide_tune_dma() · 7f86723a
      由 Bartlomiej Zolnierkiewicz 提交于 
      * remove code enabling IORDY and prefetch from config_chipset_for_dma(),
  as the comment states it has no real effect because these settings are
  overriden when the PIO mode is set (and for this driver ->autotune == 1
  so PIO mode is always programmed)

* use ide_tune_dma() in pdcnew_config_drive_xfer_rate() and remove no longer
  needed config_chipset_for_dma()

There should be no functionality changes caused by this patch.
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      7f86723a
    • B
      alim15x3: use ide_tune_dma() · 38ff8a74
      由 Bartlomiej Zolnierkiewicz 提交于 
      Use ide_tune_dma() in ali15x3_config_drive_for_dma() and remove all the open
coded DMA tuning code and also config_chipset_for_dma().  Set ->atapi_dma flag
correctly in init_hwif_common_ali15x3() so ide_tune_dma() can take care of
checking if ATAPI DMA is allowed and remove open coded ATAPI DMA check from
ali15x3_config_drive_for_dma().

There should be no functionality changes caused by this patch.
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      38ff8a74
    • B
      sis5513: PIO mode setup fixes · 6b8cf772
      由 Bartlomiej Zolnierkiewicz 提交于 
      * limit max PIO mode to PIO4, this driver doesn't support PIO5 and attempt
  to program PIO5 by config_art_rwp_pio() could result in incorrect PIO
  timings being programmed and possibly the data corruption (for < ATA100
  family chipsets PIO0 timings were used, for ATA100 and ATA100a - the random
  content of test1 variable was used, for ATA133 - MWDMA0 timings were used)

* BUG() in sis5513_tune_chipset() if somebody tries to force unsupported PIO5,
  also cleanup this function a bit while at it

* add comment about PIO0 timings for < ATA100 family chipsets

* remove open-coded best PIO mode selection from config_art_rwp_pio(),
  it contained numerous bugs:

  - it didn't check for validity of id->eide_pio_modes and id->eide_pio_iordy
    before using them

  - it tried to found out maximum PIO mode basing on minimum IORDY cycle time
    (moreover wrong cycle times were used for PIO1/5)

  - it was overriding PIO blacklist and conservative PIO "downgrade" done
    by ide_get_best_pio_mode()

* use sis5513_tune_drive() instead of config_art_rwp_pio()
  in sis5513_config_xfer_rate() so the correct PIO mode is also set
  on drive even if the device is not IORDY/DMA capable

* config_art_rwp_pio() was always setting the best possible mode and not
  the wanted one - fix it and move ide_get_best_pio_mode() call to
  config_chipset_for_pio()

* don't use ide_find_best_mode() in config_chipset_for_pio(), it was being
  overriden by config_art_rwp_pio() for the host timings anyway + we need to
  set the same PIO mode on the device and the host

* pass correct "pio" argument (255 instead of 5) to sis5513_tune_drive() call
  in sis5513_config_xfer_rate() so the best PIO mode is set on the drive
  and not PIO4

* rename sis5513_tune_drive() to sis5513_tuneproc()
  and config_chipset_for_pio() to sis5513_tune_driver()

* bump driver version
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      6b8cf772
    • B
      serverworks: PIO mode setup fixes · 9445de76
      由 Bartlomiej Zolnierkiewicz 提交于 
      * limit max PIO mode to PIO4, this driver doesn't support PIO5 and attempt
  to program PIO5 by svwks_tune_chipset() could result in incorrect PIO
  timings being programmed and possibly the data corruption (it seems that
  the minimum possible values were used but I lack the datasheets to be sure)

* select best PIO mode in svwks_tune_drive() and not in svwks_tune_chipset()
  when doing PIO autotuning (pio == 255)

* don't try to tune PIO in config_chipset_for_dma() as ide_dma_enable() could
  return 1 if DMA was previously enabled (svwks_config_drive_xfer_rate()
  takes care of PIO tuning if no suitable DMA mode is found)

* remove config_chipset_for_pio() and use svwks_tune_drive() instead,
  config_chipset_for_pio() contained numerous bugs when selecting PIO mode
  (luckily it was only used for devices limited to PIO by capabilities/BIOS):

  - it didn't check for validity of id->eide_pio_modes and id->eide_pio_iordy
    before using them

  - it tried to found out maximum PIO mode basing on minimum IORDY cycle time
    (moreover wrong cycle times were used for PIO0/1/5)

  - it was overriding PIO blacklist and conservative PIO "downgrade" done
    by ide_get_best_pio_mode()

  - if the max drive PIO was PIO5 then XFER_PIO_0/XFER_PIO_SLOW was selected
    (XFER_PIO_SLOW is not supported by svwks_tune_chipset() so the result
     was the same as if using XFER_PIO_5 => wrong PIO timings were set)

  - it was overriding drive->current_speed

* bump driver version
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      9445de76
    • B
      pdc202xx_old: rewrite mode programming code (v2) · 4fce3164
      由 Bartlomiej Zolnierkiewicz 提交于 
      This patch is based on the documentation (I would like to thank Promise
for it) and also partially on the older vendor driver.

Rewrite mode programming code:

* disable 66MHz clock in pdc202xx_tune_chipset() so it is correctly disabled
  even if both devices on the channel are not DMA capable and after reset

* enable/disable IORDY and PREFETCH bits in pdc202xx_tune_chipset()
  as they need to be setup correctly also for PIO only devices, plus IORDY
  wasn't disabled for non-IORDY devices and PREFETCH wasn't disabled for
  ATAPI devices

* remove dead code for setting SYNC_ERDDY_EN bits from config_chipset_for_dma()
  (driver sets ->autotune to 1 so PIO modes are always programmed => lower
   nibble of register A never equals 4 => "chipset_is_set" is always true)

* enable PIO mode programming for all ATAPI devices
  (it was limited to ->media == ide_cdrom devices)

* remove extra reads of registers A/B/C, don't read register D et all

* do clearing / programming of registers A/B/C in one go
  (gets rid of extra PCI config space read/write cycle)

* set initial values of drive_conf/AP/BP/CP variables to zero
  (paranoia for the case when PCI reads fail)

* remove XFER_UDMA6 to XFER_UDMA5 remapping case - it can't happen
  (ide_rate_filter() takes care of it)

* fix XFER_MW_DMA0 timings (they were overclocked, use the official ones)

* fix bitmasks for clearing bits of register B:

  - when programming DMA mode bit 0x10 of register B was cleared which
    resulted in overclocked PIO timing setting (iff PIO0 was used)

  - when programming PIO mode bits 0x18 weren't cleared so suboptimal
    timings were used for PIO1-4 if PIO0 was previously set (bit 0x10)
    and for PIO0/3/4 if PIO1/2 was previously set (bit 0x08)

* add FIXME comment about missing locking for 66MHz clock register

Also while at it:

* remove unused defines

* do a few cosmetic / CodingStyle fixes

* bump driver version

v2:
* in pdc202xx_tune_chipset() the old content of drive configuration
  registers is used only by the debugging code so cover "drive_conf"
  PCI registers read by #if PDC202XX_DEBUG_DRIVE_INFO
  (Noticed by Sergei Shtylyov)
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      4fce3164
    • J
      ll_rw_blk: fix gcc 4.2 warning on current_io_context() · f653c34d
      由 Jens Axboe 提交于 
      current_io_context() is both static and exported with EXPORT_SYMBOL().
As there are no users outside of ll_rw_blk.c itself, just kill the
export.

Problem reported by Martin Michlmayr <tbm@cyrius.com>
Signed-off-by: NJens Axboe <jens.axboe@oracle.com>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      f653c34d
    • L
      Merge branch 'for-linus' of master.kernel.org:/pub/scm/linux/kernel/git/roland/infiniband · de7860c3
      由 Linus Torvalds 提交于 
      * 'for-linus' of master.kernel.org:/pub/scm/linux/kernel/git/roland/infiniband:
  IPoIB/cm: Optimize stale connection detection
  IB/mthca: Set cleaned CQEs back to HW ownership when cleaning CQ
  IB/mthca: Fix posting >255 recv WRs for Tavor
  RDMA/cma: Add check to validate that cm_id is bound to a device
  RDMA/cma: Fix synchronization with device removal in cma_iw_handler
  RDMA/cma: Simplify device removal handling code
  IB/ehca: Disable scaling code by default, bump version number
  IB/ehca: Beautify sysfs attribute code and fix compiler warnings
  IB/ehca: Remove _irqsave, move #ifdef
  IB/ehca: Fix AQP0/1 QP number
  IB/ehca: Correctly set GRH mask bit in ehca_modify_qp()
  IB/ehca: Serialize hypervisor calls in ehca_register_mr()
  IB/ipath: Shadow the gpio_mask register
  IB/mlx4: Fix uninitialized spinlock for 32-bit archs
  mlx4_core: Remove unused doorbell_lock
  net: Trivial MLX4_DEBUG dependency fix.
      de7860c3
  3. 15 5月, 2007 31 次提交