- 07 11月, 2016 3 次提交
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由 Ping Gao 提交于
Missing write_vreg in DMA_CTRL write handler would make obsolete value return when read vreg. v2: get data from vreg after updating it. Signed-off-by: NPing Gao <ping.a.gao@intel.com> Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com>
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由 Ping Gao 提交于
Remove the variable 'execlist' as it's unused in function vgpu_has_pending_workload. Signed-off-by: NPing Gao <ping.a.gao@intel.com> Reviewed-by: NZhi Wang <zhi.a.wang@intel.com> Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com>
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由 Zhenyu Wang 提交于
This is to fix smatch warning on drivers/gpu/drm/i915/gvt/cmd_parser.c:1421 cmd_handler_mi_op_2f() warn: shift has higher precedence than mask We need bits 20-19 mask for data size. Cc: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com>
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- 29 10月, 2016 7 次提交
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由 Chris Wilson 提交于
Our low-level wait routine has evolved from our generic wait interface that handled unlocked, RPS boosting, waits with time tracking. If we push our GEM fence tracking to use reservation_objects (required for handling multiple timelines), we lose the ability to pass the required information down to i915_wait_request(). However, if we push the extra functionality from i915_wait_request() to the individual callsites (i915_gem_object_wait_rendering and i915_gem_wait_ioctl) that make use of those extras, we can both simplify our low level wait and prepare for extending the GEM interface for use of reservation_objects. v2: Rewrite i915_wait_request() kerneldocs Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk> Cc: Matthew Auld <matthew.william.auld@gmail.com> Reviewed-by: NJoonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20161028125858.23563-4-chris@chris-wilson.co.uk
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由 Chris Wilson 提交于
The throttle-ioctl never touches the struct_mutex. It does, however, as part of its ABI report whether the hardware is terminally wedged. For that purposes, it only has to report the current state and not incur the cost of checking/waiting every invocation, as we do not have to wait for a reset before waiting on a request to ensure completion (that is baked into the wait request implementation). Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk> Reviewed-by: NJoonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20161028125858.23563-3-chris@chris-wilson.co.uk
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由 Chris Wilson 提交于
In forthcoming patches, we want to be able to dynamically allocate the wait_queue_t used whilst awaiting. This is more convenient if we extend the i915_sw_fence_await_sw_fence() to perform the allocation for us if we pass in a gfp mask as an alternative than a preallocated struct. Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk> Reviewed-by: NJoonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20161028125858.23563-2-chris@chris-wilson.co.uk
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由 Chris Wilson 提交于
We will need to wait on DMA completion (as signaled via struct fence) before executing our i915_gem_request. Therefore we want to expose a method for adding the await on the fence itself to the request. v2: Add a comment detailing a failure to handle a signal-on-any fence-array. v3: Pretend that magic numbers don't exist. Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk> Reviewed-by: NJoonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20161028125858.23563-1-chris@chris-wilson.co.uk
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由 Chris Wilson 提交于
We are not allowed to touch the GTT entries underneath an atomic section, as they take a rpm wakelock (which is illegal from atomic context) and in the near future acquiring the DMA address for a page within an object may sleep for an allocation. This makes the current shortcircuit in relocation_iomap() for performing a second relocation on an adjacent page illegal, and we need to release the atomic iomapping, lookup the DMA, insert it into the GTT before reentering the atomic iomap section. As it happens, this is precisely what we do on if we are using an iomapping over the full object and not just a single page and by removing the shortcut, we do the right thing. Fixes: 9c870d03 ("drm/i915: Use RPM as the barrier for controlling...") Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20161028142756.3850-1-chris@chris-wilson.co.ukReviewed-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
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由 Matt Roper 提交于
This was the only use of (misleadingly-named) intel_num_planes() function, so we can remove it as well. Signed-off-by: NMatt Roper <matthew.d.roper@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1477522291-10874-3-git-send-email-matthew.d.roper@intel.comReviewed-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
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由 Matt Roper 提交于
This macro's name is a bit misleading; it doesn't actually iterate over all planes since it omits the cursor plane. Its only uses are in gen9 code which is using it to iterate over the universal planes (which we treat as primary+sprites); in these cases the legacy cursor registers are programmed independently if necessary. The macro's iterator value (0 for primary plane, spritenum+1 for each secondary plane) also isn't meaningful outside the gen9 context where the hardware considers them to all be "universal" planes that follow this numbering. This is just a renaming/clarification patch with no functional change. However it will make the subsequent patches more clear. Signed-off-by: NMatt Roper <matthew.d.roper@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1477522291-10874-2-git-send-email-matthew.d.roper@intel.comReviewed-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
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- 28 10月, 2016 20 次提交
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由 Navare, Manasi D 提交于
These static helper functions are required to be used during fallback link rate implemnetation so they need to be placed at the top of the file. v3: * Add cleanup to other patch (Mika Kahola) v2: * Dont move around functions declared in intel_drv.h (Rodrigo Vivi) Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Daniel Vetter <daniel.vetter@intel.com> Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Signed-off-by: NManasi Navare <manasi.d.navare@intel.com> Reviewed-by: NMika Kahola <mika.kahola@intel.com> Signed-off-by: NJani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1477524358-16563-4-git-send-email-manasi.d.navare@intel.com
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The port registers related to the phys in broxton map to different channels and specific phys. Make that mapping explicit. v2: Pass enum dpio_phy to macros instead of mmio base. (Imre) v3: Fix typo in macros. (Imre) v4: Also change variables from u32 to enum dpio_phy. (Imre) Remove leftovers from previous version. (Imre) v5: Actually git add the changes. Signed-off-by: NAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Reviewed-by: NImre Deak <imre.deak@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1476863940-6019-1-git-send-email-ander.conselvan.de.oliveira@intel.com
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Use struct bxt_ddi_phy_info to hold information of where the Rcomp resistor is located, instead of hard coding it in the init sequence. Note that this moves the enabling of the phy with the Rcomp resistor out of the power well enable code. That should be safe since bxt_ddi_phy_init() is called while the power domains lock is held, and that is the only way that function gets called, so there is no possibility of a concurrent phy enable caused by a power domain get call. v2: Replace comment about lock with lockdep_assert_held() (Imre) Signed-off-by: NAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Reviewed-by: NImre Deak <imre.deak@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/62d209950ad48484564f3e793cf247cf62572a39.1475770848.git-series.ander.conselvan.de.oliveira@intel.com
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Information about which phy is dual channel is hardcoded in the phy init sequence. Split that to a separate struct so the init sequence is more generic. v2: Restore mangled part that ended up in following patch. (Imre) Signed-off-by: NAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Reviewed-by: NImre Deak <imre.deak@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/9102f4c984044126057e4fdd1b91a615ff25fae6.1475770848.git-series.ander.conselvan.de.oliveira@intel.com
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The vswing sequence is related to the DPIO phy, so move it closer to the rest of DPIO phy related code. Signed-off-by: NAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Reviewed-by: NImre Deak <imre.deak@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/59aa5c85a115c5cbed81e793f20cd7b9f8de694b.1475770848.git-series.ander.conselvan.de.oliveira@intel.com
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Move the DPIO phy documentation section to intel_dpio_phy.c, since that is a more suitable place now that there is a source file dedicated for those phys. Signed-off-by: NAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Reviewed-by: NImre Deak <imre.deak@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/55a2d38c15c06a8c5bce498b28decc03948f0224.1475770848.git-series.ander.conselvan.de.oliveira@intel.com
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The phy in broxton is also a dpio phy, similar to cherryview but with programming through MMIO. So move the code together with the other similar phys. Signed-off-by: NAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Reviewed-by: NImre Deak <imre.deak@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/d611de6d256593cf904172db7ff27f164480c228.1475770848.git-series.ander.conselvan.de.oliveira@intel.com
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Pass lane count to bxt_ddi_phy_calc_lane_optmin_mask() instead of having it extract that number from a pipe_config to decouple the phy code from intel_crtc_state. Signed-off-by: NAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Reviewed-by: NImre Deak <imre.deak@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/a4977e0207e594953c4f9d1b5f2ef972a8679e74.1475770848.git-series.ander.conselvan.de.oliveira@intel.com
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The mapping from the BXT_DPIO_CMN_* power wells to their respective phys required a detour implemented in the bxt_power_well_to_phy() function. Instead, embed that information directly into the power_well struct, by resurrecting the data field. Signed-off-by: NAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Reviewed-by: NImre Deak <imre.deak@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/7fe97582fa08c7340ce6a3b6b0ea3e72a73182d7.1475770848.git-series.ander.conselvan.de.oliveira@intel.com
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Calling it data seems to imply arbitrary data can be associated with the power well. However, that field is used for look ups and expected to be unique, so rename it. Signed-off-by: NAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Reviewed-by: NImre Deak <imre.deak@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/f3916c3c5bfa793b0fc870fd44007a3ff425194d.1475770848.git-series.ander.conselvan.de.oliveira@intel.com
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由 Daniel Vetter 提交于
Backmerge latest drm-next to pull in the s/fence/dma_fence/ rework, needed before we merge more i915 fencing patches. Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com>
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git://github.com/skeggsb/linux由 Dave Airlie 提交于
Karol's work which greatly improves volt/clock changes on a heap of boards, nothing too exciting beyond a random collection of fixes. * 'linux-4.9' of git://github.com/skeggsb/linux: (33 commits) drm/nouveau/fb/nv50: defer DMA mapping of scratch page to oneinit() hook drm/nouveau/fb/gf100: defer DMA mapping of scratch page to oneinit() hook drm/nouveau/pci: set streaming DMA mask early drm/nouveau/kms: add Maxwell to backlight initialization drm/nouveau/bar/nv50: fix bar2 vm size drm/nouveau/disp: remove unused function in sorg94.c drm/nouveau/volt: use kernel's 64-bit signed division function drm/nouveau/core: add missing header dependencies drm/nouveau/gr/nv3x: add 0x0597 kelvin 3d class support drm/nouveau/drm/nouveau: add a LED driver for the NVIDIA logo drm/nouveau/fb/ram: Use Kepler implementation on Maxwell drm/nouveau/volt: Make use of cvb coefficients drm/nouveau/volt/gf100-: Add speedo drm/nouveau/volt: Add implementation for gf100 drm/nouveau/bios/vmap: unk0 field is the mode drm/nouveau/volt: Don't require perfect fit drm/nouveau/clk: Allow boosting only when NvBoost is set drm/nouveau/bios: Add parsing of VPSTATE table drm/nouveau/clk: Respect voltage limits in nvkm_cstate_prog drm/nouveau/clk: Fixup cstate selection ...
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git://anongit.freedesktop.org/git/drm-intel由 Dave Airlie 提交于
Pull request already again to get the s/fence/dma_fence/ stuff in and allow everyone to resync. Otherwise really just misc stuff all over, and a new bridge driver. * tag 'topic/drm-misc-2016-10-27' of git://anongit.freedesktop.org/git/drm-intel: drm/bridge: fix platform_no_drv_owner.cocci warnings drm/bridge: fix semicolon.cocci warnings drm: Print some debug/error info during DP dual mode detect drm: mark drm_of_component_match_add dummy inline drm/bridge: add Silicon Image SiI8620 driver dt-bindings: add Silicon Image SiI8620 bridge bindings video: add header file for Mobile High-Definition Link (MHL) interface drm: convert DT component matching to component_match_add_release() dma-buf: Rename struct fence to dma_fence dma-buf/fence: add an lockdep_assert_held() drm/dp: Factor out helper to distinguish between branch and sink devices drm/edid: Only print the bad edid when aborting drm/msm: add missing header dependencies drm/msm/adreno: move function declarations to header file drm/i2c/tda998x: mark symbol static where possible doc: add missing docbook parameter for fence-array drm: RIP mode_config->rotation_property drm/msm/mdp5: Advertize 180 degree rotation drm/msm/mdp5: Use per-plane rotation property
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git://people.freedesktop.org/~agd5f/linux由 Dave Airlie 提交于
First new feature pull for 4.10. Highlights: - Support for multple virtual displays in the virtual dce component - New VM mgr to support non-contiguous vram buffers - Support for UVD powergating on additional asics - Power management improvements - lots of code cleanup and bug fixes * 'drm-next-4.10' of git://people.freedesktop.org/~agd5f/linux: (107 commits) drm/amdgpu: turn on/off uvd clock when dpm enable/disable on CI drm/amdgpu: disable dpm before turn off clock when vce idle. drm/amdgpu: enable uvd bypass mode for CI/VI. drm/amdgpu: just not load smc firmware if smu is already running drm/amdgpu: when suspend, set boot state instand of disable dpm. drm/amdgpu: use failed label to handle context init failure drm/amdgpu: add amdgpu_ttm_bo_eviction_valuable callback drm/ttm: make eviction decision a driver callback v2 drm/ttm: fix coding style in ttm_bo_driver.h drm/radeon/pm: autoswitch power state when in balanced mode drm/amd/powerplay: fix spelling mistake and add KERN_WARNING to printks drm/amdgpu:new ids flag for preempt drm/amdgpu: mark symbols static where possible drm/amdgpu: change function declarations and add missing header dependencies drm/amdgpu: s/amdgpuCrtc/amdgpu_crtc/ in pageflip code drm/amdgpu/atom: remove a bunch of unused functions drm/amdgpu: consolidate atom scratch reg handling for hangs drm/amdgpu: use amdgpu_bo_[create|free]_kernel for wb drm/amdgpu: add VCE VM session tracking drm/amdgpu: improve parse_cs handling a bit ...
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由 Rex Zhu 提交于
Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rex Zhu 提交于
v2: move return value check as well Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rex Zhu 提交于
Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rex Zhu 提交于
Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rex Zhu 提交于
fix pm-hibernate bug, when suspend/resume, dpm start failed. Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Huang Rui 提交于
Signed-off-by: NHuang Rui <ray.huang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 27 10月, 2016 10 次提交
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由 Tvrtko Ursulin 提交于
Newline somehow ended up in the middle of the line. Signed-off-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk> Link: http://patchwork.freedesktop.org/patch/msgid/1477572512-4030-1-git-send-email-tvrtko.ursulin@linux.intel.com
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https://github.com/01org/gvt-linux由 Daniel Vetter 提交于
gvt-next-2016-10-27 - Resolve current left build issue with ACPI=n and 32bit kernel - TLB workaround from Arkadiusz - vGPU reset fix from Ping - workload scheduler nesting sleep fix from Changbin - more misc fixes for sparse warnings and cleanups Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com>
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由 kbuild test robot 提交于
drivers/gpu/drm/bridge/sil-sii8620.c:1556:3-8: No need to set .owner here. The core will do it. Remove .owner field if calls are used which set it automatically Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci CC: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: NFengguang Wu <fengguang.wu@intel.com> Signed-off-by: NArchit Taneja <architt@codeaurora.org> Link: http://patchwork.freedesktop.org/patch/msgid/20161026165836.GA98766@lkp-sb04.lkp.intel.com
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由 kbuild test robot 提交于
drivers/gpu/drm/bridge/sil-sii8620.c:988:2-3: Unneeded semicolon Remove unneeded semicolon. Generated by: scripts/coccinelle/misc/semicolon.cocci CC: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: NFengguang Wu <fengguang.wu@intel.com> Signed-off-by: NArchit Taneja <architt@codeaurora.org> Link: http://patchwork.freedesktop.org/patch/msgid/20161026165836.GA98907@lkp-sb04.lkp.intel.com
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由 Du, Changbin 提交于
We cannot use blocking method mutex_lock inside a wait loop. Here we invoke pick_next_workload() which needs acquire a mutex in our "condition" experssion. Then we go into a another of the going-to-sleep sequence and changing the task state. This is a dangerous. Let's rewrite the wait sequence to avoid nested sleeping. v2: fix do...while loop exit condition (zhenyu) v3: rebase to gvt-staging branch Signed-off-by: NDu, Changbin <changbin.du@intel.com> Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com>
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由 Bing Niu 提交于
throw error message in elsp emulation handler basing on execlist submit result. guest will trigger tdr process for recovering, gvt just follow guest's desire. v2: populate error to top of mmio emulation logic, comments from zhenyu Signed-off-by: NBing Niu <bing.niu@intel.com> Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com>
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由 Ping Gao 提交于
Full vGPU reset need to release all the shadow PPGGT pages to avoid unnecessary write-protect and also should re-initialize pvinfo after resetting vregs to keep pvinfo correct. Signed-off-by: NPing Gao <ping.a.gao@intel.com> Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com>
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由 Anusha Srivatsa 提交于
Currently, for display there is only one DMC image for KBL. Remove the stepping_info table for KBL and use the no_stepping_info array for loading the firmware. v2: Removed the block of code as pointed out by Rodrigo to make the loads as generic as possible. Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: NAnusha Srivatsa <anusha.srivatsa@intel.com> Reviewed-by: NRodrigo Vivi <rodrigo.vivi@intel.com> Acked-by: NImre Deak <imre.deak@intel.com> Signed-off-by: NRodrigo Vivi <rodrigo.vivi@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1477355301-7035-1-git-send-email-anusha.srivatsa@intel.com
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由 Imre Deak 提交于
There's at least one LSPCON device that occasionally returns an unexpected adaptor ID which leads to a failed detect. Print some debug info to help debugging this and future cases. Also print an error for an unexpected adaptor ID, so users can report it. v2: - s/adapter/adaptor/ and add code comment about incorrect type 1 adaptor IDs. (Ville) Cc: dri-devel@lists.freedesktop.org Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: NImre Deak <imre.deak@intel.com> Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: NSean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/1477499359-12001-1-git-send-email-imre.deak@intel.com
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由 Arnd Bergmann 提交于
The newly added drm_of_component_match_add helper is defined as 'static' in a header when CONFIG_OF is disabled, causing a warning each time the header is included: In file included from /git/arm-soc/drivers/gpu/drm/bridge/dw-hdmi.c:23:0: include/drm/drm_of.h:33:13: error: 'drm_of_component_match_add' defined but not used [-Werror=unused-function] This marks it 'inline' like the other such helpers in this file. Fixes: 97ac0e47 ("drm: convert DT component matching to component_match_add_release()") Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NSean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/20161026085759.3875472-1-arnd@arndb.de
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