- 23 3月, 2015 1 次提交
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由 Chen-Yu Tsai 提交于
The reset control for the sunxi mmc controller is optional. Some newer platforms (sun6i, sun8i, sun9i) have it, while older ones (sun4i, sun5i, sun7i) don't. Use the properly stubbed _optional version so the driver does not fail to compile when RESET_CONTROLLER=n. This patch also adds a check for deferred probing on the reset control. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Cc: <stable@vger.kernel.org> # 3.16+ Acked-by: NDavid Lanzendörfer <david.lanzendoerfer@o2s.ch> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 19 1月, 2015 4 次提交
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由 David Lanzendörfer 提交于
Removing a relict from reverse engineering of the Android driver code in sunxi_mmc_clk_set_rate. Signed-off-by: NDavid Lanzendörfer <david.lanzendoerfer@o2s.ch> Reported-by: <lixiang@allwinnertech.com> Acked-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 David Lanzendörfer 提交于
Fixing the register name in sunxi_mmc_reset_host since the SDXC_HARDWARE_RESET bit is actually located within REG_GCTRL and not REG_CMDR as it was pointed out by Allwinner. Signed-off-by: NDavid Lanzendörfer <david.lanzendoerfer@o2s.ch> Reported-by: <lixiang@allwinnertech.com> Acked-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 David Lanzendörfer 提交于
1) Adding a comment in order to clarify the choice of the locks within sunxi_mmc_handle_manual_stop 2) As <lixiang@allwinnertech.com> has pointed out the wait_dma variable was not accessed within the spin lock block in sunxi_mmc_request and so (even if it should never happend) it would have theoretically been possible that some other function would access the variable at the same time as the function. This has been changed now and the function is using local variables outside the lock and copys the value over during the lock phase. Signed-off-by: NDavid Lanzendörfer <david.lanzendoerfer@o2s.ch> Reported-by: <lixiang@allwinnertech.com> Acked-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Hans de Goede 提交于
The last descriptor might be the first descriptor as well, so use masking to add the LD (last descriptor) bit and drop the DIC (disable interrupt on completion) bit rather then hard assignment as hard assignment will override the FD (first descriptor) bit if there is only 1 descriptor. Also set the ER (end of ring) bit and clear buf_addr_ptr2 on the last descriptor, like the android kernel code does. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NDavid Lanzendörfer <david.lanzendoerfer@o2s.ch> Reported-by: <lixiang@allwinnertech.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 14 1月, 2015 1 次提交
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由 Maxime Ripard 提交于
Now that we have proper support to use the generic phase API in our clock driver, switch the MMC driver to use it. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Acked-by: NUlf Hansson <ulf.hansson@linaro.org> Acked-by: NDavid Lanzendörfer <david.lanzendoerfer@o2s.ch> Reviewed-by: NChen-Yu Tsai <wens@csie.org> Tested-by: NChen-Yu Tsai <wens@csie.org>
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- 10 11月, 2014 1 次提交
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由 Tomeu Vizoso 提交于
Signed-off-by: NTomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 09 9月, 2014 2 次提交
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由 Chen-Yu Tsai 提交于
Declare ERASE capability so we can use filesystems with the discard option and the fstrim tool. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Peter Griffin 提交于
This patch removes the superflous .owner field for drivers which use the module_platform_driver API, as this is overriden in platform_driver_register anyway. Signed-off-by: NPeter Griffin <peter.griffin@linaro.org> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 04 6月, 2014 1 次提交
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由 David Lanzendörfer 提交于
The Allwinner sunxi mmc host uses dma in bus-master mode using a built-in designware idmac controller, which is identical to the one found in the mmc-dw hosts. However the rest of the host is not identical to mmc-dw, it deals with sending stop commands in hardware which makes it significantly different from the mmc-dw devices. Signed-off-by: NDavid Lanzendörfer <david.lanzendoerfer@o2s.ch> [hdegoede@redhat.com: various cleanups and fixes] Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Acked-by: NChris Ball <chris@printf.net> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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- 22 5月, 2014 1 次提交
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由 David Lanzendörfer 提交于
The Allwinner sunxi mmc host uses dma in bus-master mode using a built-in designware idmac controller, which is identical to the one found in the mmc-dw hosts. However the rest of the host is not identical to mmc-dw, it deals with sending stop commands in hardware which makes it significantly different from the mmc-dw devices. Signed-off-by: NDavid Lanzendörfer <david.lanzendoerfer@o2s.ch> [hdegoede@redhat.com: various cleanups and fixes] Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Signed-off-by: NChris Ball <chris@printf.net>
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