[Blackfin] arch: reorganize some of the board-customization options so that similar things are together and only available as needed
Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

The irq setup code no longer calls gpio request and free.
This patch also changes the default gpio_free behavior on Blackfin.
A freed GPIO keeps it's last state, and is not defaulted back to
an input. This is also what all other architectures do.
Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

detect the memory available in the system on the fly by default
rather than forcing people to set this manually in the kconfig
Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

[Blackfin] arch: add implicit icplb for the bootrom so we can use the utility functions in the kernel
Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NGrace Pan <grace.pan@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

[Blackfin] arch: fix bug - Section data_l1_cacheline_aligned should be defined in link script of kernel

http://blackfin.uclinux.org/gf/project/uclinux-dist/tracker/?action=TrackerItemEdit&tracker_item_id=3978

Section data_l1_cacheline_aligned should be defined in
link script of kernel, when L1 data sram bank A is not available.

In bf536 with all data cache is enabled, there is no L1 data sram.
Current link script won't define section data_l1.cacheline_aligned in
this case. But, if user select put cacheline_aligned data into l1 sram
in kernel menuconfig, these data will be dropped and access to these
data will trigger data CPLB exception.

Do panic in l1 relocation code as well.
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NRobin Getz <rgetz@blackfin.uclinux.org>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

 - allow bootrom to be readable from supervisor mode
 - delete unused local variable "addr"
 - punt unused local defines of cplbinfo.c
Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

The DMA base registers are available in a global named "base_addr" for
every Blackfin variant. Give this a more descriptive name, and remove
duplicate tables from some drivers.
Signed-off-by: NBernd Schmidt <bernds_cb1@t-online.de>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NBernd Schmidt <bernds_cb1@t-online.de>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NBernd Schmidt <bernds_cb1@t-online.de>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

theres no need to declare ram{end,start,base} in the head.S files
when declaring them with the other memory related variables in setup.c
is so much simpler/nicer
Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

[Blackfin] arch: remove duplicated prototypes for internal cplb structures from the global blackfin header

remove duplicated prototypes for internal cplb structures from
the global blackfin header as nothing else should be accessing these
Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NPeter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

[Blackfin] arch: Resolve the clash issue of UART defines between blackfin headers and include/linux/serial_reg.
Signed-off-by: NGraf Yang <graf.yang@analog.com>
Cc: Robin Getz <rgetz@blackfin.uclinux.org>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Previously, init failed to do anything meaningful;
it turns out that the reason is that FD-PIC has a readonly data
section which can be located in the XIP filesystem, and various address checks
in the kernel reject such addresses for syscall arguments.  Hence, init's
  execve ("/bin/sh", ...)
failed with error code EFAULT.

There's room for improvement here: in case people want to have filesystems
on flash rather than in main memory, _access_ok should be modified to
allow this.

This bug fix is also dedicated to Michael Hennerich.
Signed-off-by: NBernd Schmidt <bernds_cb1@t-online.de>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Pointed-out-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBernd Schmidt <bernds_cb1@t-online.de>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

The function flush_switched_dcplbs was clearing the CPLB entries covering
the process permission bitmasks.  This means that the sequence

	flush_switched_dcplbs ();
        set_mask_dcplbs(mm->context.page_rwx_mask);

has a problem: if kernel code (such as an interrupt) causes a CPLB miss before
set_mask_dcplbs completes, the CPLB handler function causes a double fault,
with an instantaneous reboot.

This bug fix is dedicated to Michael Hennerich, the only person in the world
capable of providing working JTAG hardware.
Signed-off-by: NBernd Schmidt <bernds_cb1@t-online.de>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

This is a rather old performance improvement for the signal handling
code, which was originally only committed on the 2007R1 branch as a
workaround for what we suspected to be a hardware bug.

There's no point in constructing a sigreturn stub on the stack and
flushing caches; we can just make signal handlers return to a known
location in the fixed code area.
Signed-off-by: NBernd Schmidt <bernds_cb1@t-online.de>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>
Acked-by: NJeff Garzik <jeff@garzik.org>

Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NHarvey Harrison <harvey.harrison@gmail.com>
Cc: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NMeihui Fan <mhfan@hhcn.com>
Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NMeihui Fan <mhfan@hhcn.com>
Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

[Blackfin] arch: relocate MAX_SWITCH_{D,I}_CPLBS from the header to the file where it actually gets used.

relocate MAX_SWITCH_{D,I}_CPLBS from the header to the file
where it actually gets used.  this way when we change
CONFIG_MEM_SIZE in our kconfig, we only rebuild one or two files
rather than a whole bunch that implicitly include cplb.h.

this will also remove the ability to clear the swapcount on
the fly, but i really dont think that functionality is important.

ultimate goal is for CONFIG_MEM_SIZE to go away and calculate
this value on the fly based on what u-boot programmed for us.
Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

[Blackfin] arch: MEM_ADD_WIDTH only gets used when reprogramming clocks, so dont bother exposing it in the menu normally
Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Bug: CONFIG_MPU doesn't seem to handle access to ASYNC/IO Memory well
http://blackfin.uclinux.org/gf/project/uclinux-dist/tracker/?action=TrackerItemEdit&tracker_item_id=3912Signed-off-by: NBernd Schmidt <bernds_cb1@t-online.de>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

There were a couple of problems with the way the trace buffer state
is saved/restored in assembly.  The DEBUG_HWTRACE_SAVE/RESTORE macros
save a value to the stack, which is not immediately obvious; the CPLB
exception code needed changes to load the correct value of the stack
pointer.  The other problem is that the SAVE/RESTORE macros weren't
pushing and popping the value downwards on the stack, but rather moving
it _upwards_, which is of course completely broken.

We also need to make sure there's a matching DEBUG_HWTRACE_RESTORE in
the error case of the CPLB handler.
Signed-off-by: NBernd Schmidt <bernds_cb1@t-online.de>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

[Blackfin] arch: fix up - CONFIG_BLKFIN_WT was renamed CONFIG_BFIN_WT while the MPU code was out-of-tree.
Signed-off-by: NBernd Schmidt <bernds_cb1@t-online.de>
Signed-off-by: NBryan Wu <cooloney@kernel.org>