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  1. 30 5月, 2014 1 次提交
    • A
      KVM: PPC: Make shared struct aka magic page guest endian · 5deb8e7a
      由 Alexander Graf 提交于 
      The shared (magic) page is a data structure that contains often used
supervisor privileged SPRs accessible via memory to the user to reduce
the number of exits we have to take to read/write them.

When we actually share this structure with the guest we have to maintain
it in guest endianness, because some of the patch tricks only work with
native endian load/store operations.

Since we only share the structure with either host or guest in little
endian on book3s_64 pr mode, we don't have to worry about booke or book3s hv.

For booke, the shared struct stays big endian. For book3s_64 hv we maintain
the struct in host native endian, since it never gets shared with the guest.

For book3s_64 pr we introduce a variable that tells us which endianness the
shared struct is in and route every access to it through helper inline
functions that evaluate this variable.
Signed-off-by: NAlexander Graf <agraf@suse.de>
      5deb8e7a
  3. 27 1月, 2014 1 次提交
    • C
      KVM: PPC: Book3S: MMIO emulation support for little endian guests · 73601775
      由 Cédric Le Goater 提交于 
      MMIO emulation reads the last instruction executed by the guest
and then emulates. If the guest is running in Little Endian order,
or more generally in a different endian order of the host, the
instruction needs to be byte-swapped before being emulated.

This patch adds a helper routine which tests the endian order of
the host and the guest in order to decide whether a byteswap is
needed or not. It is then used to byteswap the last instruction
of the guest in the endian order of the host before MMIO emulation
is performed.

Finally, kvmppc_handle_load() of kvmppc_handle_store() are modified
to reverse the endianness of the MMIO if required.
Signed-off-by: NCédric Le Goater <clg@fr.ibm.com>
[agraf: add booke handling]
Signed-off-by: NAlexander Graf <agraf@suse.de>
      73601775
  5. 18 10月, 2013 1 次提交
  7. 17 10月, 2013 2 次提交
  9. 31 7月, 2013 1 次提交
  11. 30 6月, 2013 1 次提交
    • A
      KVM: PPC: Ignore PIR writes · a3ff5fbc
      由 Alexander Graf 提交于 
      While technically it's legal to write to PIR and have the identifier changed,
we don't implement logic to do so because we simply expose vcpu_id to the guest.

So instead, let's ignore writes to PIR. This ensures that we don't inject faults
into the guest for something the guest is allowed to do. While at it, we cross
our fingers hoping that it also doesn't mind that we broke its PIR read values.
Signed-off-by: NAlexander Graf <agraf@suse.de>
      a3ff5fbc
  13. 17 4月, 2013 1 次提交
  15. 18 1月, 2013 1 次提交
  17. 10 1月, 2013 1 次提交
  19. 30 10月, 2012 1 次提交
  21. 11 7月, 2012 1 次提交
  23. 06 5月, 2012 4 次提交
    • A
      KVM: PPC: Emulator: clean up SPR reads and writes · 54771e62
      由 Alexander Graf 提交于 
      When reading and writing SPRs, every SPR emulation piece had to read
or write the respective GPR the value was read from or stored in itself.

This approach is pretty prone to failure. What if we accidentally
implement mfspr emulation where we just do "break" and nothing else?
Suddenly we would get a random value in the return register - which is
always a bad idea.

So let's consolidate the generic code paths and only give the core
specific SPR handling code readily made variables to read/write from/to.

Functionally, this patch doesn't change anything, but it increases the
readability of the code and makes is less prone to bugs.
Signed-off-by: NAlexander Graf <agraf@suse.de>
      54771e62
    • A
      KVM: PPC: Emulator: clean up instruction parsing · c46dc9a8
      由 Alexander Graf 提交于 
      Instructions on PPC are pretty similarly encoded. So instead of
every instruction emulation code decoding the instruction fields
itself, we can move that code to more generic places and rely on
the compiler to optimize the unused bits away.

This has 2 advantages. It makes the code smaller and it makes the
code less error prone, as the instruction fields are always
available, so accidental misusage is reduced.

Functionally, this patch doesn't change anything.
Signed-off-by: NAlexander Graf <agraf@suse.de>
      c46dc9a8
    • A
      KVM: PPC: Fix stbux emulation · 978b4fae
      由 Alexander Graf 提交于 
      Stbux writes the address it's operating on to the register specified in ra,
not into the data source register.
Signed-off-by: NAlexander Graf <agraf@suse.de>
      978b4fae
    • B
      KVM: PPC: Use clockevent multiplier and shifter for decrementer · 6e35994d
      由 Bharat Bhushan 提交于 
      Time for which the hrtimer is started for decrementer emulation is calculated
using tb_ticks_per_usec. While hrtimer uses the clockevent for DEC
reprogramming (if needed) and which calculate timebase ticks using the
multiplier and shifter mechanism implemented within clockevent layer.

It was observed that this conversion (timebase->time->timebase) are not
correct because the mechanism are not consistent.
In our setup it adds 2% jitter.

With this patch clockevent multiplier and shifter mechanism are used when
starting hrtimer for decrementer emulation. Now the jitter is < 0.5%.
Signed-off-by: NBharat Bhushan <bharat.bhushan@freescale.com>
Signed-off-by: NAlexander Graf <agraf@suse.de>
      6e35994d
  25. 08 4月, 2012 2 次提交
  27. 05 3月, 2012 4 次提交
  29. 22 5月, 2011 2 次提交
  31. 24 10月, 2010 2 次提交
    • A
      KVM: PPC: Convert SPRG[0-4] to shared page · a73a9599
      由 Alexander Graf 提交于 
      When in kernel mode there are 4 additional registers available that are
simple data storage. Instead of exiting to the hypervisor to read and
write those, we can just share them with the guest using the page.

This patch converts all users of the current field to the shared page.
Signed-off-by: NAlexander Graf <agraf@suse.de>
Signed-off-by: NAvi Kivity <avi@redhat.com>
      a73a9599
    • A
      KVM: PPC: Convert SRR0 and SRR1 to shared page · de7906c3
      由 Alexander Graf 提交于 
      The SRR0 and SRR1 registers contain cached values of the PC and MSR
respectively. They get written to by the hypervisor when an interrupt
occurs or directly by the kernel. They are also used to tell the rfi(d)
instruction where to jump to.

Because it only gets touched on defined events that, it's very simple to
share with the guest. Hypervisor and guest both have full r/w access.

This patch converts all users of the current field to the shared page.
Signed-off-by: NAlexander Graf <agraf@suse.de>
Signed-off-by: NAvi Kivity <avi@redhat.com>
      de7906c3
  33. 13 10月, 2010 1 次提交
  35. 17 5月, 2010 4 次提交
  37. 25 4月, 2010 2 次提交
    • A
      KVM: PPC: Add AGAIN type for emulation return · 37f5bca6
      由 Alexander Graf 提交于 
      Emulation of an instruction can have different outcomes. It can succeed,
fail, require MMIO, do funky BookE stuff - or it can just realize something's
odd and will be fixed the next time around.

Exactly that is what EMULATE_AGAIN means. Using that flag we can now tell
the caller that nothing happened, but we still want to go back to the
guest and see what happens next time we come around.
Signed-off-by: NAlexander Graf <agraf@suse.de>
Signed-off-by: NAvi Kivity <avi@redhat.com>
      37f5bca6
    • A
      KVM: PPC: Teach MMIO Signedness · 3587d534
      由 Alexander Graf 提交于 
      The guest I was trying to get to run uses the LHA and LHAU instructions.
Those instructions basically do a load, but also sign extend the result.

Since we need to fill our registers by hand when doing MMIO, we also need
to sign extend manually.

This patch implements sign extended MMIO and the LHA(U) instructions.
Signed-off-by: NAlexander Graf <agraf@suse.de>
Signed-off-by: NAvi Kivity <avi@redhat.com>
      3587d534
  39. 01 3月, 2010 6 次提交
  41. 05 11月, 2009 1 次提交