1. 17 7月, 2014 2 次提交
  2. 10 7月, 2014 1 次提交
    • G
      spi: sh-msiof: SPI_SH_MSIOF should depend on HAS_DMA · 51fd5090
      Geert Uytterhoeven 提交于
      If NO_DMA=y:
      
          drivers/built-in.o: In function `sh_msiof_release_dma':
          spi-sh-msiof.c:(.text+0x23cbfe): undefined reference to `dma_unmap_single'
          drivers/built-in.o: In function `sh_msiof_request_dma':
          spi-sh-msiof.c:(.text+0x23cd5e): undefined reference to `dma_map_single'
          spi-sh-msiof.c:(.text+0x23cd70): undefined reference to `dma_mapping_error'
          spi-sh-msiof.c:(.text+0x23cdca): undefined reference to `dma_unmap_single'
          drivers/built-in.o: In function `sh_msiof_dma_once':
          spi-sh-msiof.c:(.text+0x23d450): undefined reference to `dma_sync_single_for_cpu'
          spi-sh-msiof.c:(.text+0x23d5ea): undefined reference to `dma_sync_single_for_cpu'
      Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      51fd5090
  3. 01 7月, 2014 1 次提交
    • G
      spi: sh-msiof: Add DMA support · b0d0ce8b
      Geert Uytterhoeven 提交于
      Add DMA support to the MSIOF driver using platform data.
      
      As MSIOF DMA is limited to 32-bit words (requiring byte/wordswapping for
      smaller wordsizes), and the group length is limited to 256 words, DMA is
      performed on two fixed pages, allocated and mapped at driver initialization
      time.
      
      Performance figures (in Mbps) on r8a7791/koelsch at different SPI clock
      frequencies for 1024-byte and 4096-byte transfers:
      
                         1024 bytes           4096 bytes
        -  3.25 MHz: PIO  2.1, DMA  2.6 | PIO  2.8, DMA  3.1
        -  6.5  MHz: PIO  3.2, DMA  4.4 | PIO  5.0, DMA  5.9
        - 13    MHz: PIO  4.2, DMA  6.6 | PIO  8.2, DMA 10.7
        - 26    MHz: PIO  5.9, DMA 10.4 | PIO 12.4, DMA 18.4
      
      Note that DMA is only faster than PIO for transfers that exceed the FIFO
      size (typically 64 words / 256 bytes).
      
      Also note that large transfers (larger than the group length for DMA, or
      larger than the FIFO size for PIO), should use cs-gpio (with the
      appropriate pinmux setup), as the hardware chipselect will be deasserted in
      between chunks.
      Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      b0d0ce8b
  4. 22 6月, 2014 1 次提交
    • A
      spi: qup: Remove chip select function · 4a8573ab
      Andy Gross 提交于
      This patch removes the chip select function.  Chip select should instead be
      supported using GPIOs, defining the DT entry "cs-gpios", and letting the SPI
      core assert/deassert the chip select as it sees fit.
      
      The chip select control inside the controller is buggy.  It is supposed to
      automatically assert the chip select based on the activity in the controller,
      but it is buggy and doesn't work at all.  So instead we elect to use GPIOs.
      Signed-off-by: NAndy Gross <agross@codeaurora.org>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      4a8573ab
  5. 21 6月, 2014 5 次提交
  6. 17 6月, 2014 2 次提交
  7. 06 6月, 2014 8 次提交
  8. 02 6月, 2014 17 次提交
  9. 01 6月, 2014 1 次提交
  10. 26 5月, 2014 2 次提交