code cleanup only.
no functional change.
Signed-off-by: NLen Brown <len.brown@intel.com>

CPUID leaf 7 EDX now tells us if the processor has hybrid CPUs
Signed-off-by: NLen Brown <len.brown@intel.com>

When CONFIG_INTEL_UNCORE_FREQ_CONTROL is effective,
(Linux 5.9 and later), print the current (and default)
min and max uncore frequency limits.

When that driver provides the current uncore frequency
(Linux 5.18 and later), print a UncMHz column
reflecting the current uncore frequency.

Note that UncMHz is an instantaneous sample, not an average.

eg.

$ sudo ./turbostat -S --show frequency
...
Uncore Frequency pkg0 die0: 800 - 3900 MHz (800 - 3900 MHz)
...
Avg_MHz	Busy%	Bzy_MHz	TSC_MHz	UncMHz
28	0.70	4049	3095	3900
Signed-off-by: NLen Brown <len.brown@intel.com>

Currently if a fscanf fails then an early return leaks an open
file pointer. Fix this by fclosing the file before the return.
Detected using static analysis with cppcheck:

tools/power/x86/turbostat/turbostat.c:2039:3: error: Resource leak: fp [resourceLeak]

Fixes: eae97e05 ("tools/power turbostat: Support thermal throttle count print")
Signed-off-by: NColin Ian King <colin.i.king@gmail.com>
Acked-by: NChen Yu <yu.c.chen@intel.com>
Reviewed-by: NTom Rix <trix@redhat.com>
Signed-off-by: NLen Brown <len.brown@intel.com>

Using strncmp for a single character comparison is overly complicated,
just use a simpler single character comparison instead. Also stops
static analyzers (such as cppcheck) from complaining about strncmp on
non-null terminated strings.
Signed-off-by: NColin Ian King <colin.i.king@gmail.com>
Signed-off-by: NLen Brown <len.brown@intel.com>

It would be handy to have cmdline in turbostat output. For example,
according to the turbostat output, there are no C-states requested.
In this case the user is very curious if something like
intel_idle.max_cstate=0 was used, or may be idle=none too. It is
also curious whether things like intel_pstate=nohwp were used.

Print the boot command line accordingly:
turbostat version 21.05.04 - Len Brown <lenb@kernel.org>
Kernel command line: BOOT_IMAGE=/boot/vmlinuz-5.16.0+ root=UUID=
 b42359ed-1e05-42eb-8757-6bf2a1c19070 ro quiet splash vt.handoff=7
Suggested-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: NChen Yu <yu.c.chen@intel.com>
Signed-off-by: NLen Brown <len.brown@intel.com>

RaptorLake is compatible with AlderLake.
Signed-off-by: NZhang Rui <rui.zhang@intel.com>
Signed-off-by: NLen Brown <len.brown@intel.com>

Signed-off-by: NLen Brown <len.brown@intel.com>

Signed-off-by: NLen Brown <len.brown@intel.com>

Don't exit if used this way:

sudo setcap cap_sys_nice,cap_sys_rawio=+ep ./turbostat
sudo chmod +r /dev/cpu/*/msr
./turbostat

note: cap_sys_admin is now also needed for the perf IPC counter:
sudo setcap cap_sys_admin,cap_sys_nice,cap_sys_rawio=+ep ./turbostat
Reported-by: NArtem S. Tashkinov <aros@gmx.com>
Reported-by: NToby Broom <tbroom@outlook.com>
Signed-off-by: NLen Brown <len.brown@intel.com>

ICX (and its duplicates) require special hard-coded DRAM RAPL units,
rather than using the generic RAPL energy units.
Reported-by: NSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: NLen Brown <len.brown@intel.com>

The turbostat data is collected by end user for power evaluationit. However
it looks like we are missing enough thermal context there. Already a couple of
time we found that power management developer asking something like this:
grep -r . /sys/devices/system/cpu/cpu*/thermal_throttle/*

Print the per core thermal throttle count so as to get suffificent thermal
context.

turbostat -i 5 -s Core,CPU,CoreThr
Core	CPU	CoreThr
-	-	104
0	0	61
0	4
1	1	0
1	5
2	2	104
2	6
3	3	7
3	7
Suggested-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: NChen Yu <yu.c.chen@intel.com>
Signed-off-by: NLen Brown <len.brown@intel.com>

This gives the ability to reprint the header every N iterations, so you
can ensure that a scrolling display always has the header visible
somewhere on the screen.
Signed-off-by: NZephaniah E. Loss-Cutler-Hull <zephaniah@gmail.com>
Signed-off-by: NLen Brown <len.brown@intel.com>

Currently, there are a number of variables which are displayed by
default, enabled with -e all, and listed by --list, but which you can
not give to --enable/-e.

So you can enable CPU0c1 (in the bic array), but you can't enable C1 or
C1% (not in the bic array, but exists in sysfs).

This runs counter to both the documentation and user expectations, and
it's just not very user friendly.

As such, the mechanism used by --hide has been duplicated, and is now
also used by --enable, so we can handle unknown names gracefully.

Note: One impact of this is that truly unknown fields given to --enable
will no longer generate errors, they will be silently ignored, as --hide
does.
Signed-off-by: NZephaniah E. Loss-Cutler-Hull <zephaniah@gmail.com>
Signed-off-by: NLen Brown <len.brown@intel.com>

Print power values upto three decimal places in watts.
Suggested-by: NTony Luck <tony.luck@intel.com>
Signed-off-by: NSumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Signed-off-by: NLen Brown <len.brown@intel.com>

Add Power Limit4 support.
Signed-off-by: NSumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Acked-by: NZhang Rui <rui.zhang@intel.com>
Signed-off-by: NLen Brown <len.brown@intel.com>

turbostat --Dump exits early with status 243 (-13)

get_counters() calls get_msr_sum() on zen CPUS
for MSR_PKG_ENERGY_STAT, but per_cpu_msr_sum
has not been initialized.
Signed-off-by: NDan Merillat <git@dan.eginity.com>
Signed-off-by: NLen Brown <len.brown@intel.com>

allow invocations such as # turbostat --show power,Busy%

previously the "Busy%" was ignored
Signed-off-by: NLen Brown <len.brown@intel.com>

'MSR_PKG_CST_CONFIG_CONTROL' encodes the deepest allowed package C-state limit,
and turbostat decodes it.

Before this patch: turbostat does not recognize value "3" on Ice Lake Xeon
(ICX) and Sapphire Rapids Xeon (SPR), treats it as "unknown", and does not
display any package C-states in the results table.

After this patch: turbostat recognizes value 3 on ICX and SPR, treats it as
"PC6", and correctly displays package C-states in the results table.
Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>

Signed-off-by: NLen Brown <len.brown@intel.com>

As idle, in particular, can have many columns on some machines...
Make it easy to ignore them all at once.
Signed-off-by: NLen Brown <len.brown@intel.com>

This makes interval mode less likely to see delayed
results on a heavily loaded system.
Signed-off-by: NLen Brown <len.brown@intel.com>

Spring is here...
run a long overdue Lendent on turbostat.c

no functional change
Signed-off-by: NLen Brown <len.brown@intel.com>

There are two TCC activation temeprature.
One is the default TCC activation temperature, also known as TJ_MAX.
Another one is the effective TCC activation temperature, which is the
subtraction of default TCC activation temperature and TCC offset.

The name of variable tcc_activation_temp might be misleading here.
Thus rename tcc_activation_temp to tj_max, and use tcc_default and
tcc_offset to calculate the effective TCC activation temperature.

No functional change in this patch.
Signed-off-by: NZhang Rui <rui.zhang@intel.com>
Signed-off-by: NLen Brown <len.brown@intel.com>

The length of TCC Offset bits varies on different platforms.
Decode TCC Offset bits only for the platforms that we have verified.
For the others, only show default TCC activation temperature.
Signed-off-by: NZhang Rui <rui.zhang@intel.com>
Signed-off-by: NLen Brown <len.brown@intel.com>

CPU model may get changed in intel_model_duplicates() for code reuse.
But there are still some cases we need the original CPU model to handle
minor differences between generations.

Thus save the original CPU model.
Signed-off-by: NZhang Rui <rui.zhang@intel.com>
Signed-off-by: NLen Brown <len.brown@intel.com>

For Atom CPUs that have core cstate deeper than C6,
MSR_CORE_C6_RESIDENCY actually returns the residency for both CC6 and
deeper Core cstates.
Thus, the real Core C6 residency should be the subtraction of
MSR_CORE_C6_RESIDENCY return value and MSR_CORE_C6_RESIDENCY return value.
Signed-off-by: NZhang Rui <rui.zhang@intel.com>
Signed-off-by: NLen Brown <len.brown@intel.com>

C-state pre-wake setting[1] is an optimization for some Intel CPUs to
be woken up from deep C-states in order to reduce latency. According to
the spec, the BIT30 is the C-state Pre-wake Disable. Expose this setting
accordingly.
Sample output from turbostat:
...
cpu51: MSR_IA32_POWER_CTL: 0x1a00a40059 (C1E auto-promotion: DISabled)
C-state Pre-wake: ENabled
cpu51: MSR_TURBO_RATIO_LIMIT: 0x2021212121212224
...

[1] https://intel.github.io/wult/#c-state-pre-wakeSigned-off-by: NChen Yu <yu.c.chen@intel.com>
Signed-off-by: NLen Brown <len.brown@intel.com>

It was found that on Elkhart Lake the TSC frequency is driven by
a separate crystal-clock domain, which is different from the
BCLK domain which includes mperf. This has result in small different
speed thus inconsistence between TSC and the mperf, which caused the
Busy% to be higher than 100%. On this platform it seems that the mperf
runs faster than tsc when the CPU is 100% utilized:
delta tsc(18815473183) < delta mperf(18958403680) for 10 seconds.

To align TSC with mperf, leverage the tsc_tweak mechanism introduced for
cores newer than Skylake, so that TSC and mperf would be calculated in
the same domain.
Reported-by: NZhang Rui <rui.zhang@intel.com>
Signed-off-by: NChen Yu <yu.c.chen@intel.com>
Signed-off-by: NLen Brown <len.brown@intel.com>

Do not mark a comment as kernel-doc notation when it is not
meant to be in kernel-doc notation.
Signed-off-by: NRandy Dunlap <rdunlap@infradead.org>
Signed-off-by: NLen Brown <len.brown@intel.com>

Currently the turbostat treats ICX the same way as SKX and shares the
code among them. But one difference is that ICX does not support Package
C6 Retention, unlike SKX and CLX.

So this patch:

1. Splitting SKX and ICX in turbostat.
2. Removing Package C6 Rentention for ICX.

And after this split, it would be easier to cutomize Ice Lake Server
in turbostat in the future.
Suggested-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: NChen Yu <yu.c.chen@intel.com>
Reviewed-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com>
Tested-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: NLen Brown <len.brown@intel.com>

The idx_to_offset() function returns type int (32-bit signed), but
MSR_PKG_ENERGY_STAT is u32 and would be interpreted as a negative number.
The end result is that it hits the if (offset < 0) check in update_msr_sum()
which prevents the timer callback from updating the stat in the background when
long durations are used. The similar issue exists in offset_to_idx() and
update_msr_sum(). Fix this issue by converting the 'int' to 'off_t' accordingly.

Fixes: 9972d5d8 ("tools/power turbostat: Enable accumulate RAPL display")
Signed-off-by: NCalvin Walton <calvin.walton@kepstin.ca>
Signed-off-by: NLen Brown <len.brown@intel.com>

It was reported that on Zen+ system turbostat started exiting,
which was tracked down to the MSR_PKG_ENERGY_STAT read failing because
offset_to_idx wasn't returning a non-negative index.

This patch combined the modification from Bingsong Si and
Bas Nieuwenhuizen and addd the MSR to the index system as alternative for
MSR_PKG_ENERGY_STATUS.

Fixes: 9972d5d8 ("tools/power turbostat: Enable accumulate RAPL display")
Reported-by: Nyouling257 <youling257@gmail.com>
Tested-by: Nyouling257 <youling257@gmail.com>
Tested-by: NKurt Garloff <kurt@garloff.de>
Tested-by: NBingsong Si <owen.si@ucloud.cn>
Tested-by: NArtem S. Tashkinov <aros@gmx.com>
Co-developed-by: NBingsong Si <owen.si@ucloud.cn>
Co-developed-by: NTerry Bowman <terry.bowman@amd.com>
Signed-off-by: NBas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: NChen Yu <yu.c.chen@intel.com>
Signed-off-by: NLen Brown <len.brown@intel.com>

SKX uses fixed DRAM Energy Unit, just like HSX and BDX.
Signed-off-by: NZhang Rui <rui.zhang@intel.com>
Signed-off-by: NLen Brown <len.brown@intel.com>

This reverts commit 6ff7cb37.

Apparently the TCC offset should not be used to adjust what temperature
we show the user after all.

(on most systems, TCC offset is 0, FWIW)

Fixes: 6ff7cb37Signed-off-by: NLen Brown <len.brown@intel.com>

Ice Lake D is low-end server version of Ice Lake X, reuse
the code accordingly.
Tested-by: NWendy Wang <wendy.wang@intel.com>
Signed-off-by: NChen Yu <yu.c.chen@intel.com>
Signed-off-by: NLen Brown <len.brown@intel.com>

Share the code between Alder Lake Mobile and Alder Lake Desktop.
Signed-off-by: NChen Yu <yu.c.chen@intel.com>
Signed-off-by: NLen Brown <len.brown@intel.com>

(also available via "grep microcode /proc/cpuinfo")
Signed-off-by: NLen Brown <len.brown@intel.com>

Use linux-perf to access the hardware instructions-retired counter.
This is necessary because the counter is not enabled by default,
and also the counter is prone to roll-over -- both of which
perf manages.

It is not necessary to use perf for the cycle counter,
because turbostat already needs to collect delta-aperf
to calcuate frequency.
Signed-off-by: NLen Brown <len.brown@intel.com>