- 12 4月, 2013 21 次提交
-
-
由 Sascha Hauer 提交于
This adds the clock gates and the binding documentation for PATA and SRTC. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
The i.MX6 Quad can be fused as i.MX6 Dual chip, and similarly i.MX6 DualLite can be fused as i.MX6 Solo. The actual number of available cores can be found out from SCU. Since we do not reflect the fusing thing in device tree, the function arm_dt_init_cpu_maps() will always call set_cpu_possible(true) for 4 cores on i.MX6 Quad/Dual and 2 cores for i.MX6 DualLite/Solo. This causes failures when kernel tries to bring those unavailable cores online. For example, the following failure message will be seen when booting an i.MX6 Solo chip. CPU1: failed to come online Though kernel will still boot fine, the message is somehow annoying. Let's get rid of it by calling set_cpu_possible(false) on those unavailable cores. While at it, the set_cpu_possible(true) for available cores is removed, since it's already been done in arm_dt_init_cpu_maps(). Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
The i.MX6 DualLite/Solo is another i.MX6 family SoC, which is highly compatible with i.MX6 Quad/Dual. And that's why we choose to support it using imx6q code with cpu_is_imx6dl() check when necessary. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Gwenhael Goavec-Merou 提交于
mxc_device_init() is mandatory for mxc_aips and mxc_ahb bus registration, needed as parents, at least, for gpio and dma. Signed-off-by: NGwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Fabio Estevam 提交于
Add CONFIG_GPIO_SYSFS as it is helpful for accessing GPIO from userspace. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Fabio Estevam 提交于
Select CONFIG_PERF_EVENTS so that oprofile can be used. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NDirk Behme <dirk.behme@gmail.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Martin Fuzzey 提交于
These two clocks connect to external pins and can be muxed to various internal clocks. They are typically used either for debugging or to provide clocks to external chips (eg audio codecs). Currently only the selectable clocks that already exist in the clock tree have been added. Signed-off-by: NMartin Fuzzey <mfuzzey@parkeon.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Philipp Zabel 提交于
The SRC has auto-deasserting reset bits that control reset lines to the GPU, VPU, IPU, and OpenVG IP modules. This patch adds a reset controller that can be controlled by those devices using the reset controller API. Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Reviewed-by: NStephen Warren <swarren@nvidia.com> Reviewed-by: NMarek Vasut <marex@denx.de> Reviewed-by: NPavel Machek <pavel@ucw.cz> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
Function imx_anatop_get_digprog() that reads register ANADIG_DIGPROG is called to identify silicon version. Users might query silicon version earlier than regmap subsystem is ready. For example, imx6q clock driver query revision in mx6q_clocks_init(), where regmap is not initialized yet. Change imx_anatop_get_digprog() to map anatop block and read ANADIG_DIGPROG in the native way, so that the function can work at very early stage. While at it, let's move imx_print_silicon_rev() back to imx6q_timer_init() to have the message show up a little earlier. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Philipp Zabel 提交于
On i.MX6q revision 1.1 and later, set the video PLL as parent for the LDB clock branch. On revision 1.0, the video PLL is useless due to missing dividers, so keep the default parent (mmdc_ch1_axi). Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Philipp Zabel 提交于
Query silicon revision to determine clock tree and add post dividers for newer revisions. Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Philipp Zabel 提交于
Use imx_clk_mux_flags and imx_clk_divider_flags to set the appropriate flags for the LDB display interface divider and selector clocks. Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Philipp Zabel 提交于
Use imx_clk_mux_flags and imx_clk_divider_flags to set the appropriate flags for the LDB display interface divider and selector clocks. Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Philipp Zabel 提交于
The default is for dividers to set CLK_SET_PARENT_RATE and for muxes to not set that flag. In the LDB clock tree, we need the opposite, so add functions to create divider and mux clocks with configurable flags. Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Philipp Zabel 提交于
So it can be used in clk-imx6q.c for revision dependent clock tree setup. Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Markus Pargmann 提交于
There are some config options not selected by imx27 and imx5 that are necessary to use the cpufreq-cpu0 driver. Signed-off-by: NMarkus Pargmann <mpa@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Philipp Zabel 提交于
This patch adds the missing GPU2D and GPU3D mux and gate clocks, and the graphics arbiter gate clock. Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Fabio Estevam 提交于
Fix the following sparse warnings: arch/arm/mach-imx/anatop.c:56:6: warning: symbol 'imx_anatop_pre_suspend' was not declared. Should it be static? arch/arm/mach-imx/anatop.c:62:6: warning: symbol 'imx_anatop_post_resume' was not declared. Should it be static? arch/arm/mach-imx/anatop.c:68:6: warning: symbol 'imx_anatop_usb_chrg_detect_disable' was not declared. Should it be static? arch/arm/mach-imx/anatop.c:78:5: warning: symbol 'imx_anatop_get_digprog' was not declared. Should it be static? arch/arm/mach-imx/anatop.c:86:13: warning: symbol 'imx_anatop_init' was not declared. Should it be static? Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Anson Huang 提交于
RBC is to control whether some ANATOP sub modules can enter lpm mode when SOC is into STOP mode, if RBC is enabled and PMIC_VSTBY_REQ is set, ANATOP will have below behaviors: 1. Digital LDOs(CORE, SOC and PU) are bypassed; 2. Analog LDOs(1P1, 2P5, 3P0) are disabled; As the 2P5 is necessary for DRAM IO pre-drive in STOP mode, so we need to enable weak 2P5 in STOP mode when 2P5 LDO is disabled. For RBC settings, there are some rules as below due to hardware design: 1. All interrupts must be masked during operating RBC registers; 2. At least 2 CKIL(32K) cycles is needed after the RBC setting is changed. Signed-off-by: NAnson Huang <b20788@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Anson Huang 提交于
Enable periphery charge pump for well biasing at suspend to reduce periphery leakage. Signed-off-by: NAnson Huang <b20788@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Anson Huang 提交于
Anatop module have sereval configurations for user to reduce the power consumption in suspend, provide suspend/resume interface for further use and enable fet_odrive to reduce CORE LDO leakage during suspend. As we have a common anatop file, remove all the operations of anatop module in other files, use anatop interfaces to do that. Signed-off-by: NAnson Huang <b20788@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
- 09 4月, 2013 6 次提交
-
-
由 Paul Bolle 提交于
This removes the unused Kconfig options ARCH_MX5, ARCH_MX51, ARCH_MX53 and MACH_MX21. Signed-off-by: NPaul Bolle <pebolle@tiscali.nl> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Sascha Hauer 提交于
The i.MX53 ahci platform support is unused in mainline. To demotivate people using it just remove it from the tree. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Dirk Behme 提交于
According to the recent i.MX6 Quad technical reference manual, mode 0x4 (100b) of the CCM_CS2DCR register (address 0x020C402C) bits [11-9] and [14-12] select the PLL3 clock, and not the PLL3 PFD1 540M clock. In our code, the PLL3 root clock is named 'pll3_usb_otg', select this instead of the 540M clock. Signed-off-by: NDirk Behme <dirk.behme@de.bosch.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
While booting from device tree, imx6q used to provide twd clock lookup by calling clk_register_clkdev() in clock driver. However, the commit bd603455 (ARM: use device tree to get smp_twd clock) forces DT boot to look up the clock from device tree. It causes the failure below when twd driver tries to get the clock, and hence kernel has to calibrate the local timer frequency. smp_twd: clock not found -2 ... Calibrating local timer... 396.13MHz. Fix the regression by providing twd clock lookup from device tree, and remove the unused twd clk_register_clkdev() call from clock driver. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Markus Pargmann 提交于
The admux clock seems to be the audmux clock as tests show. audmux does not work without this clock enabled. Currently imx35 does not register a clock device for audmux. This patch adds this registration. imx-audmux driver already handles a clock device, so no changes are necessary there. Signed-off-by: NMarkus Pargmann <mpa@pengutronix.de> Cc: stable@vger.kernel.org Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Markus Pargmann 提交于
This patch enables iomuxc_gate clock. It is necessary to be able to reconfigure iomux pads. Without this clock enabled, the clk_disable_unused function will disable this clock and the iomux pads are not configurable anymore. This happens at every boot. After a reboot (watchdog system reset) the clock is not enabled again, so all iomux pad reconfigurations in boot code are without effect. The iomux pads should be always configurable, so this patch always enables it. Signed-off-by: NMarkus Pargmann <mpa@pengutronix.de> Cc: stable@vger.kernel.org Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
- 08 4月, 2013 4 次提交
-
-
由 Will Deacon 提交于
Interrupt handlers are always invoked with interrupts disabled, so remove all uses of the deprecated IRQF_DISABLED flag. Cc: Richard Henderson <rth@twiddle.net> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Reviewed-by: NMatt Turner <mattst88@gmail.com> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NMichael Cree <mcree@orcon.net.nz> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
由 Will Deacon 提交于
Linux has expected that interrupt handlers are executed with local interrupts disabled for a while now, so ensure that this is the case on Alpha even for non-device interrupts such as IPIs. Without this patch, secondary boot results in the following backtrace: warning: at kernel/softirq.c:139 __local_bh_enable+0xb8/0xd0() trace: __local_bh_enable+0xb8/0xd0 irq_enter+0x74/0xa0 scheduler_ipi+0x50/0x100 handle_ipi+0x84/0x260 do_entint+0x1ac/0x2e0 irq_exit+0x60/0xa0 handle_irq+0x98/0x100 do_entint+0x2c8/0x2e0 ret_from_sys_call+0x0/0x10 load_balance+0x3e4/0x870 cpu_idle+0x24/0x80 rcu_eqs_enter_common.isra.38+0x0/0x120 cpu_idle+0x40/0x80 rest_init+0xc0/0xe0 _stext+0x1c/0x20 A similar dump occurs if you try to reboot using magic-sysrq. Cc: Richard Henderson <rth@twiddle.net> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Matt Turner <mattst88@gmail.com> Reviewed-by: NMatt Turner <mattst88@gmail.com> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NMichael Cree <mcree@orcon.net.nz> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
由 Will Deacon 提交于
Due to all of the goodness being packed into today's kernels, the resulting image isn't as slim as it once was. In light of this, don't pass -msmall-data to gcc, which otherwise results in link failures due to impossible relocations when compiling anything but the most trivial configurations. Cc: Richard Henderson <rth@twiddle.net> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Reviewed-by: NMatt Turner <mattst88@gmail.com> Tested-by: NThorsten Kranzkowski <dl8bcu@dl8bcu.de> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NMichael Cree <mcree@orcon.net.nz> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
由 Jay Estabrook 提交于
Fixes a NULL pointer dereference at boot on UP1500. Cc: stable@vger.kernel.org Reviewed-and-Tested-by: NMatt Turner <mattst88@gmail.com> Signed-off-by: NJay Estabrook <jay.estabrook@gmail.com> Signed-off-by: NMatt Turner <mattst88@gmail.com> Signed-off-by: NMichael Cree <mcree@orcon.net.nz> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
- 07 4月, 2013 1 次提交
-
-
由 Andrew Honig 提交于
This patch adds support for kvm_gfn_to_hva_cache_init functions for reads and writes that will cross a page. If the range falls within the same memslot, then this will be a fast operation. If the range is split between two memslots, then the slower kvm_read_guest and kvm_write_guest are used. Tested: Test against kvm_clock unit tests. Signed-off-by: NAndrew Honig <ahonig@google.com> Signed-off-by: NGleb Natapov <gleb@redhat.com>
-
- 06 4月, 2013 1 次提交
-
-
由 Jan Beulich 提交于
eboot.o and efi_stub_$(BITS).o didn't get added to "targets", and hence their .cmd files don't get included by the build machinery, leading to the files always getting rebuilt. Rather than adding the two files individually, take the opportunity and add $(VMLINUX_OBJS) to "targets" instead, thus allowing the assignment at the top of the file to be shrunk quite a bit. At the same time, remove a pointless flags override line - the variable assigned to was misspelled anyway, and the options added are meaningless for assembly sources. [ hpa: the patch is not minimal, but I am taking it for -urgent anyway since the excess impact of the patch seems to be small enough. ] Signed-off-by: NJan Beulich <jbeulich@suse.com> Link: http://lkml.kernel.org/r/515C5D2502000078000CA6AD@nat28.tlf.novell.com Cc: Matthew Garrett <mjg@redhat.com> Cc: Matt Fleming <matt.fleming@intel.com> Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
-
- 05 4月, 2013 6 次提交
-
-
由 Ralf Baechle 提交于
SA_RESTORER used to be defined as 0x04000000 but only the O32 ABI ever supported its use and no libc was using it, so the entire sa-restorer functionality was removed with lmo commit 39bffc12c3580ab [Zap sa_restorer.] for 2.5.48 retaining only the SA_RESTORER definition as a reminder to avoid accidental reuse of the mask bit. Upstream cdef9602fbf1871a43f0f1b5cea10dd0f275167d [signal: always clear sa_restorer on execve] adds code that assumes sa_sigaction has an sa_restorer field, if SA_RESTORER is defined which would break MIPS. So remove the SA_RESTORER definition before the v3.8.4 merge. Signed-off-by: NRalf Baechle <ralf@linux-mips.org> (cherry picked from commit 17da8d63add23830892ac4dc2cbb3b5d4ffb79a8)
-
由 Deng-Cheng Zhu 提交于
The commit a96102be introduced set_isa() where compatible ISA info is also set aside from the one gets passed in. It means, for example, 1004K will have MIPS_CPU_ISA_M32R2/M32R1/II/I flags. This leads to things like the following inappropriate: if (c->isa_level == MIPS_CPU_ISA_M32R1 || c->isa_level == MIPS_CPU_ISA_M32R2 || c->isa_level == MIPS_CPU_ISA_M64R1 || c->isa_level == MIPS_CPU_ISA_M64R2) This patch fixes it. Signed-off-by: NDeng-Cheng Zhu <dengcheng.zhu@imgtec.com> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 EunBong Song 提交于
Singed-off-by: NEunBong Song <eunb.song@samsung.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Paul Bolle 提交于
CONFIG_SNIPROM was renamed to CONFIG_FW_SNIPROM in v3.8. Let's rename SNIPROM itself too. Signed-off-by: NPaul Bolle <pebolle@tiscali.nl> Cc: linux-mips@linux-mips.org; Cc: linux-kernel@vger.kernel.org Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Paul Bolle 提交于
Commit 7517de34 ("MIPS: Alchemy: Redo PCI as platform driver") added a reference to CONFIG_DEBUG_PCI. Change it to CONFIG_PCI_DEBUG, as that is a valid Kconfig macro. Also add a newline to a debugging printk that this fix enables. Signed-off-by: NPaul Bolle <pebolle@tiscali.nl> Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 David Daney 提交于
Commit 58b69401 [MIPS: Function tracer: Fix broken function tracing] completely broke the function tracer for 64-bit kernels. The symptom is a system hang very early in the boot process. The fix: Remove/fix $sp adjustments for 64-bit case. Signed-off-by: NDavid Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: Al Cooper <alcooperx@gmail.com> Cc: viric@viric.name Cc: stable@vger.kernel.org # 3.8.x Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
- 03 4月, 2013 1 次提交
-
-
由 Paul Bolle 提交于
CONFIG_LPAE doesn't exist: the correct option is CONFIG_ARM_LPAE, so fix up the two typos under arch/arm/. The fix to head.S is slightly scary, but this is just for setting up an early io-mapping for the serial port when running on a big-endian, LPAE system. Since these systems don't exist in the wild (at least, I have no access to one outside of kvmtool, which doesn't provide a serial port suitable for earlyprintk), then we can revisit the code later if it causes any problems. Signed-off-by: NPaul Bolle <pebolle@tiscali.nl> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-