- 25 1月, 2019 23 次提交
-
-
由 Bjorn Andersson 提交于
BLSP1 UART2 is used as debug uart on the EVB development board, define pinmux state for the UART in the platform dtsi and pinconf state for it in the board dts. Reviewed-by: NVinod Koul <vkoul@kernel.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
-
由 Bjorn Andersson 提交于
Fix up the lpasscc address and size, missed during the conversion to address- and size-cells of 2. Reviewed-by: NDouglas Anderson <dianders@chromium.org> Reported-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
-
由 Sai Prakash Ranjan 提交于
Remove the duplicate inclusion of qcom,gcc-sdm845.h mistakenly introduced by commit 6e17f814 ("arm64: dts: sdm845: add prng-ee node"). Reviewed-by: NDouglas Anderson <dianders@chromium.org> Signed-off-by: NSai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> [bjorn: Also fix sort order of lpasscc include, while we're there] Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
-
由 Sibi Sankar 提交于
Add reserve-memory nodes for mpss and mba required for remoteproc mss pil. Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: NDouglas Anderson <dianders@chromium.org> Signed-off-by: NSibi Sankar <sibis@codeaurora.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
-
由 Evan Green 提交于
Add the gpio-ranges property to the TLMM node so that GPIO hogs work. Reviewed-by: NStephen Boyd <swboyd@chromium.org> Signed-off-by: NEvan Green <evgreen@chromium.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
-
由 Bjorn Andersson 提交于
For devices attached to an IOMMU, translation between IOVA and physical addresses is no longer 1:1 and dma-ranges should be specified to describe the available IOVA address space. On SDM845 the busses are implemented with 36 address bits, so dma-ranges must be defined to reduce the size of the IOVA address space from the 48 bits supported by the SMMU. Without this DMA allocations may end up with IOVAs outside the valid range, that gets truncated by the bus between the device and its translation unit. Also extend ranges to describe the available address space. Tested-by: NDouglas Anderson <dianders@chromium.org> Reviewed-by: NDouglas Anderson <dianders@chromium.org> Reviewed-by: NStephen Boyd <swboyd@chromium.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
-
由 Bjorn Andersson 提交于
The busses on SDM845 provides 36 address bits, extend the address and size cells to make it possible to describe this in "ranges" and "dma-ranges". While touching all reg properties, addresses are padded to 8 digits. Tested-by: NDouglas Anderson <dianders@chromium.org> Reviewed-by: NDouglas Anderson <dianders@chromium.org> Reviewed-by: NStephen Boyd <swboyd@chromium.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
-
由 Rajendra Nayak 提交于
Add the DT node for the rpmhpd powercontroller. Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Reviewed-by: NStephen Boyd <swboyd@chromium.org> Signed-off-by: NRajendra Nayak <rnayak@codeaurora.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
-
由 Rajendra Nayak 提交于
Add rpmpd device node and its OPP table Reviewed-by: NUlf Hansson <ulf.hansson@linaro.org> Reviewed-by: NStephen Boyd <swboyd@chromium.org> Signed-off-by: NRajendra Nayak <rnayak@codeaurora.org> Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
-
由 Govind Singh 提交于
Add device node for the ath10k SNOC platform driver probe and add resources required for WCN3990 on SDM845 soc. Reviewed-by: NBrian Norris <briannorris@chromium.org> Tested-by: NBrian Norris <briannorris@chromium.org> Signed-off-by: NGovind Singh <govinds@codeaurora.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
-
由 Sibi Sankar 提交于
This patch adds the node to support PDC Global reset driver on SDM845 SoCs Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NSibi Sankar <sibis@codeaurora.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
-
由 Sibi Sankar 提交于
Add SCM DT node to enable SCM functionality on SDM845. Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NSibi Sankar <sibis@codeaurora.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
-
由 Manu Gautam 提交于
Correct address for pcs_misc register region of USB3 QMP UNI PHY. These registers are used during runtime-suspend/resume routines of phy. Reviewed-by: NDouglas Anderson <dianders@chromium.org> Fixes: ca4db2b5 ("arm64: dts: qcom: sdm845: Add USB-related nodes") Signed-off-by: NManu Gautam <mgautam@codeaurora.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
-
由 Taniya Das 提交于
This adds the low pass audio clock controller node to sdm845 based on the example in the bindings. Reviewed-by: NDouglas Anderson <dianders@chromium.org> Signed-off-by: NTaniya Das <tdas@codeaurora.org> [bjorn: Disabled lpasscc node, as it's normally protected] Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
-
由 Taniya Das 提交于
This adds the video clock controller node to sdm845 based on the examples in the bindings. Signed-off-by: NTaniya Das <tdas@codeaurora.org> Signed-off-by: NDouglas Anderson <dianders@chromium.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
-
由 Douglas Anderson 提交于
Add the GPU clock controller nodes as per the example. Signed-off-by: NDouglas Anderson <dianders@chromium.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
-
由 Douglas Anderson 提交于
This adds the Quad SPI controller to the main sdm845 device tree file. Boards will be expected to assign the proper pinctrl depending on how many chip selects they have hooked up and how many data lines. This depends on commit 48735597 ("clk: qcom: Add qspi (Quad SPI) clock defines for sdm845 to header") to add the needed defines. It also shouldn't land until the patch ("dt-bindings: spi: Qualcomm Quad SPI(QSPI) documentation") [1] lands. [1] https://lkml.kernel.org/r/20181002214709.162330-1-ryandcase@chromium.orgReviewed-by: NStephen Boyd <swboyd@chromium.org> Signed-off-by: NDouglas Anderson <dianders@chromium.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
-
由 Jeffrey Hugo 提交于
msm8998 has a dozen i2c controllers which can be used to connect to board specific peripherals. Enumerate the controllers so that boards can wire up as needed. Signed-off-by: NJeffrey Hugo <jhugo@codeaurora.org> [bjorn: Renumbered labels on BLSP2 nodes] Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
-
由 Jeffrey Hugo 提交于
l21 is used as sdcard vmmc, and needs the load increased to prevent voltage drop issues with some sdcards. This addresses -84 errors seen during sdcard init with SDR104 cards. Signed-off-by: NJeffrey Hugo <jhugo@codeaurora.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
-
由 Andy Gross 提交于
-
由 Andy Gross 提交于
Qualcomm ARM64 Fixes for 5.0-rc3 * Fix irq controller compatible for the MSM8996 platforms
-
由 Jeykumar Sankaran 提交于
DPU is short for the Display Processing Unit. It is the display controller on Qualcomm SDM845 chips. This change adds MDSS and DSI nodes to enable display on the target device. Changes in v2: - Beefed up commit message - Use SoC specific compatibles for mdss and dpu (Rob H) - Use assigned-clocks to set initial clock frequency(Rob H) Changes in v3: - added IOMMU node - Fix device naming (remove _phys) - Use correct IRQ_TYPE in interrupt specifiers Changes in v4: - move mdss node to preserve the unit address sort order - remove _clk suffix from dsi clocks (both the comments are from Doug Anderson) Changes in v5: - Keep the device status "disabled" by default (Bjorn Andersson) - Use MDSS_GDSC macro (Jordan) - Fix phy-names (Jordan) - List reg ranges in numerical order (Jordan) Changes in v6: - Separating this patch out of the series - fix phy-names Signed-off-by: NJeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: NSean Paul <seanpaul@chromium.org> Reviewed-by: NDouglas Anderson <dianders@chromium.org> Tested-by: NDouglas Anderson <dianders@chromium.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
-
由 Srinivas Kandagatla 提交于
Add compatible to gicv3 node to enable quirk required to restrict writing to GICR_WAKER register which is restricted on msm8996 SoC in Hypervisor. With this quirk MSM8996 can at least boot out of mainline, which can help community to work with boards based on MSM8996. Without this patch Qualcomm DB820c board reboots on mainline. Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
-
- 14 1月, 2019 13 次提交
-
-
由 Loic Poulain 提交于
Add watchdog child node to the PM8916 PON device. Signed-off-by: NLoic Poulain <loic.poulain@linaro.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
-
由 Jakob Wuhrer 提交于
gpiio5 is missspelt in msm8996-pins.dtsi, fix that. Signed-off-by: NJakob Wuhrer <jakobwuhrer@airmail.cc> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
-
由 Loic Poulain 提交于
In the same way as for msm8974-hammerhead, l11 load, used for SDCARD VMMC, needs to be increased in order to prevent any voltage drop issues (due to limited current) happening with some SDCARDS or during specific operations (e.g. write). Tested on Dragonboard-410c and DART-SD410 boards. Fixes: 4c7d53d1 (arm64: dts: apq8016-sbc: add regulators support) Reported-by: NManabu Igusa <migusa@arrowjapan.com> Signed-off-by: NLoic Poulain <loic.poulain@linaro.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
-
由 Amit Kucheria 提交于
The PMS405 PMIC has an ADC that exposes the on-die temperature that we wire up to spmi-temp-alarm thermal driver. This allows the PMIC temperature to be exposed to Linux through the thermal framework. Signed-off-by: NAmit Kucheria <amit.kucheria@linaro.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
-
由 Govind Singh 提交于
Add device node for the ath10k SNOC platform driver probe and add resources required for WCN3990 on qcs404 soc. Optional clock and regulator controls are not yet available in upstream, hence add them once available. Reviewed-by: NVinod Koul <vkoul@kernel.org> Signed-off-by: NGovind Singh <govinds@codeaurora.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
-
由 Jorge Ramirez-Ortiz 提交于
The controller can support EXT_CSD_CARD_TYPE_HS400_1_8V cards. Signed-off-by: NJorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
-
由 Taniya Das 提交于
This change adds the cpufreq node as per the bindings example for SDM845. Reviewed-by: NMatthias Kaehlcke <mka@chromium.org> Signed-off-by: NTaniya Das <tdas@codeaurora.org> Tested-by: NMatthias Kaehlcke <mka@chromium.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
-
由 Evan Green 提交于
Add the second lane registers for the USB PHY, now that the QMP phy bindings have been updated. This way the driver can stop reaching beyond its register region to get at the second lane. Reviewed-by: NDouglas Anderson <dianders@chromium.org> Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NEvan Green <evgreen@chromium.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
-
由 Can Guo 提交于
Enable the UFS host controller and PHY on sdm845-mtp. Reviewed-by: NVivek Gautam <vivek.gautam@codeaurora.org> Reviewed-by: NDouglas Anderson <dianders@chromium.org> Signed-off-by: NCan Guo <cang@codeaurora.org> Signed-off-by: NEvan Green <evgreen@chromium.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
-
由 Evan Green 提交于
Add the UFS controller and PHY to SDM845. Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NEvan Green <evgreen@chromium.org> Signed-off-by: NDouglas Anderson <dianders@chromium.org> [bjorn: Add iommu context for the host controller] Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
-
由 Vivek Gautam 提交于
Add device node for arm,mmu-500 available on sdm845. This MMU-500 with single TCU and multiple TBU architecture is shared among all the peripherals except gpu. Signed-off-by: NVivek Gautam <vivek.gautam@codeaurora.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
-
由 Evan Green 提交于
Enable support for one of the micro SD slots on the MTP. Reviewed-by: NDouglas Anderson <dianders@chromium.org> Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NEvan Green <evgreen@chromium.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
-
由 Evan Green 提交于
Add one of the two SD controllers to SDM845. Reviewed-by: NDouglas Anderson <dianders@chromium.org> Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NEvan Green <evgreen@chromium.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
-
- 07 1月, 2019 4 次提交
-
-
由 Linus Torvalds 提交于
-
git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild由 Linus Torvalds 提交于
Pull more Kbuild updates from Masahiro Yamada: - improve boolinit.cocci and use_after_iter.cocci semantic patches - fix alignment for kallsyms - move 'asm goto' compiler test to Kconfig and clean up jump_label CONFIG option - generate asm-generic wrappers automatically if arch does not implement mandatory UAPI headers - remove redundant generic-y defines - misc cleanups * tag 'kbuild-v4.21-3' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild: kconfig: rename generated .*conf-cfg to *conf-cfg kbuild: remove unnecessary stubs for archheader and archscripts kbuild: use assignment instead of define ... endef for filechk_* rules arch: remove redundant UAPI generic-y defines kbuild: generate asm-generic wrappers if mandatory headers are missing arch: remove stale comments "UAPI Header export list" riscv: remove redundant kernel-space generic-y kbuild: change filechk to surround the given command with { } kbuild: remove redundant target cleaning on failure kbuild: clean up rule_dtc_dt_yaml kbuild: remove UIMAGE_IN and UIMAGE_OUT jump_label: move 'asm goto' support test to Kconfig kallsyms: lower alignment on ARM scripts: coccinelle: boolinit: drop warnings on named constants scripts: coccinelle: check for redeclaration kconfig: remove unused "file" field of yylval union nds32: remove redundant kernel-space generic-y nios2: remove unneeded HAS_DMA define
-
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip由 Linus Torvalds 提交于
Pull perf tooling updates form Ingo Molnar: "A final batch of perf tooling changes: mostly fixes and small improvements" * 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (29 commits) perf session: Add comment for perf_session__register_idle_thread() perf thread-stack: Fix thread stack processing for the idle task perf thread-stack: Allocate an array of thread stacks perf thread-stack: Factor out thread_stack__init() perf thread-stack: Allow for a thread stack array perf thread-stack: Avoid direct reference to the thread's stack perf thread-stack: Tidy thread_stack__bottom() usage perf thread-stack: Simplify some code in thread_stack__process() tools gpio: Allow overriding CFLAGS tools power turbostat: Override CFLAGS assignments and add LDFLAGS to build command tools thermal tmon: Allow overriding CFLAGS assignments tools power x86_energy_perf_policy: Override CFLAGS assignments and add LDFLAGS to build command perf c2c: Increase the HITM ratio limit for displayed cachelines perf c2c: Change the default coalesce setup perf trace beauty ioctl: Beautify USBDEVFS_ commands perf trace beauty: Export function to get the files for a thread perf trace: Wire up ioctl's USBDEBFS_ cmd table generator perf beauty ioctl: Add generator for USBDEVFS_ ioctl commands tools headers uapi: Grab a copy of usbdevice_fs.h perf trace: Store the major number for a file when storing its pathname ...
-
由 Linus Torvalds 提交于
The semantics of what "in core" means for the mincore() system call are somewhat unclear, but Linux has always (since 2.3.52, which is when mincore() was initially done) treated it as "page is available in page cache" rather than "page is mapped in the mapping". The problem with that traditional semantic is that it exposes a lot of system cache state that it really probably shouldn't, and that users shouldn't really even care about. So let's try to avoid that information leak by simply changing the semantics to be that mincore() counts actual mapped pages, not pages that might be cheaply mapped if they were faulted (note the "might be" part of the old semantics: being in the cache doesn't actually guarantee that you can access them without IO anyway, since things like network filesystems may have to revalidate the cache before use). In many ways the old semantics were somewhat insane even aside from the information leak issue. From the very beginning (and that beginning is a long time ago: 2.3.52 was released in March 2000, I think), the code had a comment saying Later we can get more picky about what "in core" means precisely. and this is that "later". Admittedly it is much later than is really comfortable. NOTE! This is a real semantic change, and it is for example known to change the output of "fincore", since that program literally does a mmmap without populating it, and then doing "mincore()" on that mapping that doesn't actually have any pages in it. I'm hoping that nobody actually has any workflow that cares, and the info leak is real. We may have to do something different if it turns out that people have valid reasons to want the old semantics, and if we can limit the information leak sanely. Cc: Kevin Easton <kevin@guarana.org> Cc: Jiri Kosina <jikos@kernel.org> Cc: Masatake YAMATO <yamato@redhat.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Greg KH <gregkh@linuxfoundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Michal Hocko <mhocko@suse.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-