Signed-off-by: NRobin Getz <rgetz@blackfin.uclinux.org>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NRobin Getz <rgetz@blackfin.uclinux.org>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NRobin Getz <rgetz@blackfin.uclinux.org>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

merge more of the bf54x and !bf54x gpio code together to
cut down on #ifdef mess
Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NJie Zhang <jie.zhang@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

According to the documentation gpio_free should only be called from task
context only.  To make this more explicit add a might sleep to all
implementations.

This patch changes the gpio_free implementations for the blackfin
architecture.
Signed-off-by: NUwe Kleine-Koenig <ukleinek@strlen.de>
Cc: David Brownell <david-b@pacbell.net>
Acked-by: NBryan Wu <cooloney@kernel.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>

Make sure we don't accidently re-enable interrupts if we are being
called in atomic context
Signed-off-by: NRobin Getz <rgetz@blackfin.uclinux.org>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NRobin Getz <rgetz@blackfin.uclinux.org>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

when requesting a GPIO for the first time, the POLAR setting is not
set to a sane state.  this can lead to indeterminate behavior that
cannot be resolved without an explicit write to the Blackfin port POLAR
register.

when requesting a GPIO for the first time via gpio_request(), the POLAR
setting for the GPIO in question should be set to sane state.  this
should occur if the GPIO has not been allocated in any other way.

some examples:
 - when doing something like "request_irq(); gpio_request();" on the
   same GPIO, the POLAR setting should not be reset.
 - when doing "gpio_request(); gpio_request();" on the same GPIO, the
   POLAR setting should be reset only the first time and not the second.
Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Blackfin arch: Fix Bug - request lines with peripheral_request_list, but don't get freed with peripheral_free_list

Remove erroneous check_gpio(ident) in peripheral_free()
Reported-by: NMichael McTernan <mmcternan@airvana.com>
Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

On BF561 EBIU_SDGCTL bit 31 controls the SDRAM external data
path width, typically set 0 for a 32-bit bus width. On other
Blackfin derivatives this bit should be set by default.
Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Dmacopy failed in BF537-STAMP when copy from SRAM to SDRAM and kernel
will reboot automatically.

Fixing by doing a SSYNC before mucking with DMA registers
Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

This patch adds a MX2/MX3 specific SDHC driver. The hardware is basically
the same as in the MX1, but unlike the MX1 controller the MX2
controller just works as expected. Since the MX1 driver has more
workarounds for bugs than anything else I had no success with supporting
MX1 and MX2 in a sane way in one driver.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Recently, a patch left DEBUG enabled in the powerpc common PCI code,
resulting in an old bug in a pr_debug() statement to show up and cause
a NULL dereference on some machines.

This fixes the pr_debug() statement and reverts to DEBUG not being
force-enabled in that file.
Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>

"flash" is a very generic name for a platform_driver that is only
available on SA11x0.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Nicolas Pitre <nico@marvell.com>

Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

SPIN_LOCK_UNLOCKED is deprecated as lockdep cannot properly work with
locks initialized with it.

This fix is necessary to compile the linux-rt tree for ARM.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Steven Rostedt <srostedt@redhat.com>

Impact: fix potential miscompile (currently believed non-manifest)

As the comment explains, the VBE DDC call can clobber any register.
Tell the compiler about that fact.
Signed-off-by: NAndreas Schwab <schwab@suse.de>
Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
Signed-off-by: NIngo Molnar <mingo@elte.hu>

In Linus' current -git the cpumask member is now a pointer.
Signed-off-by: NManuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This kernel symbol provides a way for drivers to switch on alternate
function for a certain GPIO pin. Turning it off is done implicitly when
changing the GPIO direction, as that would be fixed when using the given
pin als alternate function.
Signed-off-by: NPhil Sutter <n0-1@freewrt.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Remove the {set,get}_434_reg() prototypes, as the functions have been
removed. Also move the prototypes for {get,set}_latch_u5() to the correct
place.
Signed-off-by: NPhil Sutter <n0-1@freewrt.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

As rb532_dev3_ctl_res is not used by any platform device, it can be dropped
when not used for holding the physical address of the device 3 controller.

Also a size of one byte should suffice when ioremapping the physical
address mentioned above, as only a single byte is being read from and
written to it.
Signed-off-by: NPhil Sutter <n0-1@freewrt.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

These kernel symbols are unused. Also, since dev3 init has been moved to
devices.c, set_434_reg() breaks compiling as it uses dev3.
Signed-off-by: NPhil Sutter <n0-1@freewrt.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This code doesn't belong to gpio.c, as it's completely unrelated to
GPIO. As dev1 and dev2 init code is in devices.c, it seems to be a more
adequate place.
Signed-off-by: NPhil Sutter <n0-1@freewrt.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The data to be written is just a byte, so use writeb instead of writel.
Also, dev3.base contains the address, not the data so referencing here
is wrong.
Signed-off-by: NPhil Sutter <n0-1@freewrt.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This register just contains the address of the actual resource, so
initialisation has to be the same as cf_slot0_res and nand_slot0_res.
Signed-off-by: NPhil Sutter <n0-1@freewrt.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

As the korina ethernet driver uses platform_get_drvdata() to extract the
driver specific data from the platform device, driver_data has to be
used here.
Signed-off-by: NPhil Sutter <n0-1@freewrt.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Auto-detection works just fine, so use it instead of specifying the type
manually. Also define a platform device for the uart, as suggested by
David Daney.
Signed-off-by: NPhil Sutter <n0-1@freewrt.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

As the pata-rb532-cf driver calls gpio_direction_input(), the calls to
rb532_gpio_set_func() and rb532_gpio_direction_input() are not needed since
the alternate function is automatically being disabled when changing the
GPIO pin direction.
The later two calls to rb532_gpio_set_{ilevel,istat}() are implicitly being
done by the IRQ initialisation of pata-rb532-cf.
Signed-off-by: NPhil Sutter <n0-1@freewrt.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

When a driver calls gpio_set_direction_{input,output}(), it obviously
doesn't want the alternate function for that pin to be active (as the
direction would not matter in that case). This patch ensures alternate
function is disabled when the direction is being changed.
Signed-off-by: NPhil Sutter <n0-1@freewrt.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Interrupt Group 4 mapps the GPIO pins enabled as interrupt sources;
add defines to make this clear when addressing them later in code.

The mapped GPIOs support triggering on either level high or low. To
achieve this, the set_type() function calls rb532_gpio_set_ilevel() for
interrupts of the above mentioned group.

As there is no way to alter the triggering characteristics of the other
interrupts, accept level triggering on status high only. (This is just a
guess; but as the system boots fine and interrupt-driven devices (e.g.
serial console) work with no implications, it seems to be right.)

To clear a GPIO mapped IRQ, the source has to be cleared (i.e., the
interrupt status bit of the corresponding GPIO pin). This is done inside
rb532_disable_irq().

After applying these changes I could undo most of my former "fixes" to
pata-rb532-cf. Particularly all interrupt handling can be done
generically via set_irq_type() as it was before.
Signed-off-by: NPhil Sutter <n0-1@freewrt.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The code is rather based on trial-and-error than knowledge. Verified Via
Rhine functionality in PIO as well as MMIO mode.

[Looks sane -- Ralf]
Signed-off-by: NPhil Sutter <n0-1@freewrt.org>
Tested-by: NFlorian Fainelli <florian@openwrt.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The algorithm works unconditionally. If bitval is one, the first line is
a no op and the second line sets the bit at offset position. Vice versa,
if bitval is zero, the first line clears the bit at offset position and
the second line is a no op.
Signed-off-by: NPhil Sutter <n0-1@freewrt.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The previous definition inadvertently omits Octeon which currently is
treated as an architecture variant separate from MIPS32 and MIPS64.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

If a context switch occurred between the watch exception and reading the
watch registers, it would be possible for the new process to corrupt their
state.  Enabling interrupts only after the watch registers are read avoids
this race.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This fixes the ptrace ABI for watch registers, and should allow 64bit
kernels to use the watch register support.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>