Enable a few core config options to be able to boot SDM845 MTP.

The GCC, PINCTRL and GENI options are required to be able to boot to a
console. Several clocks from GCC are parented by the "bi_tcxo" clock
from the RPMH clock driver, so enable this to save others the time to
debug the missing parent clocks later. RPMH depends on the COMMAND_DB.
While we're enabling the others let's do RPMH regulators as well, as
everything beyond this point depends on that.
Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

Enable remoteproc configs to boot the remoteprocs on QC chipsets. These
are common configs and not specific to a specific SoC so should be enabled
across the board.
Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NVinod Koul <vkoul@kernel.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

Enable GCC and pin control configs to make it possible to boot the
QCS404 EVBs.
Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NVinod Koul <vkoul@kernel.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

The arm64 port now runs on servers which use IPMI. This patch enables
relevant core configs to save manually enabling them when testing
mainline.
Signed-off-by: NJohn Garry <john.garry@huawei.com>
[olof: Switched to =m instead of =y]
Signed-off-by: NOlof Johansson <olof@lixom.net>

Enabling CONFIG_SERIAL_8250_OMAP that is used by TI's
AM6 SoC.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Acked-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Enable TI System Control Interface (TI_SCI) Message Protocol library
and it's relevant power management drivers using this library.

TI's AM6 SoC uses this TI_SCI library to communicate to its system
controller(DMSC). While at it, enable TI_MESSAGE_MANAGER mailbox driver
using which this communication happens.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Acked-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Enable the UniPhier SD controller driver.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Enable the USB3 and USB2 phys implemented in UniPhier SoCs.
These phys are necessary for dwc3 and ehci controllers driving
the USB ports on arm64 UniPhier SoCs.

Since the USB host drivers are already built-in, so only the phy
driver are missing to allow booting with USB devices.
Signed-off-by: NKunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

The rk3228 and rk3328 socs use an MMIO-connected hdmi-phy from Innosilicon.
So enable the necessary driver as module.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>

PCIe features like AER, Hotplug, PME, DPC depend on PCIEPORTBUS,
so enable PCIEPORTBUS as default.
Signed-off-by: NDongdong Liu <liudongdong3@huawei.com>
Signed-off-by: NWei Xu <xuwei5@hisilicon.com>

Signed-off-by: NZhou Wang <wangzhou1@hisilicon.com>
Signed-off-by: NWei Xu <xuwei5@hisilicon.com>

Enable CAAM (Cryptographic Accelerator and Assurance Module) driver
for QorIQ Data Path Acceleration Architecture (DPAA) v2.
It handles DPSECI (Data Path SEC Interface) DPAA2 objects that sit
on the Management Complex (MC) fsl-mc bus.
Signed-off-by: NHoria Geantă <horia.geanta@nxp.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

Enable the Renesas RZ/G2E (R8A774C0) SoC in the ARM64 defconfig.
Signed-off-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: NBiju Das <biju.das@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

The QRTR packet family is used for a wide range of communication between
services in Qualcomm platforms. Examples of services using this
transport for communication are remoteproc management, modem control,
positioning, power management and WiFi.
Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

Enable DRM Support for Allwinner Display Engine, built as a module.
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

Now that the scalar fallbacks have been moved out of this driver into
the core crc32()/crc32c() routines, we are left with a CRC32 crypto API
driver for arm64 that is based only on 64x64 polynomial multiplication,
which is an optional instruction in the ARMv8 architecture, and is less
and less likely to be available on cores that do not also implement the
CRC32 instructions, given that those are mandatory in the architecture
as of ARMv8.1.

Since the scalar instructions do not require the special handling that
SIMD instructions do, and since they turn out to be considerably faster
on some cores (Cortex-A53) as well, there is really no point in keeping
this code around so let's just remove it.
Signed-off-by: NArd Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

Enable K3 SoC platform for TI's AM6 SoC.
Signed-off-by: NNishanth Menon <nm@ti.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Enable the Renesas RZ/G2M (R8A774A1) SoC in the ARM64 defconfig.
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Enable the Rockchip sound driver with MAX98357A/RT5514/DA7219 codecs,
Infineon TPM security chip (compliant with TCG TIS 1.2 TPM specification),
vctrl regulators for dynamic CPU voltages, UVC camera support and SBS-
compliant gas gauges needed for the Samsung Chromebook Plus.
Signed-off-by: NEnric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>

QCOM IPQ8074 boards contain NAND flash memory for which
this config needs to be enabled.
Signed-off-by: NAbhishek Sahu <absahu@codeaurora.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

Signed-off-by: NLi Wei <liwei213@huawei.com>
Signed-off-by: NZhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: NGuodong Xu <guodong.xu@linaro.org>
Tested-by: NJohn Stultz <john.stultz@linaro.org>
Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>

Signed-off-by: NZhou Wang <wangzhou1@hisilicon.com>
Signed-off-by: NWei Xu <xuwei5@hisilicon.com>

Enable the SP805 watchdog timer
Signed-off-by: NRay Jui <ray.jui@broadcom.com>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>

The cros-ec I2C and SPI transport drivers have been moved from MFD
subsystem to platform/chrome, at the same time, the config symbol has
been renamed and lost the MFD_ prefix, so update all configs to the new
config symbol name.
Signed-off-by: NEnric Balletbo i Serra <enric.balletbo@collabora.com>
Acked-by: NKrzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: NGuenter Roeck <groeck@chromium.org>
Signed-off-by: NBenson Leung <bleung@chromium.org>

The defconfig has drifted over time, as Kconfig entries have changed order
or default values. Several maintainers ended up running 'savedefconfig'
themselves which caused a cascade of conflicts. Let's do it once and
for all in our tree before -rc2 instead.
Signed-off-by: NOlof Johansson <olof@lixom.net>

The patch enables the hwmon driver for the Raspberry Pi.
Signed-off-by: NStefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: NEric Anholt <eric@anholt.net>
Reviewed-by: NEric Anholt <eric@anholt.net>

The BD9571 PMIC is present on the Renesas Salvator-X(S) and R-Car
Starter Kit Premier/Pro development boards.
Signed-off-by: NDien Pham <dien.pham.ry@renesas.com>
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

The msm8996 PCIe sits behind the "agnoc0", which is represented as a
simple-pm-bus, so enable support for this. Then enable the QMP phy
driver.

Also enable the atl1c ethernet driver and ath10k wlan driver to support
these components on the DragonBoard820c.
Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

Now that the driver has been merged for the HiSilicon
LPC host, enable the relevant config.

Turning on this config will also enable config
INDIRECT_PIO, which would have not been enabled
previously - see config info for more details.
Signed-off-by: NJohn Garry <john.garry@huawei.com>
Signed-off-by: NWei Xu <xuwei5@hisilicon.com>

It enables driver support of Ethernet, eMMC, Combo/INNO phy and PCIe
for Hi3798CV200 Poplar platform.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NWei Xu <xuwei5@hisilicon.com>

Enable GLINK RPM so that we get RPM regulators and clocks and enable the
UFS host controller driver and the Qualcomm UFS platform driver. The UFS
phy is selected by the Qualcomm UFS driver.

The simple ondemand devfreq governor must be builtin, as there's no
mechanism for automatically loading it, causing UFS HCD initialization
to fail.
Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

This patch enables the Armada thermal driver to support thermal
management on Marvell EBU Armada SoCs (7K,8K).
Signed-off-by: NAntoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com>

Enable the Renesas R-Car E3 (R8A77990) SoC in the ARM64 defconfig.
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>

The VC4 needs more memory than the default setting (16 MB):

  vc4-drm soc:gpu: swiotlb: coherent allocation failed, size=16777216
  [drm:vc4_bo_create [vc4]] *ERROR* Failed to allocate from CMA:
  vc4_v3d 3fc00000.v3d: Failed to allocate memory for tile binning: -12.
    You may need to enable CMA or give it more memory.
  vc4-drm soc:gpu: failed to bind 3fc00000.v3d (ops vc4_v3d_ops [vc4]): -12
  vc4-drm soc:gpu: master bind failed: -12
  vc4-drm: probe of soc:gpu failed with error -12

So increase the value to 32 MB and fix this issue.
Signed-off-by: NStefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>

Now Rockchip PCIe drivers could support both of RC mode and EP
mode, so we need to rename the config name. This patch updates
defconfig to reflect the fact that we want to build Rockchip PCIe
controller as RC mode, into a module as before.

Cc: linux-arm-kernel@lists.infradead.org
Cc: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: NShawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>

The efuses on Rockchip socs often contain informations
about specifics of the chip its running on (leakage currents etc)
which components might want to read to adjust settings accordingly.

So enable the efuse early for that.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>

CONFIG_SND_AUDIO_GRAPH_CARD is needed to use HDMI sound with video
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

The SPI is used on many boards (especially for the serial
flashes). Enable it by default.
Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com>

Recently kernelCI reported the board mt7622-rfb1 has a fail test with
kernel: ERROR: did not start booting whose details could be seen at [1].

The cause is that UART0 can't output anything when it's missing a proper
pin setup with current DTS, so the essential driver is always getting
enabled to fix up the issue.

[1] https://kernelci.org/boot/id/5ad7d62759b51461bfb1f829/

Cc: Kevin Hilman <khilman@baylibre.com>
Cc: stable@vger.kernel.org
Fixes: ae457b76 ("arm64: dts: mt7622: add SoC and peripheral related device nodes")
Signed-off-by: NSean Wang <sean.wang@mediatek.com>
Signed-off-by: NMatthias Brugger <matthias.bgg@gmail.com>