Need to check for engine and memory clock ss separately
and only enable dynamic ss if either of them are found.

This should fix systems which have a ss table, but do
not have entries for engine or memory.  On those systems
we may enable dynamic spread spectrum without enabling
it on the engine or memory clocks which can lead to a
hang in some cases.

fixes some systems reported here:
https://bugs.freedesktop.org/show_bug.cgi?id=66963

v2: fix typo
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

On rv770 and newer, clock gating is not required
for thermal protection.  The only requirement is that
the design utilizes a thermal sensor.
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Check if we can switch the mclk during the vblank time otherwise
we may get artifacts on the screen when the mclk changes.
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Allows you to limit the selected power levels via sysfs.
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Was disabled due to stability issues on certain boards
caused by the a bug in the parsing of the atom mc reg tables.
That's fixed now so re-enable.
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

We weren't properly catching errors in dpm_enable()
and dpm_set_power_state().
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Validate the voltages against the voltage requirements of the
dispclk.  We currently don't adjust the disp clock so it never
changes, but we need to filter out voltage levels that are too
low none the less.
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

SI uses a new atom table.  Required for DPM on SI.
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This properly implemented dynamic state adjustment by
using a working copy of the requested and current
power states.
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Needed to properly handle dynamic state adjustment.
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Needed to properly handle dynamic state adjustment.
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Needed to properly handle dynamic state adjustment.
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This adds dpm support for cayman asics.  This includes:
- clockgating
- dynamic engine clock scaling
- dynamic memory clock scaling
- dynamic voltage scaling
- dynamic pcie gen1/gen2 switching (requires additional acpi support)
- power containment
- shader power scaling

Set radeon.dpm=1 to enable.

v2: fold in tdp fix
v3: fix indentation
v4: fix 64 bit div
v5: attempt to fix state enable
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: NJerome Glisse <jglisse@redhat.com>

Use a dedicated copy of the current power state since
we may have to adjust it on the fly.

v2: fix up redundant state sets
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This adds dpm support for btc asics.  This includes:
- clockgating
- dynamic engine clock scaling
- dynamic memory clock scaling
- dynamic voltage scaling
- dynamic pcie gen1/gen2 switching (requires additional acpi support)

Set radeon.dpm=1 to enable.

v2: reduce stack usage
v3: attempt to fix state enable
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>