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  1. 24 8月, 2018 1 次提交
  3. 25 7月, 2018 1 次提交
  5. 24 7月, 2018 6 次提交
  7. 23 7月, 2018 7 次提交
  9. 22 7月, 2018 5 次提交
  11. 21 7月, 2018 7 次提交
    • T
      ARM: dts: omap4: Add l4 ranges for 4460 · 77036896
      由 Tony Lindgren 提交于 
      Compared to 4430, 4460 and 4470 just have slightly different
l4 cfg ranges.
Signed-off-by: NTony Lindgren <tony@atomide.com>
      77036896
    • T
      ARM: dts: omap4: Move l4 child devices to probe them with ti-sysc · 84badc5e
      由 Tony Lindgren 提交于 
      With l4 interconnect hierarchy and ti-sysc interconnect target module
data in place, we can simply move all the related child devices to
their proper location and enable probing using ti-sysc.

In general the first child device address range starts at range 0
from the ti-sysc interconnect target so the move involves adjusting
the child device reg properties for that.

And we cannot yet move mmu_dsp until we have a proper reset controller
driver for rstctrl registers.

In case of any regressions, problem devices can be reverted to probe
with legacy platform data as needed by moving them back and removing
the related interconnect target module node.
Signed-off-by: NTony Lindgren <tony@atomide.com>
      84badc5e
    • T
      ARM: dts: omap4: Probe watchdog 3 with ti-sysc · 4bce6786
      由 Tony Lindgren 提交于 
      Before updating wdt2 to probe with ti-sysc we want to have wdt3
probed with ti-sysc to avoid having them unnecessarily swap order.

With ti-sysc, we probe child devices at module_init time while
and until l4 abe interconnect is converted to use ti-sysc, wdt3
will probe earlier with legacy platform data.

Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
      4bce6786
    • T
      ARM: dts: omap4: Add l4 interconnect hierarchy and ti-sysc data · 8f42cb7f
      由 Tony Lindgren 提交于 
      Let's add proper interconnect hierarchy for l4 interconnect
instances with the related ti-sysc interconnect module data as
documented in Documentation/devicetree/bindings/bus/ti-sysc.txt.

Using ti-sysc driver binding allows us to start dropping
legacy platform data in arch/arm/mach-omap2/omap*hwmod*data.c
files later on in favor of ti-sysc dts data.

For setting up a proper hierarchy for the interconnect and
ti-sysc data, there are multiple reasons:

1. We can use dts ranges to protect registers from being
   ioremapped from other devices and prevent hard to track
   issues with failed flush of posted write between modules

2. Some of the ranges may not be accessible to operating systems
   at all if configured so on high-security devices

3. The interconnect hierarchy provides proper clockdomain
   hierarchy that can be used for genpd later on

4. We can avoid almost all deferred probe related issues simply
   by probing the resource providing interconnect instance first
   for l4 wkup instance

5. With deferred probe issues gone, we can probe everything
   later at module_init time except for system timer and interrupt
   controller and their clocks.

This data is generated based on platform data from a booted system
and the interconnect acces protection registers for ranges. To avoid
regressions, we initially validate the device tree provided data
against the existing platform data on boot.

Each interconnect instance is typically divided into segments
to avoid powering up the whole interconnect. And each segment
has one or more ranges TI specific interconnect target modules
connected to it. Some devices can also have a separate data
access port directly to the parent L3 interconnect for DMA that
can be set up as a separate range.

Note that we cannot yet include this file from omap4.dtsi
until child devices are moved to their proper locations in
the interconnect hierarchy in the following patch. Otherwise
we would have the each module probed twice.

Also note that this does not yet add l4 abe instance, that will
be added separately later on.
Signed-off-by: NTony Lindgren <tony@atomide.com>
      8f42cb7f
    • A
      ARM: dts: imx7d: remove "operating-points" property for cpu1 · 33a8d5a5
      由 Anson Huang 提交于 
      Commit b97872d4 ("ARM: dts: imx: Add missing OPP properties for CPUs")
added "operating-points" property for all CPUs, but i.MX7D already has
"operating-points-v2" property on both CPUs, so no need to add
"operating-points" property again, this patch removes it.

Fixes: b97872d4 ("ARM: dts: imx: Add missing OPP properties for CPUs")
Signed-off-by: NAnson Huang <Anson.Huang@nxp.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>
      33a8d5a5
    • A
      ARM: dts: vf610-zii-ssmb-spu3: Fix W=1 level warnings · 55e20919
      由 Andrey Smirnov 提交于 
      Fix a couple of things that were causing warning when building DTB
with W=1.

Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: cphealy@gmail.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: NAndrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>
      55e20919
    • A
      ARM: dts: vf610: Add ZII CFU1 board · 19fddda1
      由 Andrey Smirnov 提交于 
      Add support for the Zodiac Inflight Innovations CFU1
board (VF610-based).

Cc: linux-arm-kernel@lists.infradead.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Signed-off-by: NAndrey Smirnov <andrew.smirnov@gmail.com>
Tested-by: NChris Healy <cphealy@gmail.com>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>
      19fddda1
  13. 20 7月, 2018 7 次提交
  15. 19 7月, 2018 6 次提交