- 20 4月, 2016 1 次提交
-
-
由 Rafał Miłecki 提交于
Our nand_ecc_modes_t is already a bit abused by value NAND_ECC_SOFT_BCH. This enum should store ECC mode only and putting algorithm details there is a bad idea. It would result in too many values impossible to support in a sane way. To solve this problem let's add a new enum. We'll have to modify all drivers to set it properly but once it's done it'll be possible to drop NAND_ECC_SOFT_BCH. That will result in a cleaner design and more possibilities like setting ECC algorithm for hardware ECC mode. Signed-off-by: NRafał Miłecki <zajec5@gmail.com> Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
-
- 11 3月, 2016 1 次提交
-
-
由 Archit Taneja 提交于
One of the arguments passed to struct nand_chip's block_bad op is 'getchip', which, if true, is supposed to get and select the nand device, and later unselect and release the device. This op is intended to be replaceable by drivers. The drivers shouldn't be responsible for selecting/unselecting chip. Like other ops, the chip should already be selected before the block_bad op is called. Remove the getchip argument from the block_bad op and nand_block_checkbad. Move the chip selection to nand_block_isbad, since it is the only caller to nand_block_checkbad which requires chip selection. Modify nand_block_bad (the default function for the op) such that it doesn't select the chip. Remove the getchip argument from the bad_block funcs in cafe_nand, diskonchip and docg4 drivers. Reviewed-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NArchit Taneja <architt@codeaurora.org> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
- 27 1月, 2016 1 次提交
-
-
由 Boris BREZILLON 提交于
This field is not set in any board file and can thus be dropped. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
- 23 1月, 2016 1 次提交
-
-
由 Boris BREZILLON 提交于
Some MLC NANDs are sensitive to repeated patterns and require data to be scrambled in order to limit the number of bitflips. Add a new flag to let the NAND controller know about this constraint. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
- 08 1月, 2016 1 次提交
-
-
由 Boris BREZILLON 提交于
Add two helpers to access the field reserved for private controller data. This makes it clearer what this field is reserved for and ease future refactoring. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
- 07 1月, 2016 2 次提交
-
-
由 Boris BREZILLON 提交于
The default NAND read functions are relying on the underlying controller driver to correct bitflips, but some of those controllers cannot properly fix bitflips in erased pages. Check for bitflips in erased pages in default core functions if the driver delegated the this check by setting the NAND_ECC_GENERIC_ERASED_CHECK flag. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Tested-by: NFranklin S Cooper Jr. <fcooper@ti.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
由 Boris BREZILLON 提交于
The error code returned by the ecc.correct() are not consistent over the all implementations. Document the expected behavior in include/linux/mtd/nand.h and fix offending implementations. [Brian: this looks like a bugfix for the ECC reporting in the bf5xx_nand driver, but we haven't seen any testing results for it] Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Tested-by: NFranklin S Cooper Jr. <fcooper@ti.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
- 19 12月, 2015 3 次提交
-
-
由 Boris BREZILLON 提交于
Nobody uses the get_platform_nandchip() helper function which is supposed to return a pointer to a platform_nand_chip struct from an mtd_info pointer. Moreover, this function is buggy since the introduction of the plat_nand layer (chip->priv is now storing a pointer to an intermediate plat_nand_data structure allocated in plat_nand_probe(), and we have no way to retrieve a pointer to the provided platform_nand_chip struct from this plat_nand_data pointer). While we are at it, remove the useless (and buggy, since it's pointing to something stored on the stack) data->chip.priv assignment. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Fixes: 711fdf62 ("[MTD] [NAND] platform NAND driver: add driver") Cc: Vitaly Wool <vitalywool@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
由 Boris BREZILLON 提交于
Now that the nand_chip struct directly embeds an mtd_info struct we can get rid of the ->flash_node field and forward set/get_flash_node requests to the MTD layer. As a side effect, we no longer need the mtd_set_of_node() call done in nand_dt_init(). Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
由 Boris BREZILLON 提交于
Now that all drivers are using the mtd instance embedded in the nand_chip struct we can safely update the mtd_to_nand() implementation to use the container_of macro instead of returning the content of mtd->priv. This will allow us to remove mtd->priv = chip assignments done in all NAND controller drivers. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
- 09 12月, 2015 2 次提交
-
-
由 Boris BREZILLON 提交于
Add a new helper to retrieve the MTD device attached to a NAND chip. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
由 Boris BREZILLON 提交于
Currently all NAND controller drivers are providing both the mtd_info and nand_chip struct and then let the NAND subsystem to initialize a few things before registering the mtd instance to the MTD layer. Embed an mtd_info field into nand_chip to add some consistency to all NAND controller drivers. This change will also help factorizing boilerplate code copied in all NAND drivers. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
- 02 12月, 2015 2 次提交
-
-
由 Brian Norris 提交于
It's "ADL" ("ALE to data loading" time) not "ALD". Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Reviewed-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
-
由 Boris BREZILLON 提交于
src_ssync_features field is only 1 byte large, and the 4th reserved area is actually 8 bytes large. Fixes: d1e1f4e4 ("mtd: nand: add support for reading ONFI parameters from NAND device") Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
- 20 11月, 2015 1 次提交
-
-
由 Boris BREZILLON 提交于
Some drivers are retrieving the nand_chip pointer using the container_of macro on a struct wrapping both the nand_chip and the mtd_info struct while the standard way of retrieving this pointer is through mtd->priv. Provide an helper to do that. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
- 12 11月, 2015 1 次提交
-
-
由 Brian Norris 提交于
We are going to begin using the mtd->dev.of_node field for MTD device nodes, so let's add helpers for it. Also, we'll be making some conversions on spi_nor (and nand_chip eventually) too, so get that ready with their own helpers. Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Reviewed-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
-
- 14 10月, 2015 1 次提交
-
-
由 Boris BREZILLON 提交于
The ->read_xxx() methods are all passed the page number the NAND controller is supposed to read, but ->write_xxx() do not have such a parameter. This is a problem if we want to properly implement data scrambling/randomization in order to mitigate MLC sensibility to repeated pattern: to prevent bitflips in adjacent pages in the same block we need to avoid repeating the same pattern at the same offset in those pages, hence the randomizer/scrambler engine need to be passed the page value in order to adapt its seed accordingly. Moreover, adding the page parameter to the ->write_xxx() methods add some consistency to the current API. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> CC: Josh Wu <josh.wu@atmel.com> CC: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> CC: Maxime Ripard <maxime.ripard@free-electrons.com> CC: Greg Kroah-Hartman <gregkh@linuxfoundation.org> CC: Huang Shijie <shijie.huang@arm.com> CC: Stefan Agner <stefan@agner.ch> CC: devel@driverdev.osuosl.org CC: linux-arm-kernel@lists.infradead.org CC: linux-kernel@vger.kernel.org Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
- 02 10月, 2015 1 次提交
-
-
由 Boris BREZILLON 提交于
The ->init_size() hook was introduced to let NAND controller drivers support NAND devices that could not be described in the nand_ids table. Since then, the core has added support for extended-id parsing and full-id description, thus allowing to describe pretty much all existing NANDs. Moreover, this hook is not used by any mainline driver, and should not be used by new drivers, because detecting the NAND chip is not something controller specific. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
- 22 9月, 2015 1 次提交
-
-
由 Boris BREZILLON 提交于
Add two helper functions to help NAND controller drivers test whether a specific NAND region is erased or not. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
- 12 9月, 2015 1 次提交
-
-
由 Marek Vasut 提交于
Use a more descriptive name for the device_node element in struct nand_chip . This name matches the element name used for device_node property of a flash in the spi-nor framework. Signed-off-by: NMarek Vasut <marex@denx.de> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
- 08 7月, 2015 1 次提交
-
-
由 Scott Wood 提交于
Commit 66507c7b ("mtd: nand: Add support to use nand_base poi databuf as bounce buffer") added a flag NAND_USE_BOUNCE_BUFFER using the same bit value as the existing NAND_BUSWIDTH_AUTO. Cc: Kamal Dasu <kdasu.kdev@gmail.com> Fixes: 66507c7b ("mtd: nand: Add support to use nand_base poi databuf as bounce buffer") Signed-off-by: NScott Wood <scottwood@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
- 12 5月, 2015 1 次提交
-
-
由 Brian Norris 提交于
These are already-documented common bindings for NAND chips. Let's handle them in nand_base. If NAND controller drivers need to act on this data before bringing up the NAND chip (e.g., fill out ECC callback functions, change HW modes, etc.), then they can do so between calling nand_scan_ident() and nand_scan_tail(). Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
- 07 5月, 2015 1 次提交
-
-
由 Brian Norris 提交于
This implementation detail is no longer needed outside of nand_bbt.c. Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
- 26 11月, 2014 1 次提交
-
-
由 Brian Norris 提交于
Tested with ATO AFND1G08U3, 128MiB NAND. Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
- 20 11月, 2014 1 次提交
-
-
由 Boris BREZILLON 提交于
read_page_raw and write_page_raw method description is not clear enough. It clearly specifies that ECC correction should not be involved but does not talk about specific layout (by layout I mean where in-band and out-of-band data are stored on the NAND media) used by NAND/ECC controllers. Those specific layouts might impact MTD users and thus should be hidden (as already done in the standard NAND_ECC_HW_SYNDROME implementation). Clearly state this constraint in the nand_ecc_ctrl struct documentation. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
- 23 9月, 2014 1 次提交
-
-
由 Boris BREZILLON 提交于
Add an onfi_timing_mode_default field to nand_chip and nand_flash_dev in order to support NAND timings definition for non-ONFI NAND. NAND that support better timings mode than the default one have to define a new entry in the nand_ids table. The default timing mode should be deduced from timings description from the datasheet and the ONFI specification (www.onfi.org/~/media/ONFI/specs/onfi_3_1_spec.pdf, chapter 4.15 "Timing Parameters"). You should choose the closest mode that fit the timings requirements of your NAND chip. Signed-off-by: NBoris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
- 20 8月, 2014 2 次提交
-
-
由 Boris BREZILLON 提交于
Change the comment type (from /** to /*) to prevent DocBook from complaining about missing description for nand_sdr_timings fields. There is currently no need in documenting those fields because they are fully described in the ONFI specification (which is pointed out in the comment). Signed-off-by: NBoris BREZILLON <boris.brezillon@free-electrons.com> Reported-by: NRandy Dunlap <rdunlap@infradead.org> Acked-by: NRandy Dunlap <rdunlap@infradead.org> Tested-by: NRandy Dunlap <rdunlap@infradead.org> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
由 Randy Dunlap 提交于
Fix kernel-doc warning in <linux/mtd/nand.h>: Warning(..//include/linux/mtd/nand.h:795): No description found for parameter 'ecc' Signed-off-by: NRandy Dunlap <rdunlap@infradead.org> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Brian Norris <computersforpeace@gmail.com> Cc: linux-mtd@lists.infradead.org Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
- 22 7月, 2014 2 次提交
-
-
由 Boris BREZILLON 提交于
Add a converter to retrieve NAND timings from an ONFI NAND timing mode. At the moment, only SDR NAND timings are supported. Signed-off-by: NBoris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
由 Boris BREZILLON 提交于
Define a struct containing the standard NAND timings as described in NAND datasheets. Signed-off-by: NBoris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
- 09 7月, 2014 1 次提交
-
-
由 Ezequiel Garcia 提交于
In addition to mtd_block_isbad(), which checks if a block is bad or reserved, it's needed to check if a block is reserved only (but not bad). This commit adds an MTD interface for it, in a similar fashion to mtd_block_isbad(). While here, fix mtd_block_isbad() so the out-of-bounds checking is done before the callback check. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NPekon Gupta <pekon@ti.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
- 21 5月, 2014 1 次提交
-
-
由 Kamal Dasu 提交于
nand_base can be passed a kmap()'d buffers from highmem by filesystems like jffs2. This results in failure to map the physical address of the DMA buffer on various contoller driver on different platforms. This change adds a chip option to use preallocated databuf as bounce buffers used in nand_do_read_ops() and nand_do_write_ops(). This allows for specific nand controller driver to set this option as needed. Signed-off-by: NKamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
- 10 5月, 2014 1 次提交
-
-
由 Brian Norris 提交于
The nand_chip::erase_cmd callback previously served a dual purpose; for one, it allowed a per-flash-chip override, so that AG-AND devices could use a different erase command than other NAND. These AND devices were dropped in commit 14c65786 (mtd: nand: remove AG-AND support). On the other hand, some drivers (denali and doc-g4) need to use this sort of callback to implement controller-specific erase operations. To make the latter operation easier for some drivers (e.g., ST's new BCH NAND driver), it helps if the command dispatch and wait functions can be lumped together, rather than called separately. This patch does two things: 1. Pull the call to chip->waitfunc() into chip->erase_cmd(), and return the status from this callback 2. Rename erase_cmd() to just erase(), since this callback does a little more than just send a command Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Tested-by: NLee Jones <lee.jones@linaro.org>
-
- 26 3月, 2014 1 次提交
-
-
由 David Mosberger 提交于
GET_FEATURES and SET_FEATURES also need byte-addressing on 16-bit devices. Signed-off-by: NDavid Mosberger <davidm@egauge.net> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
- 11 3月, 2014 6 次提交
-
-
由 Huang Shijie 提交于
Add the "page" argument for the read_subpage hook. With this argument, the implementation of this hook could prints out more accurate information for debugging. Signed-off-by: NHuang Shijie <b32955@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
由 Huang Shijie 提交于
This patch adds the parsing code for the JEDEC compliant NAND. Since we need the 0x40 as the column address, this patch also makes the NAND_CMD_PARAM to use the 8-bit address only. Signed-off-by: NHuang Shijie <b32955@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
由 Huang Shijie 提交于
Add a helper to get the supported features for JEDEC compliant NAND. Also add a macro JEDEC_FEATURE_16_BIT_BUS. Signed-off-by: NHuang Shijie <b32955@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
由 Huang Shijie 提交于
Add the jedec_version field, and add an anonymous union which contains the nand_onfi_params and nand_jedec_params. Signed-off-by: NHuang Shijie <b32955@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
由 Huang Shijie 提交于
Create the nand_jedec_params{} and jedec_ecc_info{} according to the JESD230A (Revision of JESD230, October 2012). Signed-off-by: NHuang Shijie <b32955@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
-
由 Brian Norris 提交于
The NAND command helpers tend to automatically shift the column address for x16 bus devices, since most commands expect a word address, not a byte address. The Read ID command, however, expects an 8-bit address (i.e., 0x00, 0x20, or 0x40 should not be translated to 0x00, 0x10, or 0x20). This fixes the column address for a few drivers which imitate the nand_base defaults. Note that I don't touch sh_flctl.c, since it already handles this problem slightly differently (note its comment "READID is always performed using an 8-bit bus"). I have not tested this patch, as I only have x8 parts up for testing at this point. Hopefully that can change soon... Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-By: NPekon Gupta <pekon@ti.com>
-