1. 29 5月, 2015 2 次提交
    • M
      ath10k: handle cycle counter wraparound · 587f7031
      Michal Kazior 提交于
      When QCA988X cycle counter HW register wraps
      around it resets to 0x7fffffff instead of 0. All
      other cycle counter related registers are divided
      by 2 so they never wraparound themselves. QCA61X4
      has a uniform CC and it wraparounds in a regular
      fashion though.
      
      Worst case wraparound time is approx 24 seconds
      (2**31 / 88MHz). Since scan channel visit times
      are max 5 seconds (offchannel case) it is
      guaranteed there's been at most 1 wraparound and
      it is possible to compute survey active time
      value. It is, however, impossible to determine the
      point at which Rx Clear Count has been divided by
      two so it is not reported upon wraparound.
      
      This fixes some occasional incorrect survey data
      on QCA988X as some channels (depending on how/when
      scan/offchannel requests were requested) would
      have approx 24 sec active time which wasn't
      actually the case.
      
      This should improve hostapd ACS a little bit.
      Reported-by: NSrinivasa Duvvuri <sduvvuri@chromium.org>
      Signed-off-by: NMichal Kazior <michal.kazior@tieto.com>
      Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
      587f7031
    • M
      ath10k: move cycle_count macro · 0936ea3f
      Michal Kazior 提交于
      The macro isn't WMI specific. Instead it is
      related to hardware chip so move the macro
      accordingly. While at it document the magic value.
      Signed-off-by: NMichal Kazior <michal.kazior@tieto.com>
      Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
      0936ea3f
  2. 25 5月, 2015 10 次提交
  3. 23 5月, 2015 2 次提交
  4. 22 5月, 2015 26 次提交