- 14 5月, 2010 5 次提交
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由 Guillaume LECERF 提交于
After looking at AMD's CFI specification [1], both of the extended query tables are optional. Thus, it looks like relying that at least one of those tables exist is a bug in cfi_cmdset_0002. This patch inverts the logic and checks for unlock function pointers before exiting on error. This approach leaves place to add a call to a fixup function to try to handle chips compatible with the early AMD specification from 1995 [2]. [1] http://www.amd.com/us-en/assets/content_type/DownloadableAssets/cfi_r20.pdf [2] http://noel.feld.cvut.cz/hw/amd/20158a.pdfSigned-off-by: NGuillaume LECERF <glecerf@gmail.com> Reviewed-by: NWolfram Sang <w.sang@pengutronix.de> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Guillaume LECERF 提交于
Use P_ID_* definitions already in include/linux/mtd/cfi.h instead of the hardcoded values. Make the code more readable. Signed-off-by: NGuillaume LECERF <glecerf@gmail.com> Reviewed-by: NWolfram Sang <w.sang@pengutronix.de> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Guillaume LECERF 提交于
SST 39VF160x and 39VF320x chips use vendorname id 0x0701 and alternative unlock addresses. Add support for them in cfi_probe.c. Signed-off-by: NGuillaume LECERF <glecerf@gmail.com> Reviewed-by: NWolfram Sang <w.sang@pengutronix.de> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Guillaume LECERF 提交于
Make the addresses used to enter Auto Select Mode variable to leave place for handling chips using non-standard addresses. Signed-off-by: NGuillaume LECERF <glecerf@gmail.com> Reviewed-by: NWolfram Sang <w.sang@pengutronix.de> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Guillaume LECERF 提交于
Move the code to enter Auto Select Mode down to be able to use cfi->cfiq members to add support for chips using alternative sequence / unlock addresses. Signed-off-by: NGuillaume LECERF <glecerf@gmail.com> Reviewed-by: NWolfram Sang <w.sang@pengutronix.de> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 10 5月, 2010 2 次提交
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由 Kevin Cernekee 提交于
Ensure that the flash device is in a quiescent state before rebooting. The implementation is closely modeled after the cfi_cmdset_0001 reboot notifier, commit 963a6fb0 . Signed-off-by: NKevin Cernekee <cernekee@gmail.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Stefani Seibold 提交于
The use of a memcpy() during a spinlock operation will cause very long thread context switch delays if the flash chip bandwidth is low and the data to be copied large, because a spinlock will disable preemption. For example: A flash with 6,5 MB/s bandwidth will cause under ubifs, which request sometimes 128 KiB (the flash erase size), a preemption delay of 20 milliseconds. High priority threads will not be served during this time, regardless whether this threads access the flash or not. This behavior breaks real time. The patch changes all the use of spin_lock operations for xxxx->mutex into mutex operations, which is exact what the name says and means. I have checked the code of the drivers and there is no use of atomic pathes like interrupt or timers. The mtdoops facility will also not be used by this drivers. So it is dave to replace the spin_lock against mutex. There is no performance regression since the mutex is normally not acquired. Changelog: 06.03.2010 First release 26.03.2010 Fix mutex[1] issue and tested it for compile failure Signed-off-by: NStefani Seibold <stefani@seibold.net> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 27 2月, 2010 1 次提交
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由 Guillaume LECERF 提交于
Move MANUFACTURER_MACRONIX and MANUFACTURER_SST definitions to the include/linux/mtd/cfi.h header file and rename them to CFI_MFR_MACRONIX and CFI_MFR_SST. All references in drivers/mtd/chips/cfi_cmdset_0002.c are updated to reflect this. Signed-off-by: NGuillaume LECERF <glecerf@gmail.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 25 2月, 2010 1 次提交
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由 Jiri Slaby 提交于
In cfi_intelext_setup and cfi_amdstd_setup, mtd is never NULL. Remove unnecessary checks. Signed-off-by: NJiri Slaby <jslaby@suse.cz> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 09 2月, 2010 1 次提交
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由 Daniel Mack 提交于
In particular, several occurances of funny versions of 'success', 'unknown', 'therefore', 'acknowledge', 'argument', 'achieve', 'address', 'beginning', 'desirable', 'separate' and 'necessary' are fixed. Signed-off-by: NDaniel Mack <daniel@caiaq.de> Cc: Joe Perches <joe@perches.com> Cc: Junio C Hamano <gitster@pobox.com> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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- 04 2月, 2010 1 次提交
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Signed-off-by: NSebastian Andrzej Siewior <sebastian@breakpoint.cc> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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- 10 12月, 2009 1 次提交
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由 Jiri Slaby 提交于
Stanse found a double unlock in get_chip. get_chip is called with chip->mutex held and caller is responsible for unlocking it too. Do not unlock the lock in get_chip on a fail path. This would mean a double unlock. Signed-off-by: NJiri Slaby <jslaby@suse.cz> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 30 11月, 2009 6 次提交
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由 Guillaume LECERF 提交于
SST 39VF160x/39VF320x and some old SST chips need a special command sequence to enter CFI QueRY mode [1]. This patch adds the relevant sequence to cfi_qry_mode_on(). Tested with 39VF3201. Signed-off-by: NGuillaume LECERF <glecerf@gmail.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Ladislav Michl 提交于
This one sits in my tree for more than two years... Using device code found on page 12 (http://www.btdesigner.com/pdfs/M29W800D.pdf) and unlock address from page 15 MTD subsytem happily detects ST M29W800DB in 16-bit mode. I do believe original author used only 8-bit mode and thus didn't hit this bug. Signed-off-by: NLadislav Michl <ladis@linux-mips.org> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Joakim Tjernlund 提交于
Erase-suspend for writing is required to avoid blocking applications that wish to write some data (to a NOR block other than the one being erased). Particularly, it solves some huge delays that an application (which writes to a UBIFS) will experience if UBI attaches to empty NOR flash. In this case the UBI background thread will erase a lot of blocks and the application can be blocked for minutes because of the "MTD/CFI chip lock". This feature has been disabled for years. Maybe this was because the old code turned it on for erase-suspend read-only chips also (cfip->EraseSuspend & 0x1). This is wrong and corrected now. This patch was tweaked by Norbert van Bolhuis. Signed-off-by: NNorbert van Bolhuis <nvbolhuis@aimvalley.nl> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Hans-Christian Egtvedt 提交于
This patch moves the MANUFACTURER_ST and MANUFACTURER_INTEL to the include/linux/mtd/cfi.h header file and renames them to CFI_MFR_ST and CFI_MFR_INTEL. CFI_MFR_ST was already present there. All references in drivers/mtd/chips/cfi_cmdset_0001.c are updated to reflect this. Signed-off-by: NHans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Acked-by: NNicolas Pitre <nico@fluxnic.net> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Hans-Christian Egtvedt 提交于
This patch sets the MTD_POWERUP_LOCK flag for AT49BV640D and AT49BV640DT devices, since the devices are locked when powered up and needs to be unlocked before interfaced. Quote datasheet; "At power-up and reset, all sectors have their Softlock protection mode enabled.". Tested on AVR32 hardware platform with an AT49BV640D flash device. Signed-off-by: NHans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Acked-by: NNicolas Pitre <nico@fluxnic.net> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Nicolas Pitre 提交于
Signed-off-by: NNicolas Pitre <nico@fluxnic.net> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 09 11月, 2009 1 次提交
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由 Michael Roth 提交于
Additionally, some excessive newlines removed. Signed-off-by: NMichael Roth <mroth@nessie.de> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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- 23 9月, 2009 1 次提交
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由 Mike Frysinger 提交于
Signed-off-by: NMike Frysinger <vapier@gentoo.org> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 20 9月, 2009 3 次提交
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由 Massimo Cirillo 提交于
The M29W128G Numonyx flash devices are intolerant to any 0xFF command: in the Cfi_util.c the function cfi_qry_mode_off() (that resets the device after the autoselect mode) must have a 0xF0 command after the 0xFF command. This fix solves also the cause of the fixup_M29W128G_write_buffer() fix, that can be removed now. The following patch applies to 2.6.30 kernel. Signed-off-by: NMassimo Cirillo <maxcir@gmail.com> Acked-by: NAlexey Korolev <akorolev@infradead.org> Cc: stable@kernel.org Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Stefan Roese 提交于
Signed-off-by: NStefan Roese <sr@denx.de> Signed-off-by: NVitaly Bordug <vitb@kernel.crashing.org> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Hiroshi Ito 提交于
linux v2.6.31-rc6 can not detect NEC uPD29F064115. uPD29F064115 is a 16 bit device. datasheet: http://www.cn.necel.com/memory/cn/download/M16062EJ2V0DS00.pdf This applies the same fix as used for SST chips in commit ca6f12c6 ("jedec_probe: Fix SST 16-bit chip detection"). Signed-off-by: NHiroshi Ito <ito@mlb.co.jp> Cc: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 16 9月, 2009 1 次提交
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由 Nicolas Pitre 提交于
Due to problems at cam.org, my nico@cam.org email address is no longer valid. FRom now on, nico@fluxnic.net should be used instead. Signed-off-by: NNicolas Pitre <nico@fluxnic.net> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 06 6月, 2009 3 次提交
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由 Daniel Ribeiro 提交于
This patch allows otpinfo for CFI >= 1.0 and burst read for CFI >= 1.1. references: 1.0: http://www.datasheetcatalog.org/datasheets2/81/816884_1.pdf 1.1: http://milkymist.org/doc/MT28F640J3.pdf http://www.delorie.com/agenda/specs/29066709.pdfSigned-off-by: NDaniel Ribeiro <drwyrm@gmail.com> Acked-by: NNicolas Pitre <nico@cam.org> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Daniel Ribeiro 提交于
This chip reports CFI 1.3, but the CFI PRI is like CFI 1.1. Add a quirk to pass probe on this chip. This patch depends on "MTD: CFI 1.0 and CFI 1.1" Signed-off-by: NDaniel Ribeiro <drwyrm@gmail.com> Acked-by: NNicolas Pitre <nico@cam.org> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Michał Mirosław 提交于
Add SST39SF040 chip (like SST39SF020A but bigger - 4Mbit). Signed-off-by: NMichał Mirosław <mirq-linux@rere.qmqm.pl> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 06 4月, 2009 1 次提交
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由 Darius Augulis 提交于
Prevent NUMONYX M29W128G memories from using write buffer, because it doesn't work properly. Signed-off-by: NDarius Augulis <augulis.darius@gmail.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 24 3月, 2009 1 次提交
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由 David Howells 提交于
Present backing device capabilities for MTD character device files to allow NOMMU mmap to do direct mapping where possible. Signed-off-by: NDavid Howells <dhowells@redhat.com> Tested-by: NBernd Schmidt <bernd.schmidt@analog.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 21 3月, 2009 2 次提交
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由 Yegor Yefremov 提交于
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NYegor Yefremov <yegorslists@googlemail.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Graff Yang 提交于
If the inval_cache_and_wait_for_operation() is re-entered by write operation when erase operation is in progress, the chip->erase_suspended will be cleared, this cause the erase timeo is not reset and will result time out error for erase. Signed-off-by: NGraff Yang <graff.yang@gmail.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 12 1月, 2009 1 次提交
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由 Alan Cox 提交于
Which means if inftl or similar are loaded with it (which is a dumb thing to do admittedly) it may oops. Closes #8108 [dwmw2: change error to -EROFS to match write-protected flash] Signed-off-by: NAlan Cox <alan@redhat.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 09 1月, 2009 1 次提交
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由 Wolfgang Grandegger 提交于
The NOR Flash memory K8P2815UQB from Samsung uses the major version number '0'. Add a quirk to cope with it. Signed-off-by: NWolfgang Grandegger <wg@grandegger.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 10 12月, 2008 1 次提交
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由 Adrian Hunter 提交于
MTD internal API presently uses 32-bit values to represent device size. This patch updates them to 64-bits but leaves the external API unchanged. Extending the external API is a separate issue for several reasons. First, no one needs it at the moment. Secondly, whether the implementation is done with IOCTLs, sysfs or both is still debated. Thirdly external API changes require the internal API to be accepted first. Note that although the MTD API will be able to support 64-bit device sizes, existing drivers do not and are not required to do so, although NAND base has been updated. In general, changing from 32-bit to 64-bit values cause little or no changes to the majority of the code with the following exceptions: - printk message formats - division and modulus of 64-bit values - NAND base support - 32-bit local variables used by mtdpart and mtdconcat - naughtily assuming one structure maps to another in MEMERASE ioctl Signed-off-by: NAdrian Hunter <ext-adrian.hunter@nokia.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 05 11月, 2008 1 次提交
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由 Eric W. Biederman 提交于
For "unlock" cycles to 16bit devices in 8bit compatibility mode we need to use the byte addresses 0xaaa and 0x555. These effectively match the word address 0x555 and 0x2aa, except the latter has its low bit set. Most chips don't care about the value of the 'A-1' pin in x8 mode, but some -- like the ST M29W320D -- do. So we need to be careful to set it where appropriate. cfi_send_gen_cmd is only ever passed addresses where the low byte is 0x00, 0x55 or 0xaa. Of those, only addresses ending 0xaa are affected by this patch, by masking in the extra low bit when the device is known to be in compatibility mode. [dwmw2: Do it only when (cmd_ofs & 0xff) == 0xaa] v4: Fix stupid typo in cfi_build_cmd_addr that failed to compile I'm writing this patch way to late at night. v3: Bring all of the work back into cfi_build_cmd_addr including calling of map_bankwidth(map) and cfi_interleave(cfi) So every caller doesn't need to. v2: Only modified the address if we our device_type is larger than our bus width. Cc: stable@kernel.org Signed-off-by: NEric W. Biederman <ebiederm@xmission.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 18 10月, 2008 2 次提交
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由 Haavard Skinnemoen 提交于
The CFI information read from AT49BV6416 lists the erase regions in the wrong order, causing problems when trying to erase or update the first or last 64KiB block. Work around this by inverting the "top boot" flag, which will effectively reverse the order of the erase regions. This chip is obsolete, but it's used in some existing designs. Signed-off-by: NHåvard Skinnemoen <haavard.skinnemoen@atmel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Christopher Moore 提交于
This patch adds TopBottom detection for most Macronix chips with CFI V1.0. The main purpose of this patch is to add detection of the MX29LV400C B used on the LaCie Ethernet Disk mini V2 NAS. It detects the following parts correctly:- MX28F640C3B T MX29LV002C B MX29LV002NC B MX29LV004C T MX29LV400C T/B MX29LV800C T/B MX29LV160C T/B MX29SL800C T/B MX29SL802C T/B It detects the following uniform part as bottom but it should work correctly:- MX29LV040C For T parts it causes the erase block table to be reversed correctly. For other parts it avoids the bogus "Assuming top" message. It does not detect the following correctly:- MX28F640C3B B MX29LV002C T MX29LV002NC T MX29LV004C B MX29SL400C T/B MX29SL402C T/B If desired I could supply a more complicated patch to handle these as well. Only the MX29LV400C B has been physically tested; others were checked against their data sheets. Signed-off-by: NChristopher Moore <moore@free.fr> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 27 9月, 2008 1 次提交
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由 Alexander Belyakov 提交于
The patch fixes CFI issue with multipartitional devices leading to the set of errors or even deadlock. The problem is CFI FL_SYNCING state race with flash operations (e.g. erase suspend). It is reproduced by running intensive writes on one JFFS2 partition and simultaneously performing mount/unmount cycle on another partition of the same chip. Signed-off-by: NAlexander Belyakov <abelyako@googlemail.com> Acked-by: NNicolas Pitre <nico@cam.org> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 01 9月, 2008 1 次提交
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由 David Woodhouse 提交于
It requires cfi_qry_mode_on(), which is in cfi_util.c Reported by Russell King Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 07 8月, 2008 1 次提交
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由 David Woodhouse 提交于
They need to be exported, so let's give them less generic-sounding names while we're at it. Original export patch, along with the suggestion about the nomenclature, from Stephen Rothwell. Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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